STS4C3F30L [STMICROELECTRONICS]
N-channel 30V - 0.044Ω - 5A - SO-8 STripFET™ Power MOSFET; N沟道30V - 0.044Ω - 5A - SO- 8的STripFET ™功率MOSFET
| 型号： | STS4C3F30L |
| 厂家： | 
ST |
| 描述： | N-channel 30V - 0.044Ω - 5A - SO-8 STripFET™ Power MOSFET |
| 文件： | 总14页 (文件大小：393K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STS4C3F30L
N-channel 30V - 0.044Ω - 5A - SO-8
STripFET™ Power MOSFET
General features
Type
VDSS
RDS(on)
ID
STS4C3F30L (n-ch)
STS4C3F30L (p-ch)
30V
30V
<0.055Ω
<0.165Ω
5A
3A
■ Low threshold drive
■ Standard outline for easy automated surface
SO-8
mount assembly
Description
This application specific MOSFET is the second
generation of STMicroelectronics unique “Single
Feature Size™” strip-based process. The
resulting transistor shows extremely high packing
density for low on-resistance, rugged avalanche
characteristics and less critical alignment steps
therefore a remarkable manufacturing
Internal schematic diagram
reproducibility.
Applications
■ Switching application
Order codes
Part number
Marking
Package
Packaging
STS4C3F30L
S4C3F30L
SO-8
Tape & reel
May 2006
Rev 1
1/14
www.st.com
14
Contents
STS4C3F30L
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
Test circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/14
STS4C3F30L
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
Value
N-channel
Unit
P-channel
VDS
VDGR
VGS
ID
Drain-source voltage (VGS = 0)
Drain-gate voltage (RGS = 20 kΩ)
Gate- source voltage
30
30
V
V
V
16
Drain current (continuos) at TC = 25°C S.O.
Drain current (continuos) at TC = 100°C S.O.
Drain current (pulsed)
5
2.7
1.7
11
A
A
A
ID
3.2
20
(1)
IDM
Total dissipation at TC = 25°C D.O.
Total dissipation at TC = 25°C S.O.
1.6
2
W
W
PTOT
Tstg
Tj
Storage temperature
-60 to 150
150
W/°C
°C
Max. operating junction temperature
1. Pulse width limited by safe operating area
Note:
For the P-channel MOSFET actual polarity of voltages and current has to be reversed
Table 2.
Symbol
Thermal data
Parameter
Value
Unit
Thermal resistance junction-case S.O.
Thermal resistance junction-case D.O.
62.5
78.0
°C/W
°C/W
Rthj-case
Maximum lead temperature for soldering
purpose
Tl
300
°C
3/14
Electrical characteristics
STS4C3F30L
2
Electrical characteristics
(T
=25°C unless otherwise specified)
CASE
Table 3.
Symbol
On/off states
Parameter
Test condictions
Min. Typ. Max. Unit
Drain-source
n-ch
p-ch
30
30
V
V
V(BR)DSS
ID = 250µA, VGS = 0
breakdown voltage
Zero gate voltage
drain current
(VGS = 0)
V
DS = Max rating
n-ch
1
1
µA
µA
IDSS
VDS = Max rating,@125°C p-ch
Gate-body leakage
current (VDS = 0)
n-ch
100 nA
100 nA
IGSS
VGS
=
20V
p-ch
n-ch
p-ch
1
1
1.6
1.6
2.5
2.5
V
V
VGS(th) Gate threshold voltage VDS = VGS, ID = 250µA
VGS = 10V, ID = 2A
n-ch
p-ch
n-ch
p-ch
0.044 0.055
0.145 0.165
0.051 0.065
0.160 0.20
Ω
Ω
Ω
Ω
VGS = 10V, ID = 1.5A
VGS = 4.5V, ID = 2A
VGS = 4.5V, ID = 1.5A
Static drain-source on
resistance
RDS(on)
Table 4.
Symbol
Dynamic
Parameter
Test condictions
Min. Typ. Max. Unit
VDS >ID(on)xRDS(on)max,
ID=3.5A
n-ch
p-ch
6
4
S
S
Forward
transconductance
(1)
gfs
VDS >ID(on)xRDS(on)max,
ID=2A
n-ch
p-ch
n-ch
p-ch
n-ch
p-ch
220
420
115
95
pF
pF
pF
pF
pF
pF
Input capacitance
Ciss
Coss
Crss
V
DS = 25V, f = 1 MHz,
Output capacitance
VGS = 0
23
Reverse transfer
capacitance
30
N-channel
VDD = 24V, ID = 5 A
VGS = 10V
n-ch
p-ch
Qg
Total gate charge
9.5
4.8
2
7
nC
nC
P-channel
VDD =15V, ID = 3 A
VGS = 4.5V
n-ch
p-ch
n-ch
p-ch
Qgs
Qgd
Gate-source charge
Gate-drain charge
2.25
1.7
1.7
2
nC
nC
nC
nC
(see Figure 24)
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
4/14
STS4C3F30L
Electrical characteristics
Min. Typ. Max Unit
Table 5.
Switching times
Parameter
Symbol
Test condictions
n-ch
p-ch
n-ch
p-ch
n-ch
p-ch
n-ch
p-ch
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
N-channel
13
15
27
37
10
90
3
ns
ns
ns
ns
ns
ns
ns
ns
VDD = 15V, ID = 2.5 A
RG = 4.7Ω, VGS = 10V
P-channel
VDD = 15V, ID = 1.5 A
RG = 4.7Ω, VGS = 4.5V
(see Figure 26)
Turn-off-delay time
Fall time
23
Table 6.
Symbol
Source drain diode
Parameter
Test condictions
Min Typ. Max Unit
n-ch
p-ch
n-ch
p-ch
5
3
A
A
A
A
Source-drain current
ISD
20
12
Source-drain current
(pulsed)
(1)
ISDM
n-ch
p-ch
1.2
1.2
V
V
(2)
VSD
Forward on voltage
ISD = 4 A, VGS = 0
N-channel
n-ch
p-ch
28
35
ns
ns
trr
Reverse recovery time
ISD = 3.5A, di/dt=100A/µs
VDD = 15V, Tj = 150°C
P-channel
n-ch
p-ch
n-ch
p-ch
18
25
nC
nC
A
Qrr
Reverse recovery charge ISD = 3A, di/dt=100 A/µs
VDD = 15V, Tj = 150°C
1.3
1.5
IRRM
Reverse recovery current (see Figure 28)
A
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
5/14
Electrical characteristics
STS4C3F30L
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area n-ch
Figure 2. Thermal impedance n-ch
Figure 3. Output characterisics n-ch
Figure 4. Transfer characteristics n-ch
Figure 5. Transconductance n-ch
Figure 6. Static drain-source on resistance
n-ch
6/14
STS4C3F30L
Electrical characteristics
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations n-ch
n-ch
Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs
vs temperature n-ch
temperature n-ch
Figure 11. Source-drain diode forward
characteristics n-ch
7/14
Electrical characteristics
STS4C3F30L
Figure 12. Safe operating area p-ch
Figure 13. Thermal impedance p-ch
Figure 14. Output characterisics p-ch
Figure 15. Transfer characteristicsp-ch
Figure 16. Transconductance p-ch
Figure 17. Static drain-source on resistance
p-ch
8/14
STS4C3F30L
Electrical characteristics
Figure 18. Gate charge vs gate-source voltage Figure 19. Capacitance variations p-ch
p-ch
Figure 20. Normalized gate threshold voltage Figure 21. Normalized on resistance vs
vs temperature p-ch
temperature p-ch
Figure 22. Source-drain diode forward
characteristics p-ch
9/14
Test circuit
STS4C3F30L
3
Test circuit
Figure 23. Switching times test circuit for
resistive load
Figure 24. Gate charge test circuit
Figure 25. Test circuit for inductive load
switching and diode recovery times
Figure 26. Unclamped Inductive load test
circuit
Figure 27. Unclamped inductive waveform
Figure 28. Switching time waveform
10/14
STS4C3F30L
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/14
Package mechanical data
STS4C3F30L
SO-8 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
MIN.
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
A
a1
a2
a3
b
0.1
0.003
0.65
0.35
0.19
0.25
0.025
0.013
0.007
0.010
b1
C
c1
D
45 (typ.)
4.8
5.8
5.0
6.2
0.188
0.228
0.196
0.244
E
1.27
3.81
e
0.050
0.150
e3
F
3.8
0.4
4.0
1.27
0.6
0.14
0.157
0.050
0.023
L
0.015
M
S
8 (max.)
12/14
STS4C3F30L
Revision history
5
Revision history
Table 7.
Date
Revision history
Revision
Changes
12-May-2006
1
First release
13/14
STS4C3F30L
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