AN-9729 [FAIRCHILD]
LED Application Design Guide Using Half-Bridge LLC Resonant Converter for 100W Street Lighting; LED应用设计指南使用半桥LLC谐振转换器为100W路灯![AN-9729](http://pdffile.icpdf.com/pdf2/p00210/img/icpdf/AN-972_1186314_icpdf.jpg)
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AN-9729
LED Application Design Guide Using Half-Bridge LLC
Resonant Converter for 100W Street Lighting
Among various kinds of resonant converters, the simplest
and most popular is the LC series resonant converter, where
Introduction
This application note describes the LED driving system
using a half-bridge LLC resonant converter for high
power LED lighting applications, such as outdoor or
street lighting. Due to the existence of the non-isolation
DC-DC converter to control the LED current and the light
intensity, the conventional PWM DC-DC converter has
the problem of low-power conversion efficiency. The
half-bridge LLC converter can perform the LED current
control and the efficiency can be significantly improved.
Moreover, the cost and the volume of the whole LED
driving system can be reduced.
the rectifier-load network is placed in series with the L-C
resonant network, as depicted in Figure 1[2-4]. In this
configuration, the resonant network and the load act as a
voltage divider. By changing the frequency of driving
voltage Vd, the impedance of the resonant network changes.
The input voltage is split between this impedance and the
reflected load. Since it is a voltage divider, the DC gain of a
LC series resonant converter is always <1. At light-load
condition, the impedance of the load is large compared to
the impedance of the resonant network; all the input voltage
is imposed on the load. This makes it difficult to regulate
the output at light load. Theoretically, frequency should be
infinite to regulate the output at no load.
Consideration of LED Drive
LED lighting is rapidly replacing conventional lighting
sources like incandescent bulbs, fluorescent tubes, and
halogens because LED lighting reduces energy
consumption. LED lighting has greater longevity,
contains no toxic materials, and emits no harmful UV
rays, which are 5 ~ 20 times longer than fluorescent tubes
and incandescent bulbs. All metal halide and fluorescent
lamps, including CFLs, n contain mercury.
The amount of current through an LED determines the
light it emits. The LED characteristics determine the
forward voltage necessary to achieve the required level of
current. Due to the variation in LED voltage versus
current characteristics, controlling only the voltage across
the LED leads to variability in light output. Therefore,
most LED drivers use current regulation to support
brightness control. Brightness can be controlled directly
by changing the LED current.
Figure 1. Half-Bridge, LC Series Resonant Converter
To overcome the limitation of series resonant converters,
the LLC resonant converter has been proposed[8-12]. The
LLC resonant converter is a modified LC series resonant
converter implemented by placing a shunt inductor across
the transformer primary winding, as depicted in Figure 2.
When this topology was first presented, it did not receive
much attention due to the counterintuitive concept that
increasing the circulating current in the primary side with
a shunt inductor can be beneficial to circuit operation.
However, it can be very effective in improving efficiency
for high-input voltage applications where the switching
loss is more dominant than the conduction loss.
Consideration of LLC Resonant
Converter
The attempt to obtain ever-increasing power density of
switched-mode power supplies has been limited by the
size of passive components. Operation at higher
frequencies considerably reduces the size of passive
components, such as transformers and filters; however,
switching losses have been an obstacle to high-frequency
operation. To reduce switching losses and allow high-
frequency operation, resonant switching techniques have
been developed. These techniques process power in a
sinusoidal manner and the switching devices are softly
commutated. Therefore, the switching losses and noise
In most practical designs, this shunt inductor is realized
using the magnetizing inductance of the transformer. The
circuit diagram of LLC resonant converter looks much the
same as the LC series resonant converter: the only
difference is the value of the magnetizing inductor. While
the series resonant converter has
a magnetizing
inductance larger than the LC series resonant inductor
(Lr), the magnetizing inductance in an LLC resonant
converter is just 3~8 times Lr, which is usually
implemented by introducing an air gap in the transformer.
can be dramatically reduced[1-7]
.
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
AN-9729
APPLICATION NOTE
network even though a square-wave voltage is
applied to the resonant network. The current (Ip) lags
the voltage applied to the resonant network (that is,
the fundamental component of the square-wave
voltage (Vd) applied to the half-bridge totem pole),
which allows the MOSFETs to be turned on with
zero voltage. As shown in Figure 4, the MOSFET
turns on while the voltage across the MOSFET is
zero by flowing current through the anti-parallel
diode.
The rectifier network produces DC voltage by
rectifying the AC current with rectifier diodes and a
capacitor. The rectifier network can be implemented
as a full-wave bridge or center-tapped configuration
with capacitive output filter.
Figure 2. Half-Bridge LLC Resonant Converter
.
An LLC resonant converter has many advantages over a
series resonant converter. It can regulate the output over
wide line and load variations with a relatively small
variation of switching frequency. It can achieve zero
voltage switching (ZVS) over the entire operating range.
All essential parasitic elements, including junction
capacitances of all semiconductor devices and the leakage
inductance and magnetizing inductance of the
transformer, are utilized to achieve soft switching.
Square-Wave Generator
Q1
Rectifier
Network
Resonant
Network
IDS1
This application note presents design considerations of an
LLC resonant half-bridge converter employing
Fairchild’s FLS-XS series. It includes explanation of the
LLC resonant converter operation principles, designing
the transformer and resonant network, and selecting the
components. The step-by-step design procedure,
explained with a design example, helps design the LLC
resonant converter.
Ip
Io
+
n:1
ID
Lr
Im
Lm
+
Vd
-
VIN
Q2
Ro
VO
-
Cr
Figure 3. Schematic of Half-Bridge LLC
Resonant Converter
LLC Resonant Converter and
Fundamental Approximation
Ip
Im
Figure 3 shows a simplified schematic of a half-bridge
LLC resonant converter, where Lm is the magnetizing
inductance that acts as a shunt inductor, Lr is the series
resonant inductor, and Cr is the resonant capacitor.
Figure 4 illustrates the typical waveforms of the LLC
resonant converter. It is assumed that the operation
frequency is same as the resonance frequency, determined
by the resonance between Lr and Cr. Since the
magnetizing inductor is relatively small, a considerable
amount of magnetizing current (Im) exists, which
freewheels in the primary side without being involved in
the power transfer. The primary-side current (Ip) is sum of
the magnetizing current and the secondary-side current
referred to the primary.
IDS1
ID
VIN
Vd
Vgs1
Vgs2
In general, the LLC resonant topology consists of three
stages shown in Figure 3; square-wave generator,
resonant network, and rectifier network.
.
.
The square-wave generator produces a square-wave
voltage, Vd, by driving switches Q1 and Q2 alternately
with 50% duty cycle for each switch. A small dead
time is usually introduced between the consecutive
transitions. The square-wave generator stage can be
built as a full-bridge or half-bridge type.
The resonant network consists of a capacitor, leakage
inductances, and the magnetizing inductance of the
transformer. The resonant network filters the higher
harmonic currents. Essentially, only sinusoidal
current is allowed to flow through the resonant
Figure 4. Typical Waveforms of Half-Bridge LLC
Resonant Converter
The filtering action of the resonant network allows use of
the fundamental approximation to obtain the voltage gain
of the resonant converter, which assumes that only the
fundamental component of the square-wave voltage input
to the resonant network contributes to the power transfer
to the output. Because the rectifier circuit in the
secondary side acts as an impedance transformer, the
equivalent load resistance is different from actual load
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
2
AN-9729
APPLICATION NOTE
resistance. Figure 5 shows how this equivalent load
resistance is derived. The primary-side circuit is replaced
by a sinusoidal current source, Iac, and a square wave of
voltage, VRI, appears at the input to the rectifier. Since the
average of |Iac| is the output current, Io, Iac, is obtained as:
Cr
Lr
Vd
+
+
VO
+
VIN
VRI
Lm
Ro
-
-
-
Np:Ns
I
2
Iac
o sin(t)
(1)
8n2
2
Rac
Ro
n=Np/Ns
and VRI is given as:
VRI Vo if sin(t) 0
F
Lr
Cr
(2)
VRo
VRI Vo if sin(t) 0
where Vo is the output voltage.
F
Rac
Vd
F
(nVRI
)
Lm
The fundamental component of VRI is given as:
Figure 6. AC Equivalent Circuit for LLC
Resonant Converter
4V
F
VRI
o sin(t)
(3)
With the equivalent load resistance obtained in Equation
5, the characteristics of the LLC resonant converter can
be derived. Using the AC equivalent circuit of Figure 6,
the voltage gain, M, is obtained as:
Since harmonic components of VRI are not involved in the
power transfer, AC equivalent load resistance can be
calculated by dividing VRIF by Iac as:
F
VRI
Iac
8 Vo
8
4n V
o sin(t)
Rac
Ro
(4)
F
F
2 Io 2
VRO
n VRI
Vd
2n Vo
M
F
F
4 V
Vd
V
in sin(t)
in
Considering the transformer turns ratio (n=Np/Ns), the
equivalent load resistance shown in the primary side is
obtained as:
2
)2 (m 1)
(6)
o
(
8n2
2
2
2
(5)
Rac
Ro
(
1) j
(
1)(m 1)Q
2
2
p
o o
By using the equivalent load resistance, the AC
equivalent circuit is obtained, as illustrated in Figure 6,
where Vd and VRO are the fundamental components of
the driving voltage, Vd, and reflected output voltage,
where:
Lp Lm Lr , Rac
F
F
8n2
2
Lp
Ro , m
Lr
V
RO (nVRI), respectively.
Lr
1
1
1
Q
, o
, p
Cr Rac
LrCr
LpCr
pk
Iac
As can be seen in Equation (6), there are two resonant
frequencies. One is determined by Lr and Cr, while the
other is determined by Lp and Cr.
Equation (6) shows the gain is unity at resonant frequency
(ωo), regardless of the load variation, which is given as:
2
(m 1)p
2nVo
M
1 at o
(7)
2
V
o2 p
in
The gain of Equation (6) is plotted in Figure 7 for
different Q values with m=3, fo=100kHz, and fp=57kHz.
As observed in Figure 7, the LLC resonant converter
shows gain characteristics that are almost independent of
the load when the switching frequency is around the
resonant frequency, fo. This is a distinct advantage of
LLC-type resonant converter over the conventional series
resonant converter. Therefore, it is natural to operate the
converter around the resonant frequency to minimize the
switching frequency variation.
I
2
Iac
o sin(wt)
o sin(wt)
4V
F
VRI
Figure 5. Derivation of Equivalent Load Resistance Rac
The operating range of the LLC resonant converter is
limited by the peak gain (attainable maximum gain),
which is indicated with ‘*’ in Figure 7. Note that the peak
voltage gain does not occur at fo or fp. The peak gain
frequency where the peak gain is obtained exists between
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
3
AN-9729
APPLICATION NOTE
fp and fo, as shown in Figure 7. As Q decreases (as load
decreases), the peak gain frequency moves to fp and
higher peak gain is obtained. Meanwhile, as Q increases
(as load increases), the peak gain frequency moves to fo
and the peak gain drops; the full load condition should be
worst case for the resonant network design.
In Figure 8, the effective series inductor (Lp) and shunt
inductor (Lp-Lr) are obtained by assuming n2Llks=Llkp and
referring the secondary-side leakage inductance to the
primary side as:
Lp Lm L
lkp
(8)
Lr L Lm //(n2L ) L Lm // L
1
1
fo
lkp
lks
lkp
lkp
fp
2 LrCr
2 LpCr
When handling an actual transformer, equivalent circuit
with Lp and Lr is preferred since these values can be
measured with a given transformer. In an actual
Lr / Cr
Q
Rac
transformer, Lp and Lr can be measured in the primary
side with the secondary-side winding open circuited and
short circuited, respectively.
In Figure 9, notice that a virtual gain MV is introduced,
which is caused by the secondary-side leakage
inductance. By adjusting the gain equation of Equation
(6) using the modified equivalent circuit of Figure 9, the
gain equation for integrated transformer is obtained by:
M@ f 1
o
o
(
)2 (m 1) MV
2n VO
M
2
p
2
V
1)(m 1)Qe
1) (m 1)Qe
in
(
1) j( ) (
2
2
o o
Figure 7. Typical Gain Curves of LLC Resonant
2
o
Converter (m=3)
(
2 ) m(m 1)
2
p
2
Consideration for Integrated
Transformer
(
1) j( )(
2
2
o o
where:
(9)
For practical design, it is common to implement the
magnetic components (series inductor and shunt inductor)
using an integrated transformer; where the leakage
inductance is used as a series inductor, while the
magnetizing inductor is used as a shunt inductor. When
building the magnetizing components in this way, the
equivalent circuit in Figure 6 should be modified as
shown in Figure 8 because leakage inductance exists, not
only in the primary side, but also in the secondary side.
Not considering the leakage inductance in the transformer
secondary side generally results in an ineffective design.
8n2
Ro
2 MV
Lp
Lr
e
Rac
2 , m
, o
Lr
1
1
1
Qe
, p
e
Cr Rac
LrCr
LpCr
The gain at the resonant frequency (ωo) is fixed
regardless of the load variation, which is given as:
Lp
m
M MV
at o
(10)
Lp Lr
m 1
The gain at the resonant frequency (ωo) is unity when
using individual core for series inductor, as shown in
Equation 7. However, when implementing the magnetic
components with integrated transformer, the gain at the
resonant frequency (ωo) is larger than unity due to the
virtual gain caused by the leakage inductance in the
transformer secondary side.
Lr Llkp Lm //(n2L
)
lks
Llkp Lm // L
lkp
Lp
(MV
)
Lp Llkp Lm
Lp Lr
The gain of Equation (9) is plotted in Figure 10 for
different Qe values with m=3, fo=100kHz, and fp=57kHz.
As observed in Figure 9, the LLC resonant converter shows
gain characteristics almost independent of the load when
the switching frequency is around the resonant frequency,
fo.
1: MV
c
Figure 8. Modified Equivalent Circuit to
Accommodate the Secondary-Side Leakage
Inductance
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
4
AN-9729
APPLICATION NOTE
1
1
fo
fp
2 LrCr
Gain (M)
B
2 LpCr
A
Lr / Cr
Qe
e
Rac
Load Increase
I
II
Above
Resonance
(fs>fo)
Below
Resonance
(fs<fo)
M@ f MV
o
fo
fs
Figure 10. Operation Modes According to the
Operation Frequency
1
Figure 9. Typical Gain Curves of LLC Resonant
2 fo
Converter (m=3) Using an Integrated Transformer
1
2 fS
Consideration of Operation Mode
and Attainable Maximum Gain
Operation Mode
The LLC resonant converter can operate at frequency
below or above the resonance frequency (fo), as illustrated
in Figure 10. Figure 11 shows the waveforms of the
currents in the transformer primary side and secondary
side for each operation mode. Operation below the
resonant frequency (case I) allows the soft commutation
of the rectifier diodes in the secondary side, while the
circulating current is relatively large. The circulating
current increases more as the operation frequency moves
downward from the resonant frequency. Meanwhile,
operation above the resonant frequency (case II) allows
the circulating current to be minimized, but the rectifier
diodes are not softly commutated. Below-resonance
operation is preferred for high output voltage
applications, such as street LED lighting systems where
the reverse-recovery loss in the rectifier diode is severe.
Below-resonance operation has a narrow frequency range
with respect to the load variation since the frequency is
limited below the resonance frequency even at no-load
condition.
Figure 11. Waveforms of Each Operation Mode
Required Maximum Gain and Peak Gain
Above the peak gain frequency, the input impedance of
the resonant network is inductive and the input current of
the resonant network (Ip) lags the voltage applied to the
resonant network (Vd). This permits the MOSFETs to
turn on with zero voltage (ZVS), as illustrated in Figure
12. Meanwhile, the input impedance of the resonant
network becomes capacitive and Ip leads Vd below the
peak gain frequency. When operating in capacitive
region, the MOSFET body diode is reverse recovered
during the switching transition, which results in severe
noise. Another problem of entering the capacitive region
is that the output voltage becomes out of control since the
slope of the gain is reversed. The minimum switching
frequency should be limited above the peak gain
frequency.
On the other hand, above-resonance operation has less
conduction loss than the below-resonance operation. It
can show better efficiency for low output voltage
applications, such as Liquid Crystal Display (LCD) TV or
laptop adaptor, where Schottky diodes are available for
the secondary-side rectifiers and reverse-recovery
problems are insignificant. However, operation above the
resonant frequency may cause too much frequency
increase at light-load condition. Above-frequency
operation requires frequency skipping to prevent too
much increase of the switching frequency.
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
5
AN-9729
APPLICATION NOTE
Even though the peak gain at a given condition can be
obtained using the gain in Equation (6), it is difficult to
express the peak gain in explicit form. To simplify the
analysis and design, the peak gains are obtained using
simulation tools and depicted in Figure 14, which shows
how the peak gain (attainable maximum gain) varies with
Q for different m values. It appears that higher peak gain
can be obtained by reducing m or Q values. With a given
resonant frequency (fo) and Q value, decreasing m means
reducing the magnetizing inductance, which results in
increased circulating current. There is a trade-off between
the available gain range and conduction loss.
M
Inductive
Region
Capacitive
Region
Peak Gain
fs
Vd
Ip
Vd
Ip
2.2
2.1
2
IDS1
IDS1
1.9
1.8
1.7
1.6
1.5
Reverse Recovery
ZVS
Figure 12. Operation Waveforms for Capacitive
and Inductive Regions
The available input voltage range of the LLC resonant
converter is determined by the peak voltage gain. Thus,
the resonant network should be designed so that the gain
curve has an enough peak gain to cover the input voltage
range. However, ZVS condition is lost below the peak
gain point, as depicted in Figure 12. Therefore, some
margin is required when determining the maximum gain
to guarantee stable ZVS operation during the load
transient and startup. Typically 10~20% of the maximum
gain is used as a margin, as shown in Figure 13.
m=2.25
1.4
m=2.5
1.3
m=3.0
m=3.5
m=4.0
1.2
m=4.5
m=5.0
m=6.0
m=8.0 m=7.0
1.1
m=9.0
0.5
1
Gain (M)
0.3
0.2
0.4
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
Q
Peak Gain
10~20% of Mmax
Maximum Operation
Figure 14. Peak Gain (Attainable Maximum Gain)
Gain
vs. Q for Different m Values
(Mmax
)
fs
fo
Figure 13. Determining the Maximum Gain
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
6
AN-9729
APPLICATION NOTE
Features of FLS-XS Series
Table 1. Pin Description
FLS-XS series is an integrated Pulse Frequency
Modulation (PFM) controller and MOSFETs specifically
designed for Zero Voltage Switching (ZVS) half-bridge
converters with minimal external components. The
internal controller includes an under-voltage lockout,
optimized high-side / low-side gate driver, temperature-
compensated precise current controlled oscillator, and
self-protection circuitry. Compared with discrete
MOSFET and PWM controller solutions, FLS-XS series
can reduce total cost, component count, size, and weight;
while simultaneously increasing efficiency, productivity,
and system reliability.
Pin#
Name
Description
This pin is the drain of the high-side
MOSFET, typically connected to the
input DC link voltage.
1
VDL
This pin is for discharging the external
soft-start capacitor when any
protections are triggered. When the
voltage of this pin drops to 0.2V, all
protections are reset and the controller
starts to operate again.
2
AR
This pin is to program the switching
frequency. Typically, opto-coupler and
resistor are connected to this pin to
regulate the output voltage.
3
4
RT
This pin is to sense the current flowing
through the low-side MOSFET.
Typically negative voltage is applied
on this pin.
CS
5
6
SG
PG
This pin is the control ground.
This pin is the power ground. This pin
is connected to the source of the low-
side MOSFET.
This pin is the supply voltage of the
control IC.
7
8
9
LVCC
NC
No connection.
Figure 15. Package Diagram
This pin is the supply voltage of the
high-side drive circuit.
HVCC
This pin is the drain of the low-side
MOSFET. Typically transformer is
connected to this pin.
10
VCTR
LVCC
7
VDL
1
VREF
VREF
9
HVCC
IRT
LVCC Good
Internal
Bias
VREF
3V
1V
S
R
IRT
Q
2IRT
LUV+ / LUV-
HUV+ / HUV-
2V
Level
Shifter
High-Side
Gate Driver
Time
Delay
RT
3
2
350ns
10
VCTR
Divider
Balancing
Delay
Low-Side
Gate Driver
Time
Delay
AR
VCssH / VCssL
5k
350ns
S
Q
R
Shutdown
LVCC good
TSD
VAOCP
LVCC
VOVP
Delay
50ns
6
5
PG
SG
VOCP
Delay
-1
1.5
s
4
CS
Figure 16. Functional Block Diagram of FSFR-Series
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
7
AN-9729
APPLICATION NOTE
Figure 17. Reference Circuit for Design Example of LLC Resonant Half-Bridge Converter
Design Procedure
In this section, a design procedure is presented using the
schematic in Figure 17 as a reference. An integrated
transformer with center tap, secondary side is used and
input is supplied from Power Factor Correction (PFC) pre-
regulator. A DC-DC converter with 100W/100V output
has been selected as a design example. The design
specifications are as follows:
Even though the input voltage is regulated as constant by
PFC pre-regulator, it drops during the hold-up time. The
minimum input voltage considering the hold-up time
requirement is given as:
2P THU
min
(13
)
Vin VO.PFC 2
in
CDL
.
Nominal input voltage: 400VDC (output of PFC
stage)
where VO.PFC is the nominal PFC output voltage, THU is
a hold-up time, and CDL is the DC link bulk capacitor.
.
.
.
Output: 100V/1A (100W)
Hold-up time requirement: 30ms (50Hz line freq.)
DC link capacitor of PFC output: 240µF
[STEP-1] Define System Specifications
Estimated Efficiency (Eff): The power conversion
efficiency must be estimated to calculate the maximum
input power with a given maximum output power. If no
reference data is available, use Eff = 0.88~0.92 for low-
voltage output applications and Eff = 0.92~0.96 for high-
voltage output applications. With the estimated efficiency,
the maximum input power is given as:
[STEP-2] Determine Maximum and Minimum
Voltage Gains of the Resonant Network
P
o
(11
)
P
in
As discussed in the previous section, it is typical to operate
the LLC resonant converter around the resonant frequency
(fo) to minimize switching frequency variation. Since the
input of the LLC resonant converter is supplied from PFC
output voltage, the converter should be designed to operate
at fo for the nominal PFC output voltage.
Eff
min
Input Voltage Range (Vin and Vinmax): The maximum
input voltage would be the nominal PFC output voltage as:
max
(12
)
V
VO.PFC
in
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
8
AN-9729
APPLICATION NOTE
As observed in Equation (10), the gain at fo is a function of
m (m=Lp/Lr). The gain at fo is determined by choosing that
value of m. While a higher peak gain can be obtained with
a small m value, too small m value results in poor coupling
of the transformer and deteriorates the efficiency. It is
typical to set m to be 3~7, which results in a voltage gain
of 1.1~1.2 at the resonant frequency (fo).
[STEP-4] Calculate Equivalent Load
Resistance
With the transformer turns ratio obtained from Equation
(16), the equivalent load resistance is obtained as:
8n2 Vo2
Rac
(17)
2
P
o
With the chosen m value, the voltage gain for the nominal
PFC output voltage is obtained as:
m
M min
@f=fo
(14)
m 1
[STEP-5] Design the Resonant Network
which would be the minimum gain because the nominal
With m value chosen in STEP-2, read proper Q value from
the peak gain curves in Figure 14 that allows enough peak
gain. Considering the load transient and stable zero-
voltage-switching (ZVS) operation, 10~20% margin
should be introduced on the maximum gain when
determining the peak gain. Once the Q value is
determined, the resonant parameters are obtained as:
1
PFC output voltage is the maximum input voltage (Vinmax).
The maximum voltage gain is given as:
max
V
M max
M min
in
(15)
min
V
in
Cr
(18)
2Q fo Rac
1
Lr
(19)
(20)
(2 fo )2 Cr
Lp m Lr
[STEP-3] Determine the Transformer Turns
Ratio (n=Np/Ns)
With the minimum gain (Mmin) obtained in STEP-2, the
transformer turns ratio is given as:
max
Np
V
n
M min
in
(16)
Ns 2(Vo VF )
where VF is the secondary-side rectifier diode voltage
drop.
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
9
AN-9729
APPLICATION NOTE
[STEP-6] Design the Transformer
The worst case for the transformer design is the minimum
switching frequency condition, which occurs at the
minimum input voltage and full-load condition. To obtain
the minimum switching frequency, plot the gain curve
using gain Equation 9 and read the minimum switching
frequency. The minimum number of turns for the
transformer primary-side is obtained as:
n(Vo VF )
min
Np
(21)
2 fsmin MV B A
e
where Ae is the cross-sectional area of the transformer
core in m2 and B is the maximum flux density swing in
Tesla, as shown in Figure 20. If there is no reference
data, use B =0.3~0.4 T.
n (Vo+VF)/MV
V
RI 1/(2fs)
[STEP-7] Transformer Construction
Parameters Lp and Lr of the transformer were determined
in STEP-5. Lp and Lr can be measured in the primary side
with the secondary-side winding open circuited and short
circuited, respectively. Since LLC converter design
requires a relatively large Lr, a sectional bobbin is typically
used, as shown in Figure 22, to obtain the desired Lr value.
For a sectional bobbin, the number of turns and winding
configuration are the major factors determining the value
of Lr, while the gap length of the core does not affect Lr
much. Lp can be controlled by adjusting the gap length.
Table 2 shows measured Lp and Lr values with different
gap lengths. A gap length of 0.05mm obtains values for Lp
and Lr closest to the designed parameters.
-n (Vo+VF)/MV
B
B
Figure 20. Flux Density Swing
Choose the proper number of turns for the secondary side
that results in primary-side turns larger than Npmin as:
min
Np n Ns Np
(22)
N p
N s2
N s1
Figure 22. Sectional Bobbin
Table 2. Measured Lp and Lr with Different Gap Lengths
Gap Length
Lp
Lr
0.0mm
0.05mm
0.10mm
0.15mm
0.20mm
0.25mm
2,295μH
943μH
630μH
488μH
419μH
366μH
123μH
122μH
118μH
117μH
115μH
114μH
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
10
AN-9729
APPLICATION NOTE
The nominal voltage of the resonant capacitor in normal
operation is given as:
max
RMS
V
2 ICr
2 fo Cr
nom
in
VC
(24)
r
2
However, the resonant capacitor voltage increases much
higher at overload condition or load transient. Actual
capacitor selection should be based on the Over-Current
Protection (OCP) trip point. With the OCP level, IOCP, the
maximum resonant capacitor voltage is obtained as:
max
V
IOCP
nom
in
VC
(25)
r
2
2 fo Cr
[STEP-9] Rectifier Network Design
When the center tap winding is used in the transformer
secondary side, the diode voltage stress is twice of the
output voltage expressed as:
VD 2(Vo VF )
(26)
[STEP-8] Select the Resonant Capacitor
The RMS value of the current flowing through each
rectifier diode is given as:
When choosing the resonant capacitor, the current rating
should be considered because a considerable amount of
current flows through the capacitor. The RMS current
through the resonant capacitor is given as:
4
RMS
ID
Io
(27)
Meanwhile, the ripple current flowing through output
capacitor is given as:
1
Io
2 2n
n(Vo VF )
4 2 foMV (Lp Lr )
RMS
2
]
IC
[
]2 [
(23)
r
Io
2 8
Eff
RMS
2
ICo
(
)2 Io
Io
(28)
8
2 2
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
11
AN-9729
APPLICATION NOTE
The voltage ripple of the output capacitor is:
2
(29
)
Vo Io RC
where RC is the effective series resistance (ESR) of the
output capacitor and the power dissipation is the output
capacitor is:
(ICoRMS )2 RC
(30
)
P
Loss.Co
Figure 24. Typical Circuit Configuration for RT Pin
Soft-Start To prevent excessive inrush current and
overshoot of output voltage during startup, increase the
voltage gain of the resonant converter progressively. Since
the voltage gain of the resonant converter is reversely
proportional to the switching frequency, soft-start is
implemented by sweeping down the switching frequency
from an initial high frequency (f ISS) until the output
voltage is established, as illustrated in Figure 25. The soft-
start circuit is made by connecting RC series network on
the RT pin as shown in Figure 24. FLS-XS series also has
an internal soft-start for 3ms to reduce the current
overshoot during the initial cycles, which adds 40KHz to
the initial frequency of the external soft-start circuit, as
shown in Figure 25. The actual initial frequency of the
soft-start is given as:
5.2k 5.2k
f ISS (
)100 40 (kHz)
(33
)
[STEP-10] Control Circuit Configuration
Rmin
RSS
It is typical to set the initial frequency of soft-start (f ISS) as
2~3 times of the resonant frequency (fo).
Figure 24 shows the typical circuit configuration for the RT
pin of FLS-XS series, where the opto-coupler transistor is
connected to the RT pin to control the switching frequency.
The minimum switching frequency occurs when the opto-
coupler transistor is fully tuned off, which is given as:
The soft-start time is determined by the RC time constant:
(34
)
TSS 3 ~ 4 timesof RSS CSS
5.2k
Rmin
fmin
100(kHz)
(31)
Assuming the saturation voltage of the opto-coupler
transistor is 0.2V, the maximum switching frequency is
determined as:
5.2k 4.68k
fmax (
)100(kHz)
(32)
Rmin
Rmax
Figure 25. Frequency Sweep of the Soft-Start
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
12
AN-9729
APPLICATION NOTE
[STEP-12] Voltage and Current Feedback
Power supplies for LED lighting must be controlled by
Constant Current (CC) Mode as well as a Constant
Voltage (CV) Mode. Because the forward-voltage drop of
LED varies with the junction temperature and the current
also increases greatly consequently, devices can be
damaged.
Figure 28 shows an example of a CC and CV Mode
feedback circuit for single output LED power supply.
During normal operation, CC Mode is dominant and CV
control circuit does not activate as long as the feedback
voltage is lower than reference voltage, which means that
CV control circuit only acts as OVP for abnormal modes.
[STEP-11] Current Sensing and Protection
FLS-XS series senses low-side MOSFET drain current as
a negative voltage, as shown in Figure 26 and Figure 27.
Half-wave sensing allows low-power dissipation in the
sensing resistor, while full-wave sensing has less
switching noise in the sensing signal. Typically, RC low-
pass filter is used to filter out the switching noise in the
sensing signal. The RC time constant of the low-pass filter
should be 1/100~1/20 of the switching period.
Figure 26. Half-Wave Sensing
Figure 27. Full-Wave Sensing
Figure 28. Example of CC and CV Feedback Circuit
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
13
AN-9729
APPLICATION NOTE
Figure 29 shows another example of a CC and Over-
Voltage Regulation (OVR) Mode feedback circuit for
multi-output LED power supply. The FAN7346 is a LED
current-balance controller that controls four LED arrays to
maintain equal LED current. To prevent LED driving
voltage being over the withstanding voltage of component,
the FAN7346 controls LED driving voltage. The OVR
control circuit activates when the ENA pin is in HIGH
state. If OVR pin voltage is lower than 1.5V, the Feedback
Control (FB) pin voltage follows headroom control to
maintain minimum voltage of drain voltages as 1V. If
OVR pin voltage is higher than 1.5V, the FAN7346
controls FB (FB is pulled LOW) through FB regulation so
the OVR pin voltage is not over 1.5V.
thermal stress problems in the other channel. OLP function
has auto-recovery: As soon as drain voltage is higher than
0.3V, OLP is finished and drain voltage feedback system
is restored.
To sense over-current condition, the FAN7346 monitors
FBx pin voltage. If FBx voltage is higher than 1V for
20µs, CHx is considered in over-current condition. After
sensing OCP condition, individual channel switch is
latched off. So, even if a channel is in OCP condition,
other channels keep operating. Any OCP channel is
restarted after UVLO is reset.
LED current is controlled by FBx pin voltage. The
external current balance switch is operating in linear
region to control LED current. Sensed voltage at the FBx
pin is compared with internal reference voltage and
controller signals the gate (or base) for external current
balance switch. Internal reference voltage is made from
ADIM voltage. The LED current is determined as:
VADIM
ILED
(35)
10 RSENSE
ADIM voltage is clamped internally from 0.5V to 4V. The
protections; such as open LED Protection (OLP), Short
LED Protection (SLP), and Over-Current Protection
(OCP); which increase system reliability, are applied in
individual string protection method.
To sense a short LED condition, the FAN7346 senses
drain voltage level. If LEDs are shorted, the LED forward
voltage is lower than other LED strings, so its drain
voltage of external balance switch is higher than other
drain voltage. The SLP condition detection threshold
voltage can be programmed by SLPR voltage. The internal
short LED protection reference is determined as:
VSLP _TH 10VSLPR
(36)
Minimum SLP threshold voltage is 0V and maximum SLP
threshold voltage is 45V. If any string is in SLP condition,
SLP string is turned off and other string is operated
normally. If the sensed drain voltage (CHx voltage) is
higher than the programmed threshold voltage for 20µs,
CHx goes to short LED protection. As soon as
encountering SLP, the corresponding channel is forced off.
To sense an open LED condition, the FAN7346 senses
drain voltage level. If LED string is opened, its drain
voltage of external balance switch is grounded, so the
FAN7346 detects the open-LED condition. The detection
threshold voltage is 0.3V. If CHx voltage is lower than
0.3V for 20µs, its drain voltage feedback is pulled up to
5V. This means the opened LED string is eliminated from
drain feedback loop. Without OLP, minimum drain
voltage is 0V, so drain voltage feedback forces the FB
signal to increase output power. This can cause SLP or
Figure 29. Example of CC and OVR Feedback Circuit
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
14
AN-9729
APPLICATION NOTE
Design Summary
design example. EER3543 core with sectional bobbin is
used for the transformer. Efficiency at full-load is around
94%.
Figure 30 and Figure 31 show the final schematic of the
LLC resonant half-bridge converter for LED lighting
Figure 30. Final Schematic of Half-Bridge LLC Resonant Converter for Single Channel
Figure 31. Final Schematic of Half-Bridge LLC Resonant Converter for Multi Channel
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
15
AN-9729
APPLICATION NOTE
VCR [200V/div]
300V
Experimental Verification
To show the validity of the design procedure presented in
this application note, the converter of the design example
was built and tested. All the circuit components are used as
designed in the design example.
VDS [200V/div]
Figure 32 and Figure 33 show the operation waveforms at
full-load and no-load conditions for nominal input voltage.
As observed, the MOSFET drain-to-source voltage (VDS)
drops to zero by resonance before the MOSFET is turned
on and zero voltage switching is achieved.
1.1A
IP [1A/div]
Time (5µs/div)
Figure 34. Resonant Capacitor Voltage and Primary-
Side Current Waveforms at Full-Load Condition
Figure 34 shows the waveforms of the resonant capacitor
voltage and primary-side current at full-load condition.
The peak values of the resonant capacitor voltage and
primary-side current are 300V and 1.1A, respectively,
which are well matched with the calculated values in
STEP-8 of design procedure section.
IP [1A/div]
Figure 35 shows the rectifier diode voltage and current
waveforms at full-load condition. Due to the voltage
overshoot caused by stray inductance, the voltage stress is
a little bit higher than the value calculated in STEP-9.
ID [1A/div]
257V
Figure 36 shows the output load current and output voltage
of op-amp waveforms for constant-current control when
output load is step changed from 140mA to 1000mA at t0.
VD [100V/div]
Figure 37 shows the operation waveform when LED string
is opened and restored condition
Time (5µs/div)
Figure 35. Rectifier Diode Voltage and Current
Waveforms at Full-Load Condition
IP [1A/div]
VOP_CC [2V/div]
IDS [1A/div]
VDS [200V/div]
1000mA
CC Mode
Transient Mode
140mA
Time (5µs/div)
t1
t0
ILOAD [0.5A/div]
Time (50ms/div)
Figure 32. Operation Waveforms at Full-Load Condition
Figure 36. Soft-Start Waveforms
IP [2A/div]
VLED
[100V/div]
Open LED
Restore LED
ILED_OPEN
[200mA/div]
IDS [1A/div]
VDS_NORMAL_LED
[500mV/div]
VDS [200V/div]
VDSD_OPEN_LED
[500mV/div]
Time (5µs/div)
Figure 33. Operation Waveforms at No-Load Condition
Figure 37. Open LED Protection Operation
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
16
AN-9729
APPLICATION NOTE
References
[1] Robert L. Steigerwald, “A Comparison of Half-bridge
resonant converter topologies,” IEEE Transactions on
Power Electronics, Vol. 3, No. 2, April 1988.
[7] M. Emsermann, “An Approximate Steady State and Small
Signal Analysis of the Parallel Resonant Converter Running
Above Resonance,” Proc. Power Electronics and Variable
Speed Drives ’91, 1991, pp. 9-14.
[2] A. F. Witulski and R. W. Erickson, “Design of the series
resonant converter for minimum stress,” IEEE Transactions
on Aerosp. Electron. Syst., Vol. AES-22, pp. 356-363,
July 1986.
[8] Yan Liang, Wenduo Liu, Bing Lu, van Wyk, J.D, “Design
of integrated passive component for a 1MHz 1kW half-
bridge LLC resonant converter,” IAS 2005, pp. 2223-2228.
[9] B. Yang, F.C. Lee, M. Concannon, “Over-current protection
[3] R. Oruganti, J. Yang, and F.C. Lee, “Implementation of
Optimal Trajectory Control of Series Resonant Converters,”
Proc. IEEE PESC ’87, 1987.
methods for LLC resonant converter” APEC 2003, pp. 605 - 609.
[10] Yilei Gu, Zhengyu Lu, Lijun Hang, Zhaoming Qian,
Guisong Huang, “Three-level LLC series resonant DC/DC
converter,” IEEE Transactions on Power Electronics
Vol.20, July 2005, pp.781 – 789.
[4] V. Vorperian and S. Cuk, “A Complete DC Analysis of the
Series Resonant Converter,” Proc. IEEE PESC’82, 1982.
[5] Y. G. Kang, A. K. Upadhyay, D. L. Stephens, “Analysis and
design of a half-bridge parallel resonant converter operating
above resonance,” IEEE Transactions on Industry
[11] Bo Yang, Lee, F.C, A.J Zhang, Guisong Huang, “LLC
resonant converter for front-end DC/DC conversion,” APEC
2002. pp.1108 – 1112.
Applications, Vol. 27, March-April 1991, pp. 386 – 395.
[12] Bing Lu, Wenduo Liu, Yan Liang, Fred C. Lee, Jacobus D.
Van Wyk, “Optimal design methodology for LLC Resonant
Converter,” APEC, 2006, pp.533-538.
[6] R. Oruganti, J. Yang, and F.C. Lee, “State Plane Analysis of
Parallel Resonant Converters,” Proc. IEEE PESC ’85, 1985.
This application note based on Fairchild Semiconductor Application Note AN-4137.
Related Datasheets
FLS1800XS — Half-Bridge LLC Resonant Control IC for Lighting
FAN7346 — 4-Channel LED Current Balance Control IC
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF
THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE
UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
© 2011 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 11/16/12
www.fairchildsemi.com
17
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