AN-9750_技术文档

www.fairchildsemi.com

AN-9750

High-Power Factor Flyback Converter for LED Driver with

FL7732 PSR Controller

efficiency and simple design. FL7732 provides protection

functions such as open-LED, short-LED and over-

Introduction

temperature protection. The current-limit level is

This highly integrated PWM controller, FL7732, provides

automatically reduced to minimize the output current and

several features to enhance the performance of low-power

protect external components in short-LED condition.

flyback converters. The proprietary topology enables

This application note presents practical design consideration

for an LED driver employing Fairchild Semiconductor

PWM PSR controller FL7732. It includes designing the

transformer, selecting the components, and implementing

constant current regulation. The step-by-step design

procedure helps engineers design a power supply. The

design procedure is verified through an experimental

prototype converter. Figure 1 shows the typical application

circuit of primary-side controlled flyback converter using

FL7732 created in the design example.

simplified circuit design for LED lighting applications. By

using single-stage topology with primary-side regulation, a

LED lighting board can be implemented with few external

components and minimized cost, without requiring an input

bulk capacitor and feedback circuitry. To implement high

power factor and low THD, constant on-time control

utilizes an external capacitor connected at the COMI pins.

Precise constant-current control regulates accurate output

current across changes in input voltage and output voltage.

The operating frequency is proportionally changed by the

output voltage to guarantee DCM operation with higher

Figure 1. Typical Application Circuit

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

AN-9750

APPLICATION NOTE

D

I_D

V_IN.peak

n:1

Basic Operation

-

+

V_D

Generally, Discontinuous Conduction Mode (DCM)

operation is preferred for primary-side regulation because it

allows better output regulation. The operation principles of

DCM flyback converter are as follows:

Lm

C_O

V_OUT

I_M

-

I_DS

Q

+

Mode I

V_DS

During the MOSFET turn-on time (t_ON), input voltage

(V_IN.pk) is applied across the primary-side inductor (L_m).

Then, drain current (I_DS) of the MOSFET increases linearly

from zero to the peak value (I_pk), as shown in Figure 2.

During this time, the energy is drawn from the input and

stored in the inductor.

-

Figure 3. Mode I: Q[ON], D[OFF]

Mode II

When the MOSFET (Q) is turned off, the energy stored in

the inductor forces the rectifier diode (D) to be turned on.

MODE II

MODE III

MODE I

V_Gate

V_DS

nV_OUT

Figure 4. Mode II: Q[OFF], D[ON]

V_IN

I_M

I_D

I_DS

I_D

I_O

Figure 5. Mode III: Q[OFF], D[OFF]

V_A

While the diode is conducting, output voltage (V_OUT), together

with diode forward-voltage drop (V_F), is applied across the

secondary-side inductor and diode current (I_D) decreases

linearly from the peak value (I_pk N_P/N_S) to zero. At the end of

inductor current discharge time (t_DIS), all energy stored in the

inductor has been delivered to the output.

N_A

V_O

N_S

t_DIS

t_S

Mode III

Figure 2. Basic Function of DCM Mode Flyback

When the diode current reaches zero, the transformer

auxiliary winding voltage begins to oscillate by the

resonance between the primary-side inductor (L_m) and the

effective capacitor loaded across MOSFET (Q).

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

2

AN-9750

APPLICATION NOTE

Constant Current Regulation

OSC

The output current (I_O) can be estimated by using the peak

drain current (I_pk) of MOSFET and discharging time (t_DIS) of

inductor current because output current (I_O) is same as the

average of the diode current (I_D) in steady state. The output

current estimator identifies the peak value of the drain

current with a peak-detection circuit and calculates the

output current using the inductor discharging time and

switching period (t_S). This output information is compared

with an internal precise reference to generate error voltage

(V_COMI), which determines the duty cycle of the MOSFET in

Constant Current Mode. With Fairchild’s innovative

TRUECURRENT^®technique, the constant output current

can be precisely controlled.

V_OUT

Linear Frequency

Controller

VS

Freq.

6

V_S

Figure 8. Linear Frequency Control

When output voltage decreases, secondary diode conduction

time is increased and the linear frequency control lengthens

the switching period, which retains DCM operation in the

wide output voltage range, as shown in Figure 8. The

frequency control also lowers primary rms current with

better power efficiency in full-load condition.

t _DIS

1

2

N

1

P

S

I





V

CS



(1)

o

t _S

R

SENSE

TRUECURRENT^®calculation makes a precise output

current prediction.

nVo

Lm

T

t _DIS

3

4

Lm

n

V

O

4

3

T

4

3

t

DIS

3

n

V

O

5

Lm

5

3

5

3

T

t

DIS

Figure 6. Detection for TRUECURRENT^®Calculation

Figure 9. Primary and Secondary Current

BCM Control

The end of secondary diode conduction time is possibly over

a switching period set by linear frequency control. In this

case, FL7732 doesn’t allow CCM and the operation mode

changes from DCM to BCM. Therefore, FL7732 originally

eliminates sub-harmonic distortion in CCM.

Figure 7. TRUECURRENT^®Calculation Principle

Linear Frequency Control

As mentioned above, DCM should be guaranteed for high

power factor in flyback topology. To maintain DCM in the

wide range of output voltage, frequency is linearly changed

by the output voltage in linear frequency control. Output

voltage is detected by the auxiliary winding and resistive

divider connected to the VS pin, as shown in Figure 7.

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

3

AN-9750

APPLICATION NOTE

Protections

The FL7732 have several self-protection functions, such as

over-voltage protection, over-temperature protection, and

pulse-by-pulse current limit. All the protections are

implemented as Auto-Restart Mode.

Open-LED Protection

FL7732 protects external components, such as diode and

capacitor at secondary side, in open-LED condition. During

switch-off, the V_DDcapacitor is charged up to the auxiliary

winding voltage, which is applied as the reflected output

voltage. Because the V_DDvoltage has output voltage

information, the internal voltage comparator at the V_DDpin

can trigger output over-voltage protection (OVP), as shown

in Figure 9. When at least one LED is open-circuited, output

load impedance becomes very high and output capacitor is

quickly charged up to V_OVPx N_S/ N_A. Then switching is shut

down and the V_DDblock goes into “Hiccup Mode” until the

open-LED condition is removed, as shown in Figure 10.

Figure 11.Waveforms at Open-LED Condition

Internal

Bias

Short-LED Protection (OCP)

In case of short-LED condition, the switching MOSFET and

secondary diode are usually stressed by the high powering

current. However, FL7732 changes the OCP level in the

short LED condition. When V_Svoltage is lower than 0.4V,

OCP level changes to 0.2V from 0.7V, as shown in Figure

12 so that powering is limited and external components

current stress is relieved.

V_DDgood

+

-

VDD

4

V_OVP

Shutdown Gate Driver

S

Q

V_DDgood

R

Figure 10.Internal OVP Block

Under Voltage Lockout (UVLO)

The turn-on and turn-off thresholds are fixed internally at

16V and 7.5V, respectively. During startup, the V_DD

capacitor must be charged to 16V. The V_DDcapacitor

continues to supply V_DDuntil power can be delivered from

the auxiliary winding of the main transformer. V_DDis not

allowed to drop below 7.5V during this startup process. This

UVLO hysteresis window ensures that V_DDcapacitor

properly supplies V_DDduring startup.

Figure 12.Internal OCP Block

Figure 13 shows operational waveforms at short-LED

condition. Output voltage is quickly lowered to 0V right

after the LED-short event. Then, the reflected auxiliary

voltage is also 0V making V_Svoltage less than 0.4V. 0.2V

OCP level limits primary-side current and V_DDhiccups up

and down in between UVLO hysteresis.

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

4

AN-9750

APPLICATION NOTE

Over-Voltage Protection (OVP)

The OVP prevents damage in over-voltage conditions. If the

V_DDvoltage exceeds 23V at open-loop feedback condition,

the OVP is triggered and the PWM switching is disabled. At

open-LED condition, V_DDreaches V_{DD_OVP}. Then, auto-

restart sequence causes a delay, limiting output voltage.

Over-Temperature Protection (OTP)

The built-in temperature-sensing circuit shuts down PWM

output if the junction temperature exceeds 150°C. There is

hysteresis of 10°C.

Figure 13.Waveforms at Short-LED Condition

At short-LED condition, V_Sis low due to low output voltage.

Then, OCP level is changed to 0.2V to reduce output current.

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

5

AN-9750

APPLICATION NOTE

V

 2 V

IN.rms

(5)

IN.min.pk

Design Procedure

where the I_IN.rmsand V_IN.rmsare rms line input current and

voltage, respectively.

In this section, a design procedure a of single-stage flyback

using FL7732 is presented using the schematic of Figure 1

as a reference. An offline LED driver with 16.8W

(24V/0.7A) output has been selected as a design example.

The design specifications are as follows:

t_ONis required to calculate reasonable L_mvalue. With

Equation (2) ~ (5), the turn-on time, t_ON, is obtained as:

2L_m I_IN.rms

V_I_N.rms f_s

2

.

Input voltage range: 90 ~ 264V_ACand 50 ~ 60Hz

Nominal output voltage and current: 24V/0.7A

Minimum efficiency: 87%

t_ON



(6)

The input power is given as:

Maximum switching frequency: 65kHz

P

O

P  I_IN.rms



(7)

IN

Step 1. Inductor Selection (L_m)



FL7732 operates with constant turn-on and turn-off time, as

shown Figure 14. When MOSFET turn-on time (t_ON) and

switching period (t_S) are constant, I_INis proportional to V_IN

and can implement high power factor.

With Equation (6) and (7), the L_mvalue is obtained as:

2

 (V_IN.rms)² f_st_ON

(8)

Lm 

2P

O

(Design Example) Since the minimum input voltage is

90V_AC, the maximum t_ONoccurs at full-load condition.

Assuming the maximum t_ONis 7.4µs at 65kHz of the

maximum frequency, the magnetizing inductance is

obtained as:

2

3

6 2

)

0.8790  6510  (7.410

216.8

Figure 14.Theoretical Waveform

L



 743µH

m

The single-stage flyback using FL7732 is assumed to

operate in DCM due to constant t_ONand t_S. Input voltage is

applied across the magnetizing inductance (L_m) during t_ON

charging the magnetic energy in L_m. Therefore, the

maximum peak switch current (I_SW.pk) of MOSFET occurs at

peak point of line voltage, as shown Figure 14. The peak

input current (I_IN.pk) is also shown at the peak input voltage

of one line cycle. Once the maximum t_ONis decided, I_SW.pkof

MOSFET is obtained at the minimum line input voltage and

full-load condition as:

The maximum peak current of MOSFET at nominal output

power is calculated as:

,

7.410^6 2 90

I_{SW . pk}



1.26A

74310^6

Step 2. Sensing Resistor and n_PSSelection

Since FL7732 adopts TRUECURRENT^®Calculation

method to regulate constant output current (I_O), as defined in

equation 1. The output current is proportional to turn ratio

n_psbetween the primary and secondary windings of the

transformer and inversely proportional to sensing resistor

(R_S). The FL7732 also implements cycle-by-cycle current

limitation by detecting V_CSto protect system from output

short or overload. Therefore, V_CSlevel to handle rated

system power without the current limitation should be

considered. It is typical to set the cycle-by-cycle limit level

(typical: 0.67V) at 20~30% higher than CS peak voltage

t_ONV_{IN.min pk}

I_{SW . pk}



(2)

L_m

where V_IN.min.pkand t_ONare the peak input voltage and the

maximum turn-on time at the minimum line input voltage,

respectively.

Using equation 2, the peak input current is obtained by:

(V_CS.pk) at full-load condition. MOSFET peak current (I_SW.pk

is converted into V_CS,pkas:

)

V

1

2

IN.min.pk

(3)

(4)

I



(t

)(

t

)  f

ON

s

IN.pk

ON

L

m

V_{CS. pk} I_{SW . pk} R_S

(9)

then I_IN.pkand V_IN.min.pkcan be expressed as:

I_{IN. pk} 2  I_IN.rms

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

6

AN-9750

APPLICATION NOTE

According to Equation (1), the transformer turn ratio is

determined by the sensing resistor and nominal output

current as:

R_VS1 r  R_{VS 2}

(14)

VS

where V_VS.maxis the V_Svalue to set the maximum

switching frequency for constant output current in rated

power and V_Fis secondary diode forward voltage.

n_ps10.5 I_O R_S

(10)

where:

0.545 V_IN n_AP

1

bnk

R_VS



 (0.545 

)

(15)

2

10010^6

R_VS

1 t_DIS



1

V_CS



(11)

where V_IN.bnkand n_APare the blanking level of input

voltage and the turn ratio of auxiliary to primary,

respectively. The n_APcan be calculated as the ratio of

n_ASto n_PS.

2 t_S

10.5

(Design Example) Once V_CS,pkis set as 0.5V, the sensing

resistor value is obtained as:

(Design Example) The voltage divider network is

determined as:

V_{CS. pk}

0.5

R_S



 0.396

I_{SW .PK}1.26

(24  0.7) 0.77  2.35

n_ps10.50.70.396  2.91

R



 7.06

VS

2.35

Step 3. n_ASSelection

Once V_IN.bnklevel is set to 50V, R_VS2is obtained as.

When V_DDvoltage is 23V, FL7732 stops switching

operation due to over-voltage protection (OVP). So n_AScan

be determined as follows:

0.77

0.545 50

1

2.91

R_VS



(0.545

)

2

10010^6

7.06

V_DD.OVP

23

n_AS



(12)

 24.86k

V_O.OVPV_O.OVP

where (n_AS=N_A/N_S) is the turns ratio the of secondary to

auxiliary of transformer. Therefore, V_O.OVPcan be set by

changing the n_ASvalue.

Then R_VS1is determined to be 175.5kΩ.

It is recommended to place a bypass capacitor of 10 ~ 30pF

closely between the VS pin and the GND pin to bypass the

switching noise and keep the accuracy of the V_Ssensing for

CC regulation. The value of the capacitor affects constant-

current regulation. If a high value of V_Scapacitor is selected,

the discharge time t_DISbecomes longer and the output

current is lower, compared to small V_Scapacitor.

(Design Example) Once output over-voltage level is set as

30V, n_ASis obtained as:

23

n_AS



 0.77

30

Step 4. Resistor Selection (R_VS1and R_VS2

)

Step 5. Design the Transformer

The first consideration for R_VS1and R_VS2selection is that V_S

is 2.35V at the end of diode current conduction time to

operate at maximum switching frequency at rated power.

The second consideration is V_Sblanking, as explained

below. The output voltage is detected by auxiliary winding

and a resistive divider connected to the VS pin, as shown in

Figure 7. However, in a single-stage flyback without DC

link capacitor, auxiliary winding voltage cannot be clamped

to reflected output voltage due to the small L_mcurrent,

which induces V_Svoltage sensing error. Then, frequency

decreases rapidly at the zero-crossing point of line voltage,

which can cause flicker. To maintain constant frequency

over the whole sinusoidal line voltage, FL7732 has V_S

blanking to disable sampling of V_Svoltage at less than a

particular line voltage by sensing the auxiliary winding.

The number of primary turns is determined by Faraday’s

law. N_p,minis fixed by the peak value of the minimum line

input voltage across the primary winding and the maximum

on time. The minimum number of turns for the transformer

primary side to avoid the core saturation is given by:

V

t

IN.min .pk ON

N



(16)

p,min

B

 A

e

sat

where A_eis the cross-sectional area of the core in m²

and B_satis the saturation flux density in Tesla.

Since the saturation flux density decreases as the

temperature rises, the high-temperature characteristics

should be considered when it is used in an enclosed case.

Considering the maximum switching frequency at rated

power and V_Sblanking level, R_VS1and R_VS2are obtained as:

(V V )n V .

VS max

O

F

AS

R



(13)

VS

V

.

VS max

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

7

AN-9750

APPLICATION NOTE

(Design Example) An RM8 core is selected for the

transformer and the minimum number of turns for the

transformer primary side to avoid the core saturation is

given by:

2 907.410^6

N_p,min



 54.5T

0.276410^6

Considering the tolerance of the transformer and high

ambient temperature, N_Pshould be selected with a margin

about 5% ~ 10% to avoid core saturation:

N_p 54.51.1 59.95T

Once the turn number of the primary side (N_P) is

determined as 60T, the turn number of the secondary side

(N_S) is obtained by:

Figure 15.Drain Voltage of MOSFET

N_S 60 2.91 20.5T

(Design Example) Assuming that drain voltage overshoot

is the same as the reflected output voltage, the maximum

drain voltage across the MOSFET is calculated as:

Once the turn number of the secondary side (N_S) is

determined as 20T, the auxiliary winding turns (N_A) is

obtained by:

60

V_DS(max) 374 (24 0.7)2  522V

N_A 20 0.77 15.4T

20

The rms current though the MOSFET is

N_Ais determined to be 15T.

7.40.065

I_SW.rms1.26

 0.357A

6

Step 6. Calculate the Voltage and Current of

the Switching Devices

Secondary-Side Diode: The maximum reverse voltage and

Primary-Side MOSFET: The voltage stress of the

MOSFET was discussed when determining the transformer

turns ratio. Assuming the drain voltage overshoot is the

same as the reflected output voltage, the maximum drain

voltage is given as:

rms current of the rectifier diode are obtained as:

N_S

V_D V_O

V

(19)

(20)

in. max . pk

N_P

V

N_P

in. min . pk

N

I_D.rms I_{SW .rms}





P

V

V



(V V ) V

o F OS

(17)

DS(max)

IN.max.pk

2V_RON_S

N

S

where V_in.max.pkis the maximum line peak voltage.

The rms current (I_SW.rms) though the MOSFET is given as:

(Design Example) The diode voltage and current are

obtained as:

20

V_D 24 374 148.7V

t

 f

S

ON

(18)

60

I

 I



pk

SW .rms

6

127

60

I_D.rms 0.357



 0.991A

274.1 20

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

8

AN-9750

APPLICATION NOTE

Snubber capacitor voltage at full-load condition is given as:

V_SNV_ROV_OS

Step 7. Design RCD Snubber in Primary Side

(21)

When the power MOSFET is turned off, there is a high-

voltage spike on the drain due to the transformer leakage

inductance. This excessive voltage on the MOSFET may

lead to an avalanche breakdown and eventually failure of the

device. Therefore, it is necessary to use an additional

network to clamp the voltage. The RCD snubber circuit and

its waveform are shown in Figure 16 and Figure 17,

respectively. The RCD snubber network absorbs the current

in the leakage inductance by turning on the snubber diode

(D_SN) once the MOSFET drain voltage exceeds the cathode

voltage of snubber diode. In the analysis of snubber network,

it is assumed that the snubber capacitor is large enough that

its voltage does not change significantly during one

switching cycle. The snubber capacitor should be ceramic or

a material that offers low ESR. Electrolytic or tantalum

capacitors are unacceptable for these reasons.

The power dissipated in the snubber network is obtained as:

2

V_SN

R_SN

V_SN

1

P 

 L_lk I_PK²

 f_S

(22)

SN

2

V_SNV_RO

where L_lkis leakage inductance, V_SNis the

snubber capacitor voltage at full load, and R_SNis the

snubber resistor.

The leakage inductance is measured at the switching

frequency on the primary winding with all other windings

shorted. Then, the snubber resistor with proper rated wattage

should be chosen based on the power loss. The maximum

ripple of the snubber capacitor voltage is obtained as:

V_SN

V_SN



(23)

C_SN R_SN f_S

In general, 5 ~ 20% ripple of the selected capacitor voltage

is reasonable. In this snubber design, neither the lossy

discharge of the inductor nor stray capacitance is considered.

(Design Example) Since the voltage overshoot of drain

voltage has been determined to be the same as the

reflected output voltage, the snubber voltage is:

V_SNV_ROV_OS150V

The leakage inductance is measured as 10µH. Then the

loss in snubber networking is given as:

1

150

P  1010^61.26²

6510³

SN

2

150  75

Figure 16.Snubber Circuit

1.03W

150²

R_SN



 21.84k

1.03

To allow 7% ripple on the snubber voltage (150V):

150

C_SN



10.06nF

0.0715021.8410³6510³

Figure 17.Snubber Waveforms

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

9

AN-9750

APPLICATION NOTE

Lab Notes

1. Before modifying or soldering/desoldering the power

supply, discharge the primary capacitors through the

external bleeding resistor. Otherwise, the PWM IC may

be destroyed by external high-voltage during the process.

This device is sensitive to electrostatic discharge (ESD).

To improve the yield, the production line should be ESD

protected as required by ANSI ESD S1.1, ESD S1.4, ESD

S7.1, ESD STM 12.1, and EOS/ESD S6.1 standards.

2. In case of LED-short condition, V_DDvoltage charged

at V_DDcapacitor should touch V_DDoff level rapidly to

stop switching. Therefore, V_DDcapacitor value is

recommended under 22µF.

www.fairchildsemi.com

Rev. 1.0.3 • 5/15/12

10

AN-9750

APPLICATION NOTE

Schematic of Design example

Figure 18 shows the schematic of the 16.8W LED driver design example. RM8 core is used for the transformer. Figure 19

shows the transformer information.

Figure 18.Schematic of the FL7732 17W Design Example

Figure 19.Transformer Winding Structure

No.

Winding

Pin (S → F)

12  1

Wire

Turns

Winding Method

1

2

3

4

5

6

7

8

NP1

0.25φ

30 Ts

Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, 3-Layer

7-  8 0.5φ (TIW) 20 Ts

Insulation: Polyester Tape t = 0.025mm, 3-Layer

1  2 0.25φ 30 Ts

Insulation: Polyester Tape t = 0.025mm, 3-Layer

6  5 0.25φ 15 Ts

NS

NP2

NA

Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, 3-Layer

Specification

Remark

Inductance

Leakage

12– 2

1– 2

750µH ± 10%

60kHz, 1V

60kHz, 1V Short All Output Pins

6µH

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

11

AN-9750

APPLICATION NOTE

Bill of Materials

Item No. Part Reference

Part Number

Qty

Description

Manufacturer

1

BD1

CF1

DF06S

1

2

1

2

1

3

1

1.5A/600V Bridge Diode

104/AC275V X-Capacitor

473/AC275V X-Capacitor

103/1kV SMD Capacitor 3216

472/250V Y-Capacitor

Fairchild

Carli

2

MPX AC275V 104K

MPX AC275V 473K

C1206C103KDRACTU

SCFz2E472M10BW

KMG 470µF/35V

MPE 630V104K 14S

KMG 22µF/50V

C0805C104K5RACTU

C0805C200J5GACTU

C0805C225Z3VACTU

RS1M

3

CF2

Carli

4

CS1

Kemet

5

CY1

Samwha

Samyoung

Sungho

Samyoung

Kemet

6

CO1,CO2

C1

470uF/35V Electrolytic Capacitor

104/630V MPE Film Capacitor

22uF/35V Electrolytic Capacitor

104/50V SMD Capacitor 2012

200/50V SMD Capacitor 2012

225/25V SMD Capacitor 2012

1000V/1A Ultra Fast Recovery Diode

200V/3A, Fast Rectifier

7

8

C2

9

C3

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

C4

Kemet

C5

Kemet

DS1

Fairchild

Bussmann

Bosung

Samwha

Fairchild

Yageo

Do1

ES3D

D1

1N4003

200V/1A, General Purpose Rectifier

250V/1A Fuse

F1

SS-5-1A

LF1

R10402KT00

4mH Inductor, 10Ø

MOV1

Q1

SVC 471 D-07A

FDD5N60NZ

Metal Oxide Varistor

600V/4A, N-Channel MOSFET

10Ω SMD Resistor 3216

100kΩ SMD Resistor 3216

1Ω SMD Resistor 3216

RG1, R6

RS1,RS2

RCS1,RCS2

RCS3

RO1

R4

RC1206JR-0710L

RC1206JR-07100KL

RC1206JR-071RL

RC1206JR-072R4L

RC1206JR-0720KL

RC1206JR-07150KL

RC1206JR-0768KL

RC1206JR-0724KL

RM8 Core

Yageo

2.4Ω SMD Resistor 3216

20KΩ SMD Resistor 3216

150KΩ SMD Resistor 3216

68KΩ SMD Resistor 3216

24KΩ SMD Resistor 3216

12pin, Transformer

Yageo

R1,R2,R3

R5

Yageo

T1

TDK

U1

FL7732M_F116

Main PSR Controller

Fairchild

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

12

AN-9750

APPLICATION NOTE

Related Datasheets

FL7732 — Single-Stage PFC Primary-Side-Regulation Offline LED Driver

Reference Designs — http://www.fairchildsemi.com/referencedesign/

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS

HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE

APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS

PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or

(b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be reasonably

expected to cause the failure of the life support device or

system, or to affect its safety or effectiveness.

Rev. 1.0.3 • 5/15/12

www.fairchildsemi.com

13


型号：	AN-9750
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	High-Power Factor Flyback Converter for LED Driver with 高功率因数反激式转换器LED驱动器驱动器转换器
文件：	总13页 (文件大小：441K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AN-9750 [FAIRCHILD]

相关型号：

AN-994-1

AN-995A

AN-996

AN-CC1002

AN-E-2266A

AN-GSMQB-MMCX

AN-TL494

AN0001

AN0003

AN0005

AN0010

AN0013