MN3615 [PANASONIC]
CCD Sensor, 2V, Rectangular, Through Hole Mount, DIP-22;
| 型号： | MN3615 |
| 厂家： | 
PANASONIC |
| 描述： | CCD Sensor, 2V, Rectangular, Through Hole Mount, DIP-22 CD 传感器 换能器 |
| 文件： | 总7页 (文件大小：141K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CCD Linear Image Sensor
MN3615
2592-Bit CCD Linear Image Sensor
■ Overview
■ Pin Assignments
The MN3615 is a 2592-pixel high sensitivity CCD linear image
sensor combining photo-sites using low dark output floating
photodiodes and CCD analog shift registers for read out. It provides
large output at a high S/N ratio for visible light inputs over a wide
range of wavelength.
1
OS
DS
VDD
ø R
ø1B
ø1A
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
22
21
20
19
18
17
16
15
14
13
12
VSS
ø SG
ø 2B
ø 2A
NC
NC
NC
NC
NC
NC
NC
■ Features
• 2592 floating photodiodes and n-channel buried type CCD shift
registers for read out are integrated in a single chip.
• Use of photodiodes with a new structure has made the dark output
voltage very low.
9
10
11
• Has a smooth spectral characteristics that is close to the sensitivity
of the human eye in the entire visible region.
• Large signal output of typically 2000mV at saturation can be
obtained.
2592
• Since a compensation output pin (DS) is provided in addition to the
signal output pin (OS), it is possible to obtain a signal with a high
S/N ratio by carrying out differential amplification of the OS and
DS outputs.
(Top View)
C20
WDIP022-G-0470
• Operation with a single +12V positive power supply.
■ Application
• Graphic and character read out in fax machines,
image scanners, etc.
• Measurement of position and dimensions of
objects.
■ Block Diagram
øSG
21
ø2B
20
ø2A
19
VSS
22
2 1 2 1 2 2 1 2 1 21 2 1 2 1
1 2 1 2 1 21 2 1 2 1
1
2
1
2
1 2 1 2 1 1 2 1 2 1 2 1 2 1 2
2 1 2 1 2 1 2 1 2 1 2
B1 to B52 : Black reference pixels
D1 to D 6 : Dummy invalid pixels
3
1
2
4
5
6
øR ø1B ø1A
DS VDD
OS
CCD Linear Image Sensor
MN3615
■ Absolute Maximum Ratings (Ta=25˚C, VSS=0V)
Parameter
Symbol
VDD
Rating
Unit
Power supply voltage
Input pin voltage
– 0.3 to +17
– 0.3 to +17
– 0.3 to +17
–20 to + 60
–40 to +100
V
V
V
I
Output pin voltage
VO
Topr
Tstg
V
Operating temperature range
Storage temperature range
˚C
˚C
■ Operating Conditions
Voltage conditions (Ta=–20 to +60˚C, VSS=0V)
•
Parameter
Symbol
Condition
min
11.4
typ
max
Unit
V
VDD
Power supply voltage
12.0
13.0
VDD
0.8
Vø H
CCD shift register clock High level
CCD shift register clock Low level
Shift gate clock High level
Shift gate clock Low level
Reset gate clock High level
Reset gate clock Low level
V
V
DD -1 VDD
0.5
DD -1 VDD
0.5
VDD -1 VDD
0
Vø L
VSH
VSL
VRH
VRL
V
V
V
VDD
0.8
0
V
V
VDD
0.8
V
0
0.5
Timing conditions (Ta=–20 to +60˚C)
•
Parameter
Symbol
Condition
See timing diagram. fC=1/2T
See timing diagram. fR=1/T
min
—
—
0
typ
0.5
1.0
100
100
50
max
2.5
5.0
—
—
—
—
—
—
—
—
—
—
—
—
Unit
MHz
MHz
ns
fC
Shift register clock frequency
Reset clock frequency
Shift register clock rise time
Shift regisster clock fall time
Shift clock rise time
fR
tCr
See timing diagram
0
ns
tCf
tSr
0
ns
Shift clock fall time
0
50
ns
tSf
tSs
Shift clock set up time
Shift clock pulse width
Shift clock hold time
0
100
ns
See timing diagram
tSw
tSh
tRr
200
0
1000
100
20
ns
ns
ns
ns
ns
ns
ns
Reset clock rise time
0
tRf
Reset clock fall time
0
20
See timing diagram
tRs
Reset clock set up time
Reset clock pulse width
Reset clock hold time
0.7T
40
10
—
tRw
tRh
250
250
MN3615
CCD Linear Image Sensor
■ Electrical Characteristics
Clock input capacitance (Ta=–20 to +60˚C)
•
Parameter
Symbol
C1A ,C2A
Condition
min
—
typ
450
10
max
—
Unit
pF
Shift register clock input capacitance
Shift register final stage clock input capacitance
Reset clock input capacitance
Shift clock input capacitance
C1B,C
CR
=12V
2B
VIN
—
—
pF
=1MHz
f
—
10
—
pF
150
pF
CS
—
—
DC characteristics
•
Parameter
Symbol
IDD
Condition
Condition
min
—
typ
5
max
12
Unit
mA
=+12V
VDD
Power supply current
AC characteristics
•
Parameter
Symbol
tOS
min
—
typ
50
max
—
Unit
ns
Signal output delay time
■ Optical Characteristics
<Inspection conditions>
• Ta=25˚C, VDD=12V, V H=VSH=VRH=12V (pulse), fC=0.5MHz, fR=1MHz, Tint (accumulation time)=10ms
ø
• Light source: Daylight type fluorescent lamp
• Optical system: A slit with an aperture dimensions of 20mm × 20mm is used at a distance of 200mm from the sensor (equivalent
to F=10).
• Load resistance = 100k Ohms
• These specifications apply to the 2592 valid pixels excluding the dummy pixels D1 to D6.
Parameter
Responsivity
Symbol
R
Condition
min
3.6
—
typ
4.6
—
max
5.6
10
Unit
V/lx· s
%
PRNU
O/E
Photo response non-uniformity
Odd/even bit non-uniformity
Saturation output voltage
Saturation exposure
Note 1
Note 2
Note 3
Note 3
%
—
—
3
V
VSAT
SE
1.4
0.25
—
2.0
0.44
0.2
0.1
—
—
lx·s
mV
mV
—
VDRK
DSNU
STTE
ZO
Dark signal output voltage
Dark signal output non-uniformity
Shift register total transfer efficiency
Output impedance
Dark condition, see Note 4
Dark condition, see Note 4
1.0
2.0
—
—
92
%
—
—
1
kΩ
DR
Dynamic range
Note 5
Note 6
Note 6
Note 6
—
10000
4.5
4.5
20
—
VOS
Signal output pin DC level
Compensation output pin DC level
Signal and compensation output pin DC level difference
3.5
3.5
—
6.0
6.0
100
V
V
VDS
– VDS
VOS
mV
CCD Linear Image Sensor
MN3615
■ Optical Characteristics (continued)
Note 1) The photo response non-uniformity (PRNU) is defined by the following equation, where Xave is the average output voltage
of the 2592 valid pixels and ∆x is the absolute value of the difference between Xave and the voltage of the maximum (or
minimum) output pixel, when the surface of the photo-sites is illuminated with light having a uniform distribution over the
entire surface.
x
Xave
×100 (%)
PRNU=
The incident light intensity shall be 50% of the standard saturation light intensity.
Note 2) The odd/even bit non-uniformity (O/E) is defined by the following equation, where Xave is the average output voltage of
the 2592 valid pixels and Xn is the output voltage of the ‘n’th pixel, when the surface of the photo-sites is illuminated with
light having a uniform distribution over the entire surface.
2047
∑ | Xn–Xn+1 |
n=1
O/E=
×100 (%)
2047 × Xave
In other words, this is the value obtained by dividing the average of the output difference between the odd and even pixels
by the average output voltage of all the valid pixels. The incident light intensity shall be 50% of the standard saturation
light intensity.
Note 3) The Saturation output voltage (VSAT) is defined as the output voltage at the point when the linearity of the photoelectric
characteristics cannot be maintained as the incident light intensity is increased. (The light intensity of exposure at this
point is called the saturation exposure.)
Note 4) The dark signal output voltage (VDRK) is defined as the average output voltage of the 2592 pixels in the dark condition at
Ta=25˚C and Tint=10ms. Normally, the dark output voltage doubles for every 8 to 10˚C rise in Ta, and is proportional to
Tint.
The dark signal output non-uniformity (DSNU) is defined as the difference between the maximum output voltage among
all the valid pixels and VDRK in the dark condition at Ta=25˚C and Tint=10ms.
VDRK
DSNU
Note 5) The dynamic range is defined by the following equation.
VSAT
DR=
VDRK
Since the dark signal voltage is proportional to the accumulation time, the dynamic range becomes wider when the
accumulation time is shorter.
Note 6) The signal output pin DC level (VOS) and the compensation output pin DC level (VDS) are the voltage values shown in the
following figure.
Reset feed
through level
DS
OS
VSS
V
DS
V
OS
VSS
MN3615
CCD Linear Image Sensor
■ Pin Descriptions
Pin No.
1
Symbol
Pin name
Condition
OS
DS
VDD
øR
Signal output
2
Compensation output
Power supply
3
4
Reset clock
5
ø1B
ø1A
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
ø2A
ø2B
CCD Final stage clock (Phase 1)
CCD Clock (Phase 1)
Non connection
6
7
8
Non connection
9
Non connection
10
11
12
13
14
15
16
17
18
19
20
21
22
Non connection
Non connection
Non connection
Non connection
Non connection
Non connection
Non connection
Non connection
Non connection
CCD Clock (Phase 2)
CCD Final stage clock (Phase 2)
Shift gate clock
øSG
VSS
Ground
Note) Connect all NC pins externally to VSS.
■ Construction of the Image Sensor
The MN3615 can be made up of the three sections of—a) photo
detector region, b) CCD transfer region (shift register), and c)
output region.
transferred to the CCD transfer for each odd and even pixel
at the timing of the shift clock (øSG). The optical signal
electric charge transferred to this analog shift register is
successively transferred out and guided to the output region.
• A buried type CCD that can be driven by a two phase clock
(ø1, ø2) is used for the analog shift register.
a) Photo detector region
• The photoelectric conversion device consists of an 8µm
floating photodiode and a 3µm channel stopper for each
pixel, and 2592 of these devices are linearly arranged side by
side at a pitch of 11µm.
c) Output region
• The signal charge that is transferred to the output region is
sent to the detector where impedance transformation is done
using two source follower stages.
• The photo detector's windows are 11µm × 11µm squares and
light incident on areas other than these windows is optically
shut out.
• The DC level component and the clock noise component not
containing optical signals are output from the DS pin.
• By carrying out differential amplification of the two outputs
OS and DS externally, it is possible to obtain an output signal
with a high S/N ratio by reducing the clock noise, etc.
• The photo detector is provided with 52 optically shielded
pixels (black dummy pixels) which serve as the black
reference.
b) CCD Transfer region (shift register)
• The light output that has been photoelectrically converted is
CCD Linear Image Sensor
MN3615
■ Timing Diagram
(1) I/O timing
Integration Time (Tint.)
ø SG
ø1
ø2
øR
1
2
3
4
6
7
8
9 10 11 58 59 60 61 62 63 64 65 66 2654 2656 2658
2655
2657
DS
OS
1
2
3
4
6 7 8
B B
B
B
52
51
1
2
50B
Note)
Repeat the transfer
pulses (cp) for
more than 1330
periods.
2591
2592
D
D
3
D
D
6
1
2 3
1D
4 D
Black reference
pixel signal
2
5
Blank feed
(for 8 pixels)
(for 52 pixels)
Invalid pixel signal
(for 3 pixels)
Invalid pixel signal
(for 3 pixels)
90%
(2) Drive timing
ø1
ø2
10%
tCf
90%
50%
10%
tCr
tRS
tRh
90%
tSr
tSf
øR
DS
OS
50%
10%
90%
10%
tRr tRW tRf
øSG
tOS
90%
Reference level
Signal output voltage
ø1
tSs
tSW
tSh
90%
■ Graphs and Characteristics
Photoelectric Conversion Characteristics
Spectral Response Characteristics
100
10 3
Under standard
operating condition
Characteristics under standard
operating condition
Light source: Daylight
fluorescent lamp
80
60
40
20
0
10 2
10
10 –2
10 –1
500
600
700
800
400
Exposure (lx·s)
Wavelength (nm)
MN3615
CCD Linear Image Sensor
■ Drive Circuit Diagram (Digital Section)
DS0026CN × 2
(Q11 and Q13 are for extension
during high speed operation.)
1kΩ × 4
R14
Q1
Xtal 0SC.
Q1
LS04
2
1
Q
LS37
10
6
4
6
7
2
4
4
2
(ø2B
)
8
6
16
Q
14
8
7
4
1
2
1
15
7
10
R4
3
5 100pF × 4
+
3
C
1
Q2
C3
C4
C5
C6
Q3
1/2
LS76-
15
8
15µF
C
2
R15
LS161
4.7kΩ
× 4
1
1
3
R1
1
4
5
3
5
1
3
8
(ø2A
)
2
Q
0.01µF 16.0MHz
R2
R3
R16
3
1
2
3
4 C
9
Q13
12
8
C
11
6
10
6
5
1
3
Q8
ø1
10
2
Q12
Q16
0.01µF
0.01µF
11
12
R17
8
12
13
4
11
6
ø1
(ø1A
5
1
3
8
4
5
1
13
3 INT
Q3
)
Q9
CP13
10
12
11
Q3
R18 1kΩ
2
EXT
6
9
Q14
1/2
Q4 LS37
EXT
8
SP
6
7
Q1
9 LS76- 10
10
6
C20 10Ω
12
Q
C
7
100pF
4
2
INT
LS04
øR
Q7
4
R19
8
Q3
1kΩ
5
7
12
6
11
5
8
3
9
øSG
13
C21
8
10Ω
1
3
C
8
Q15
C9
2200pF
100pF DS0026CN
TRIGGER
1
2
1
2
9
1
2
2
9
14
9
1
9
6
+5V
15 R13
10
10
7
10
7
15
15
15
10
1
2
Q4
LS161
Q5
Q6
Q7
+
4.7kΩ × 4
C
C
18
0.01µF
R5
180Ω
R12
17
7
7
3
LS161
LS161
LS161
C
10
470pF 15µF
4.7kΩ
R8 R9
4.7kΩ
3
4
5
6
4
5
6
4
5
5
6
4
3
3
R10
R7
Connect a 0.01µF capacitor between
the VCC and GND pins of each TTL
IC (C29 to C38).
Supply the power supply to Pin 6
(VDD) of each of the ICs Q11 to Q15
via the following circuit.
(R22 to R26)
•
R6
R11
1
2
3
4
4.7kΩ
1
2
3
4
C
4.7kΩ
16
C13
0.01µF
0.01µF
•
Q17
C
C
15
Q18
14
0.01µF
0.01µF
+12V
10Ω
+
15µF
0.01µF
(C19 to C28)
■ Drive Circuit Diagram (Analog Section)
R27
+12V
10Ω
+
+
C
58
C
41
0.01µF
0.01µF
C
C
C
40
15µF
59
44
C
48
C
45
15µF
15µF
15µF
0.01µF
+
R30
10Ω
C
49
R36
100Ω
Q20
0.01µF
ø R
2SC828A
10Ω
R34
(ø )
1B
J1
100Ω
ø
(ø1 )
OS output
1A
100Ω
11 10
9
8
7
6
5
4
3
2
1
R37
1kΩ
1A 1B ø R DDDSOS
MN3615
R38
1kΩ
2B SG SS
2A
12 13 14 15 16 17 18 19 20 21 22
DS output
R41
1kΩ
øSG
ø2
Q21
R35
100Ω
10Ω
(ø )
2A
J2
100Ω
(ø )
2B
R39
100Ω
(Remove the jumper wires J1 and J2 when
extensively adding DS0026CN ICs.)
2SC828A
C51 0.01µF
+
R45
100Ω
The drive circuit shown here is sample drive circuit when evaluating the
MN3615 in the first stage and any other drive circuit can be used as long
as the operating conditions are satisfied.
•
C50
15µF
相关型号：
MN3674
Color CCD Linear Image Sensor with 512 Pixels for R and B Colors/1024 Pixels for G Color
PANASONIC
©2020 ICPDF网 联系我们和版权申明