MN3662 [PANASONIC]
Analog Circuit, 1 Func, CDIP22, DIP-22;
| 型号： | MN3662 |
| 厂家： | 
PANASONIC |
| 描述： | Analog Circuit, 1 Func, CDIP22, DIP-22 CD |
| 文件： | 总6页 (文件大小：130K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CCD Linear Image Sensor
MN3662
3648-Bit High-Resolution CCD Linear Image Sensor
■ Overview
■ Pin Assignments
The MN3662 is a high responsivity CCD linear image sensor having
floating photodiodes in the photodetector region, CCD analog shift
registers for read out.
OS
NC
NC
NC
NC
ø R
1
2
1
2
3
4
5
22
21
20
19
18
17
16
15
14
13
12
DS
NC
NC
VDD
NC
OG
VSS
ø 1B
ø 2B
IS
It provides large output at a high S/N ratio for visible light inputs over
a wide range of wavelength.
3
■ Features
4
• 3648 floating photodiodes and n-channel buried type CCD shift
registers for read out are integrated in a single chip.
5
6
High blue responsivity of a maximum responsivity ratio of 40%
(typ.) at 400nm, and smooth spectral response over the entire
visible region.
•
NC
ø 1A
ø 2A
NC
PG
7
8
9
Large signal output of 1500mV (typ.) at saturation, and hold type
combined odd/even output that makes signal processing easy.
24 Black dummy bits and low optical response (typ. 1%) at the
areas other than the photodetector region.
•
•
3646
3647
3648
10
11
ø SG
• Operation with a single +12V positive power supply.
(Top View)
C21
WDIP022-G-0450
■ Application
Reading out drawings, characters and numerals in
•
image scanners, OCRs, etc.
• Measurement of position and dimensions of
objects.
■ Block Diagram
OG
17
V
16
ø 1B
15
ø 2B
14
IS
13
VDD
19
DS
22
SS
2 1 2 1 2 1 2 1 2 1 21 2 1 2 1 2
1 2 1 21 2 1 2 1
1
2
12
11
ø SG
PG
Black
dummy
1
2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 21
2 1 2 1 2 1 2 1 2
1
6
8
9
ø 2A
OS
øR
ø 1A
B1 to B24 : Black dummy pixels
MN3662
CCD Linear Image Sensor
■ Absolute Maximum Ratings (Ta=25˚C, VSS=0V)
Parameter
Symbol
VDD
Rating
Unit
Power supply voltage
Input pin voltage
– 0.3 to +17
– 0.3 to +17
– 0.3 to +17
–20 to + 60
–40 to +100
V
V
V
I
Output pin voltage
VO
Topr
Tstg
V
Operating temperature range
Storage temperature range
˚C
˚C
■ Operating Conditions
Voltage conditions (Ta=–25 to + 60˚C, VSS=0V)
•
Parameter
Symbol
VDD
Condition
min
typ
12.0
12.0
4.5
max
Unit
V
Power supply voltage
IS test pin voltage
11.2
11.2
4.2
12.8
12.8
4.8
VIS
V =V
V
IS
DD
Photo storage gate voltage
VPG
VOG
Vø H
V
VDD=12V
VDD=12V
Output gate voltage
4.2
9.0
0
4.5
10.0
0.5
4.8
12.0
0.8
V
V
V
V
V
V
V
CCD shift register clock High level
CCD shift register clock Low level
Reset gate clock High level
Reset gate clock Low level
Shift gate clock High level
Shift gate clock Low level
Vø
L
VRH
VRL
VSH
VSL
9.0
0
10.0
0.5
12.0
0.8
9.0
0
10.0
0.5
12.0
0.8
Timing conditions (Ta=–25 to + 60˚C)
•
Parameter
Symbol
fC
Condition
min
0.1
0.2
0
typ
—
max
1.0
2.0
200
200
10.0
100
10
Unit
MHz
MHz
ns
fC =1/2T
fR =1/T
Shift register clock frequency
Reset clock frequency
Shift clock rise time
fR
—
tSr
15
See timing diagrams (1) to (3).
tSf
tSs
tSW
tSh
tCr
tCf
tRr
tRf
tRw
tRs
tRh
tOS
Shift clock fall time
0
15
ns
Shift clock set up time
Shift clock pulse width
Shift clock hold time
0
0.03
12
µs
10
0
µs
0.5
20
µs
Shift register clock rise time
Shift register clock fall time
Reset clock rise time
0
200
200
30
ns
0
20
ns
0
15
ns
30
Reset clock fall time
0
15
ns
120
—
Reset clock pulse width
Reset clock set up time
Reset clock hold time
Output signal set up time ✽
✽ OS output level=300mV
30
200
0
60
ns
400
5
ns
60
ns
—
120
—
ns
■ Electrical Characteristics
DC characteristics (Ta=0 to + 60˚C)
•
Parameter
Symbol
IDD
Condition
VIN =+12V
min
—
typ
10
—
—
max
25
Unit
mA
µA
Power supply current
IPG
Photostorage gate pin leak current
Output gate pin leak current
—
50
VIN =+5V
50
IOG
—
µA
MN3662
CCD Linear Image Sensor
Clock input capacitance (Ta=–20 to + 60˚C)
•
Parameter
Symbol
C1, C2
Condition
min
—
typ
500
10
max
Unit
pF
Shift register clock input capacitance
Reset clock input capacitance
Shift clock input capacitance
—
—
—
VIN =12V
f=1MHz
—
pF
CR
CS
—
150
pF
■ Optical Characteristics (Ta=25˚C, Normal operating condition, fR=1MHz, Tint. (acccumulation time)=10ms)
Parameter
Symbol
Condition
min
1000
1.30
1000
—
typ
1500
1.95
—
max
—
Unit
mV
lx · s
mV
%
Saturation output voltage
Saturation exposure
V
SAT
(Note 1)
(Note 1)
(Note 2)
(Note 3)
(Note 4)
(Note 5)
(Note 6)
(Note 7)
(Note 8)
SE
VSEmin.
PRNU
BNU
O/E
—
1400
20
Minimum saturation exposure output voltage
Photoresponse non-uniformity
Bit non-uniformity
exposure: 1.31x · s
exposure: 1.31x · s
exposure: 1.31x · s
exposure: 1.31x · s
Dark condition
—
±10
5
—
—
%
Odd/even bit non-uniformity
Dark signal output voltage
Shift register total transfer efficiency
Modulation transfer function
1
%
—
Vd
—
—
mV
%
10
92
STTE
MTFR
—
exposure: 1.31x · s
99
76
—
—
%
• Optical system: Light source = G-54 green fluorescent lamp (peak wavelength=543nm), using a slit of size 40mm × 40mm.
Distance between slit and sensor = 200mm (equivalent to F=5)
•
Inspected by the output from a unity gain differential amplifier to which the OS and DS are input (input impedance=100kΩ or more)
pecifications apply to the 3648 valid pixels excluding the dummy pixels D1 to D4.
• These s
Note 1) Saturation output voltage: This is the output voltage at the point beyond which it is not possible to maintain the linearity of
the photoelectric conversion characteristics as the exposure is increased. (The exposure at this point is called the
saturation exposure.)
Note 2) Minimum saturation exposure output voltage: This is the output voltage at the minimum specified value (1.3lx· s) of the
saturation exposure. It is possible to calculate the responsivity from this parameter. That is,
Responsivity (minimum value) = 1.0V/1.3lx· s = 0.77V/lx·s
Responsivity (maximum value) = 1.4V/1.3lx· s = 1.08V/lx· s
The responsivity when a daylight type flourescent lamp is used as the light source will be about 1.5 times the responsivity
when the G-54 green fluorescent lamp is used.
Note 3) Photoresponse non-uniformity (PRNU): This is defined by the following equation where the difference between the
maximum and minimum values in the output of all the 3648 active pixels is denoted by ∆x when the photodetector region
is illuminated by a light of uniform illumination intensity distribution, and the average value of the output voltage from all
the 3648 pixels is denoted by Xave.
.
x
Xave
×100 (%)
PRNU=
Note 4) Bit non-uniformity: This is defined by the following equation where the output voltage of each pixel among the 3648
pixels is denoted by Xi (i = 1 to 3648) when the photodetector region is illuminated by a light of uniform illumination
intensity distribution, and the average output voltage of the pixels near the ith pixel is denoted by Xlocal-ave. (a total of 20
pixels with 10 pixels before and 10 pixels after that pixel). Here, the max. operation consists of comparing with the
absolute value and assigning the sign of the numerator.
Xi – Xlocal-ave.
Xlocal-ave.
BNU=max. (
)
×100 (%)
Note 5) Odd-even bit non-uniformity: This is defined by the following equation where the average output voltage of the 1824 even
numbered pixel photodiodes is denoted by Xeven-ave., the average output voltage of the 1824 odd numbered pixel
photodiodes is denoted by Xodd-ave., and the average output voltage of all the 3648 pixels is denoted by Xave., when the
photodetector region is illuminated by a light of uniform illumination intensity distribution.
| X even-ave. – X odd-ave.
Xave.
|
O/E=
×100 (%)
Note 6) Dark signal output voltage: This is the maximum value of the outputs from the 3648 valid pixels in the dark condition with
Ta=25˚C and Tint. = 10ms. The dark signal output voltage normally gets doubled with an increase of about 8 to 10˚C in Ta,
and is proportional to Tint.
.
Note 7) Shift register total transfer efficiency: This is given by the following equation where the average output voltage of all the
3648 pixels is denoted by Xave. and the larger of the output voltages of the 2 dummy pixels following the dummy pixel D4
is denoted by Xr when the photodetector region is illuminated by a light of uniform illumination intensity distribution.
Xave. – Xr
Xave.
STTE=
×100 (%)
MN3662
CCD Linear Image Sensor
Note 8) Modulation transfer function: This is defined by the following equation where the average output voltages from the pixels
with the white pattern and the pixels with the black pattern are respectively denoted by VW and VB when a black and white
stripe pattern (in which the black and white patterns alternate at every pixel) is projected on the photodetector region in
phase (equivalent to the Nyquist spatial frequency).
VW –V B
VW +VB
MTFR =
× 100 (%)
This value is a measure of resolution of the sensor.
This parameter is not a guaranteed value but is merely a reference value.
■ Pin Descriptions
Pin No.
1
Symbol
OS
NC
NC
NC
NC
øR
Pin name
Condition
Signal output
2
Non connection
Non connection
Non connection
Non connection
Reset clock
3
4
5
6
7
NC
ø1A
ø2A
NC
PG
øSG
IS
Non connection
8
CCD shift register clock
CCD shift register clock
Non connection
Photo storage gate
Shift gate clock
Test pin
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Connect externally to VDD
.
ø2B
CCD shift register clock
CCD shift register clock
Ground
ø1B
VSS
OG
NC
VDD
NC
NC
DS
Connected to the substrate.
Output gate
Non connection
Power supply
Non connection
Non connection
Compensatin output
Note) Connect all NC pins externally to Ground.
■ Construction of the Image Sensor
The MN3662 can be made up of the three sections of—a) photo
detector region, b) CCD transfer region (shift register), and c)
output region.
transferred respectively to the odd and even CCD transfer
region at the timing of the shift gate electrode ( ), the
øSG
photoelectric converted output transferred to this analog shift
register is transferred successively to the output region.
a) Photo detector region
• The photoelectric conversion device consists of a 5µm
floating photodiode and a 3µm channel stopper for each
pixel, and 3648 of these devices are linearly arranged side by
side at a pitch of 8µm.
buried type CCD that can be driven by a 2-phase clock is
• A
used as the analog shift register.
c) Output region
The signal transferred to this region is sent to the detector
region and is output after impedance conversion by a two
stage source follower amplifier.
•
• The photo detector's windows are 8µm × 8µm squares and
light incident on areas other than these windows is optically
shut out.
Evaluation board
• The photo detector is provided with 24 optically shielded
pixels which serve as the black reference.
The placement of the each component is very important in order
to get a good output signal. The evaluation board BS801 is
available for evaluating the MN3662.
b) CCD Transfer region (shift register)
The optical output after photoelectric conversion is
•
MN3662
CCD Linear Image Sensor
■ Timing Diagram
(1) I/O timing
Integration Time (Tint.)
ø SG
ø 1
ø 2
ø R
1
2
3
4
5
6
7
26 27 28 29 30 31 32 33
3676 3678 3680 3682 3684 3686
DS
OS
B B B3 B B
23 24
1
2
Note)
Repeat the transfer
pulses (ø1 , ø2) for
more than 1848
periods.
3644 3646
3645
D3 D4
3648
3647
D1 D2 1
2
3
4
90%
10%
(2) Drive timing
(3) Timing condition
measuring circuit
ø1
tCf
tCr
90%
50%
10%
ø2
50%
C1
ø1A
tRW
tRS
tRh
50%
C12
ø2A
90%
50%
10%
tSr
tSf
øR
DS
OS
C2
Drive
90%
50%
10%
circuit
C3
tRr
tOS
tRf
øSG
ø SG
T
C4
ø R
C1=C2=C12=680pF
C3=150pF
C4=10pF
50%
ø1
50%
90%
tSs
tSW
tSh
Reference level
tOw
■ Graphs and Characteristics
Photoelectric Conversion Characteristics
Spectral Response Characteristics
10 3
1.0
Characteristics under standard
operating condition
Under standard
operating condition
Light source: Green
fluorescent lamp
10 2
0.5
10
10 –2
0
10 –1
Exposure (lx · s)
1
400
500
600
700
800
900
1000
1100
Wavelength λ (nm)
MN3662
CCD Linear Image Sensor
■ Drive Circuit Diagram (Digital Section)
22pF
R2
VR I
10Ω × 4
100pF × 4
6
50kΩ
Q
C5
5
4.7kΩ
C
2
0.1µF
26
9
R11
LS37 8
2
7
4.7kΩ
R
C
ø 2
EXT
INT
16
6
7
R5
1kΩ × 4
C6
15
10
Q
LS76
1/2
220pF
C1
LS123
1
9
CP
DS0026CN
Q 14
Q3
Q
4
2
4
15
13
14
12
13
R12
R13
LS3711
LS37 6
5
7
12
4
2
1
ø 1
1/2Q
Q
3
LS04 3
R6
C7
LS123
1/2
3
3
Q
10
1
4
5
ø R
R7
Q
R4
33kΩ
DS0026CN
R3
4.7kΩ
C
Q4
12
11
8
C
1000pF
100pF
4
1
2
R14
LS37 3
10
9
8
5
4
13
C
3
ø SG
3pF
6
7
R8
9
LS04
15
13
6
14
Q11
33Ω
R 9
C
5
1
+12V
Q
+
LS123
1/2
C
10
C9–
15µF
LS123
0.01µF
12
1/2
100Ω
R10
INT
Q2
SP
TRIGGER
3
Q2
EXT
LS04
+ 5V
+
–
Q4
2
2
9
6
2
3
9
2
9
9
C
C
11
12
5
15
15
16
15
16
10
15
16
10
10
LS161
Q6
LS161
LS161
Q8
LS161
Q9
0.01µF
6
15µF
16
6
Q7
R27
R37
R38
3
4
5
6
3
4
5
4
5
6
3
4
5
R40
R41
R43
R42
LS04
4.7kkΩ × 2
4.7kΩ
× 3
4.7kΩ
× 3
R39
Q
Q
17
C29
16
C27
C
28
0.01µF
0.01µF
0.01µF
■ Drive Circuit Diagram (Analog Section)
R15
R16
6.8kΩ
C
R17
R18
+12V
1.8kΩ
2.2kΩ
10Ω
+
+
+
C
15µF
C
13
15
17
15µF
15µF
C
C
18
14
C16
C
20
C
19
0.01µF
0.01µF
0.01µF
15µF
0.01µF
+
R29
R
19
100Ω
ø 2
ø R
10Ω
R28
Q
14
C23 1pF
2SC828A
100Ω
R35
100Ω
R32 68kΩ
R30
10kΩ
R26
10kΩ
11 10
9
8
7
6
5
4
3
2
1
OS
7
2
3
–
PG 2A 1A
ø R
R34
100Ω
Q15
2SC828A
6
CA3100T
MN3662
Q
12
R24
10kΩ
+
SGIS 2B 1B
OG DD
12 13 14 15 16 17 18 19 20 21 22
DS
4
R31
VIDEO
OUTPUT
ø SG
10kΩ
R36
10kΩ
Q13
R22
R33
68kΩ
2SC828A
ø 1
C
1pF
24
100Ω
R23
100Ω
C
22
C21
15µF
R25
0.01µF
–12V
10Ω
+
©2020 ICPDF网 联系我们和版权申明