MN3672RE_技术文档

CCD Linear Image Sensor

MN3672RE^{(Preliminary)}

Color CCD Linear Image Sensor

with 5000 Bits each for R, G, and B Colors

■ Overview

■ Pin Assignments

The MN3672RE is a high speed high responsivity CCD color linear

image sensor with 5000 pixels for each of the colors R, G, and B.

This device consists of a photodetector region having low dark output

floating photodiodes and a CCD analog shift register in the read out

region.

◆ identiffies

the Pin 1

position.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

OS₃

DS

OS₁

OS₂

V_DD

ø _SG1

V_SS

ø _R

NC

ø _2A

ø _1A

ø _1B

ø _2B

ø_2C

ø _1C

ø_1D

ø_2D

SUB

NC

V

SS

It is possible to read out an A3 size color document with a high

quality and a high resolution of 400dpi.

ø _SG3

V

SS

ø _1L

NC

ø _2H

ø _1H

ø _1G

ø _2G

ø _2F

ø _1F

ø_1E

ø _2E

NC

ø _SG3

ø _SG2

■ Features

5000 floating photodiodes for each color R, G, and B, and an n-

channel buried type CCD shift registers for read out are integrated

in a single chip.

•

Since the photodiode lines for each color are neighboring (with a

line spacing of 14µm), it is possible to greatly reduce the memory

for compensation between lines.

The configuration of the signal processing circuits such as the

preamplifier, sample and hold circuit, etc., becomes simpler since

the separate signal output pins are provided for the pixels of each of

the colors R, G, and B.

V

SS

RGB primary colors type on chip color filters are used for color

separation.

•

V

SS

ø _SG1

The dark signal output voltage has been suppressed to a very low

level due to the use of photodiodes with a new structure. (0.2mV

(typ.) at accumulation time of 10ms.)

5000

(Top View)

• Large signal output of typically 1.0V at saturation can be obtained.

• Operation with a single +12V positive power supply.

C24

WDIP040-C-0400

■ Application

• Color graphic read out in color copying machines, color scanners,

and color fax machines.

MN3672RE (Preliminary)

CCD Linear Image Sensor

■ Block Diagram

OS₃DS

40 39

V

ø_SG3

V

ø_1Lø_2Hø_1Hø_1Gø_2Gø _2Fø_1Fø_1Eø_2E

ø_SG3ø_SG2

22 21

SS

38 37 36 35 33 32 31 30 29 28 27 26

CCD analog shift register 3

Photodiode (Blue)

Photodiode (Red)

Photodiode (Green)

CCD analog shift register 1

CCD analog shift register 2

B_R,B_B,B_G:

Black reference pixels

(24 pixels each)

D_R,D_B,D_G:

Dummy invalid pixels

(6 pixels each)

1

2

3

4

5

6

8

9

10 11 12 13 14 15 16 18 19 20

ø_2Cø_1C

ø

ø_2D

ø_SG1

OS₁OS₂

V

_DDø_SG1

V

ø_Rø _2Aø_1Aø _1Bø_2B

SUB V

V

SS

1D

SS

■ Absolute Maximum Ratings (Ta=25˚C, V_SS=0V)

Parameter

Symbol

V_DD

Rating

Unit

V

– 0.3 to +17

0 to + 60

Power supply voltage

Input pin voltage

V

I

V

Output pin voltage

V_O

T_opr

T_stg

V

Operating temperature range

Storage temperature range

˚C

–25 to + 85

■ Operating Conditions

Voltage conditions (Ta=0 to + 60˚C, V_SS=0V)

•

Parameter

Symbol

V_DD

Condition

min

typ

12.0

10.0

0.5

max

13.0

11.0

0.8

Unit

V

Power supply voltage

11.0

—

0

V_{ø H}

CCD shift register clock High level

CCD shift register clock Low level

(ø_1A~ ø_1L, ø_2A~ ø_2H

)

V

V_{ø L}

V_S1H

V_S2H

V_S3H

V_SL

V

_{ø H}+2

10.0

4.0

(ø_SG1

(ø_SG2

(ø_SG3

)

V

—

9.0

—

0

—

11.0

—

V

Shift gate clock High level

V

(ø_SG1~ ø_SG3

(ø_R)

)

V

0.5

0.8

Shift gate clock Low level

Reset gate clock High level

Reset gate clock Low level

V_RH

V_RL

V

–1

V_DD

0.5

V_DD

0.8

DD

(ø_R)

V

0

CCD Linear Image Sensor

MN3672RE (Preliminary)

Timing conditions (Ta=0 to + 60˚C)

•

Parameter

Symbol

f_C

Condition

min

0.1

0

typ

1.0

10

max

5.0

20

Unit

MHz

ns

Shift register clock frequency

Reset clock frequency (=data rate)

Shift register clock rise time

Shift register clock fall time

Shift clock 1 rise time

Shift clock 1 fall time

See drive timing diagram (2) f_C=1/2T

See drive timing diagram (2) f_R=1/2T

f_R

t_Cr

See drive timing diagram (2) f_R=1/2T

0

10

20

ns

t_Cf

t_SG1r

t_SG1f

t_SG1s

0

20

50

ns

0

20

50

ns

µs

Shift clock 1 set up time

Shift clock 1 pulse width

Shift clock 2 rise time

Shift clock 2 fall time

See drive timing diagram (1)

µs

t_SG1w

t_SG2r

t_SG2f

t_SG2w

t_SG3r

t_SG3f

t^SG3s

t_SG3w

t_SG3h

0

15

50

ns

µs

Shift clock 2 pulse width

Shift clock 3 rise time

Shift clock 3 fall time

See drive timing diagram (1)

0

20

50

ns

µs

Shift clock 3 set up time

Shift clock 3 pulse width

Shift clock 3 hold time

Reset clock rise time

µs

See drive timing diagram (1)

0

5

10

ns

t_Rr

t_Rf

Reset clock fall time

t_Rs

t_Rw

t_Rh

See drive timing diagram (2)

Reset clock set up time

Reset clock pulse width

Reset clock hold time

0.7T

10

■ Electrical Characteristics

Clock input capacitance (Ta=0 to + 60˚C)

•

Parameter

Symbol

Condition

min

—

typ

max

—

Unit

pF

C_1A, C_1B

C_1C, C_1D

C_2A, C_2B

C_2C, C_2D

Shift register clocks A to D

input capacitance

160

C_1E, C_1F

C_1G, C_1H

C_2E, C_2F

C_2G, C_2H

Shift register clocks E to H

input capacitance

120

pF

V_IN=12V, f=1MHz

—

C_1L

C_RS

Shift register final stage clock input capacitance

Reset clock input capacitance

Shift clocks 1, 3 input capacitance

Shift clock 2 input capacitance

—

10

—

pF

C_SG1, C_SG3

C_SG2

150

250

DC characteristics

•

Parameter

Symbol

I_DD

Condition

min

—

typ

15

max

—

Unit

mA

Power supply current

V_DD=+12V

AC characteristics

•

Parameter

Symbol

t_OS

min

—

typ

50

max

—

Unit

ns

Signal output delay time

MN3672RE (Preliminary)

CCD Linear Image Sensor

■ Optical Characteristics

• Ta=25˚C, V_DD=12V,

Pulse: V_ø_H=10V, V_RH=12V, V_S1H=12V, V_S2H=10V, V_S3H=4V, f_C=f_R=1MHz, T_int(accumulation time)=10ms

• Light source: A light source with IR cutting filter (CM-500S)

• Optical system: A slit with an aperture dimensions of 20mm × 20mm is used at a distance of 200mm from the sensor (equivalent

to F=10).

• Load resistance = 100k Ohms

• These specifications apply to the 5000 valid pixels for each color excluding the dummy pixels D1 to D6.

Parameter

Symbol

R_R

Condition

min

typ

1.2

max

Unit

Note 1

Note 2

Note 3

Note 4

Responsivity

R_G

1.5

V/lx·s

R_B

1.3

PRNU

V_SAT

SE_R

10

Photo response non-uniformity

Saturation output voltage

%

V

1.0

0.83

0.67

0.77

0.2

Saturation exposure

lx·s

SE_G

SE_B

V^DRK

DSNU

STTE

Z_O

Dark condition, see Note 5

Dark condition, see Note 6

2.0

Dark signal output voltage

Dark signal output non-uniformity

Shift register total transfer efficiency

Output impedance

mV

0.1

92

%

1

kΩ

DR

Note 7

5000

4.5

Dynamic range

V

V_OS

(OS1, OS2, OS3) see Note 8

Signal output pin DC level

Compensation output pin DC level

Signal and compensation output pin DC level difference

V_DS

Note 8

4.5

_OS– V_DS

V

|

mV

300

Connect all NC pins externally to V_SS(GND).

Note 1) Responsivity (R)

This is the value obtained by dividing the average output voltage (V) of all valid pixels of each of the colors R, G, and B

by the exposure (lx·s). The exposure is the product of the incident light intensity (lx) and the accumulation time (s).

Since the responsivity changes with the spectral distribution of the light source used, care should be taken when using a

light source other than the daylight type fluorescent lamp specified in the inspection conditions.

Note 2) Photo response non-uniformity (PRNU)

This is defined by the following equation where X_aveis the average output voltage of the active pixels of each of the colors

R, G, and B, and ∆x is the difference between the output voltage of the maximum (or minimum) output pixel and X_ave

,

when the photodetector region is illuminated with light of a uniform illumination intensity distribution.

x

X_ave

×100 (%)

PRNU=

The incident light intensity shall be 50% of the standard saturation llight intensity.

Note 3) Saturation output voltage (V_SAT

)

This is the output voltage at the point beyond which it is not possible to maintain the linearity of the photoelectric

conversion characteristics as the exposure is increased. (The exposure at this point is called the saturation exposure.)

Note 4) Saturation Exposure (SE)

This is the exposure beyond which it is not possible to maintain the linearity of the output voltage as the exposure is

increased. When designing the equipment using these devices, make sure that the incident light exposure is set with

sufficient margin so that the CCD never gets saturated.

Note 5) Dark signal output voltage (V_DRK

)

This is defined as the average of the output from all the valid pixels in the dark condition at Ta=25˚C, T =10ms.

int

Normally, the dark signal output voltage gets doubled for every 8 to 10˚C increase in Ta and is proportional to T_int.

Note 6) Dark signal non-uniformity (DSNU)

This is defined as the difference between the maximum value among the output voltages of the all valid pixels at Ta=25˚C

and T_int=10ms and V_DRK

.

V_DRK

DSNU

CCD Linear Image Sensor

MN3672RE (Preliminary)

■ Optical Characteristics (continued)

Note 7) Dynamic range (DR)

This is defined by the following equation.

V

SAT

V_DRK

DR=

Since the dark signal output voltage is proportional to the accumulation time, the dynamic range becomes wider when the

accumulation time is shorter.

Note 8) The signal output pin DC level (V_OS) and the compensation output pin DC level (V_DS) are the voltage values given in the

following figure.

OS₁

Reset feed

through level

OS₂

DS waveform

V_SS

OS₃

waveform

V_DS

V_OS

V_SS

■ Construction of the Image Sensor

The MN3672 can be made up of the three sections of—a)

photo detector region, b) CCD transfer region (shift register),

and c) output region.

divided into four segments each of which are provided with

separate ø₁, ø₂clock pins, it is possible to reduce the heat

generation in the chip and the load on the clock driver circuit

by providing separate clock driver circuit for each pin during

high speed operation.

a) Photo detector region

• The photoelectric conversion device consists of an 11µm

floating photodiode and a 3µm channel stopper (isolation

region) per pixel, and 5000 pixels' lines of each of the colors

R, G, and B are arranged neighboring.

The last gate of the CCD transfer region is connected to

•

an

independent pin (ø_1L). By driving this pin independent of the

other pins by a clock driver, it is possible to speed up the

flow of signal charge into the charge to voltage conversion

region thereby making the output waveform rise sharply.

This makes it easy to obtain margin of the signal processing

time during high speed drive operation.

• There is a spacing of one line between B-R in the sideways

scanning direction (center to center spacing of 14µm) and a

similar one line spacing between R-G in the sideways

scanning direction (center to center spacing of 14µm).

• The photodetector window is a rectangle of dimensions 8µm

(Horizontal) × 11µm (Vertical), and the areas other than the

photodetector window are optically shielded.

c) Output region

• The signal charge transferred to the output region is first sent

to the charge to voltage conversion region where it is

converted into a voltage level corresponding to the amount of

the signal charge, and then output after impedance

conversion in a two stage source follower amplifier.

• The photodetector region has 24 optically shielded (black

reference) pixels for each color that can be used as the black

level reference.

The DC level component not containing the optical signal

and the clock noise component are output at the DS pin.

b) CCD Transfer region (analog shift register)

•

• The signal charges obtained by photoelectric conversion are

transferred to the CCD transfer regions of the respective

colors during the period when the shift gate (ø_SG) is at the

High level. The signal charges transferred to this analog shift

register are successively transferred to the output region.

• A buried type CCD that can be driven by a two phase clock

(ø₁, ø₂) is used for the analog shift register.

It is possible to obtain a signal with a high S/N ratio

•

with

reduced clock noise, etc., by carrying out differential

amplification of the OS and DS outputs externally.

In the CCD transfer region, since each CCD shift

•

register is

MN3672RE (Preliminary)

CCD Linear Image Sensor

■ Pin Descriptions

Pin No.

1

Symbol

OS₁

OS₂

V_DD

ø_SG1

V_SS

ø_R

Pin name

Signal output 1 (Red)

Condition

2

Signal output 2 (Green)

Power supply

3

4

Shift clock gate 1

Ground

Internally connected to pin 20.

5

6

Reset clock

7

NC

ø_2A

ø_1A

ø_1B

Non connection

8

CCD clock (Phase 2)

CCD clock (Phase 1)

CCD clock (Phase 2)

CCD clock (Phase 1)

CCD clock (Phase 2)

Substrate

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

ø_2B

All pins are independent.

ø_2C

ø_1C

(Separate drivers can be used)

ø_1D

ø_2D

SUB

NC

V_SS

ø_SG1

ø_SG2

ø_SG3

NC

ø_2E

Should be left open.

Non connection

Ground

Connected to the aluminum layer for optical shielding.

Internally connected to pin 4.

Ground

Shift clock gate 1

Shift clock gate 2

Shift clock gate 3

Non connection

Internally connected to pin 37.

Non connection

CCD clock (Phase 2)

CCD clock (Phase 1)

CCD clock (Phase 2)

CCD clock (Phase 1)

CCD clock (Phase 2)

Non connection

ø_1E

ø_1F

All pins are independent.

ø_2F

(Separate drivers can be used)

ø_2G

ø_1G

ø_1H

ø_2H

NC

ø_1L

CCD final stage clock (Phase 1)

Ground

V

SS

Connected to the aluminum layer for optical shielding.

Internally connected to pin 22.

ø_SG3

Shift clock gate 3

Ground

V

SS

DS

Compensation output

Signal output 3 (Blue)

OS₃

Note) Connect all NC pins externally to V_SS(GND).

CCD Linear Image Sensor

MN3672RE (Preliminary)

■ Timing Diagram

(1) I/O timing

Green signal charge accumulation time (Tint._G)

Red and Blue signal charge accumulation time (Tint._RB

)

ø _SG1

ø _SG2

ø _SG3

5030 5032

5034

ø^1A

0

1

2

3

4

5

6

26 27 28 29 30 31 32 33 5029 5031 5033

ø_1L

ø_2A

ø_2H

ø_R

5031 5033 5035

1

6

7

27 28 29 30 31 32 33 34 5030 5032 5034

DS

OS

OS²₃

B₁B₂

B₂₃B₂₄

D

1

2

4999 5000 D D D

4 5 6

1

2

3

OS¹

Blank feed

(for 4 pixels)

Black reference

pixels

(for 24 pixels)

Dummy Valid pixel signal Invalid pixel

invalid

pixels

(for 5000 pixels)

signal

(for 3 pixels)

(2) Drive timing 1

(during shifting signal charge to CCD)

< Pulse voltage level >

t₁

t₄

H : 12V (V + 2V)

øH

ø_SG1

L : 0V

t₃

t₅

H : 10V (9V ~ 11V)

L : 0V

ø_SG2

t₇

t₂

H : 3V ~ 4V

L : 0V

ø_SG3

t₆

H : 10V (V_øH

L : 0V

)

ø₁

t₈

t₉

H : 10V (V_øH

L : 0V

ø₂

< Pulse timing >

t₁≥5.5µs (t₁> t₂)

t₂≥5µs (t₂= t₅)

t₃≥0.5µs

t₄≥0.5µs

t₅≥5µs (t₂= t₅)

t₆≥1µs

t₇≥4µs

t₈≥0.5µs

t₉≥0.5µs

MN3672RE (Preliminary)

CCD Linear Image Sensor

(2) Drive timing 2

(during repeated pattern)

90%

10%

ø₂

ø₁

t_Cr

t_Cf

90%

50%

10%

t_RS

t_RW

t_Rh

90%

50%

10%

ø_R

t_Rr

t_Rf

DS

t_Oh

2T

t_OS

OS₁

OS₂

OS₃

Reference level

50%

Effective signal

output period

■ Graphs and Characteristics

Spectral Response Characteristics

100

80

60

40

20

0

B

G

R

500

600

700

800

400

Wavelength (nm)


型号：	MN3672RE
厂家：	PANASONIC
描述：	CCD Sensor, 1V, Rectangular, Through Hole Mount, DIP-40 CD 传感器换能器
文件：	总8页 (文件大小：98K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MN3672RE [PANASONIC]

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