AOB412L [AOS]
100V N-Channel MOSFET; 100V N沟道MOSFET
| 型号： | AOB412L |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | 100V N-Channel MOSFET |
| 文件： | 总7页 (文件大小：313K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOT412/AOB412L
100V N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AOT412 & AOB412L are fabricated with SDMOSTM
trench technology that combines excellent RDS(ON) with
low gate charge & low Qrr.The result is outstanding
efficiency with controlled switching behavior. This
universal technology is well suited for PWM, load
switching and general purpose applications.
VDS
100V
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
60A
< 15.8mΩ
< 19.4mΩ
RDS(ON) (at VGS = 7V)
100% UIS Tested
100% Rg Tested
TO-263
D2PAK
TO220
Top View
Bottom View
Top View
Bottom View
D
D
D
D
D
G
S
G
S
G
D
D
S
G
G
S
S
AOB412L
AOT412
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Maximum
Units
Drain-Source Voltage
Gate-Source Voltage
100
±25
60
V
V
VGS
TC=25°C
Continuous Drain
Current
ID
TC=100°C
44
A
Pulsed Drain Current C
IDM
140
8.2
TA=25°C
TA=70°C
Continuous Drain
Current
Avalanche Current C
Avalanche energy L=0.1mH C
IDSM
A
6.6
IAS,IAR
47
A
EAS,EAR
110
mJ
TC=25°C
Power Dissipation B
TC=100°C
150
PD
W
75
TA=25°C
2.6
PDSM
W
°C
Power Dissipation A
1.7
TA=70°C
Junction and Storage Temperature Range
TJ, TSTG
-55 to 175
Thermal Characteristics
Parameter
Symbol
Typ
15
Max
18
48
1
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
t
≤ 10s
RθJA
Steady-State
Steady-State
40
RθJC
0.7
Rev2: Jul 2011
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Page 1 of 7
AOT412/AOB412L
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
ID=250µA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
100
V
VDS=100V, VGS=0V
10
µA
50
IDSS
Zero Gate Voltage Drain Current
TJ=55°C
VDS=0V, VGS= ±25V
VDS=VGS ,ID=250µA
VGS=10V, VDS=5V
VGS=10V, ID=20A
TO220
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
100
3.8
nA
V
VGS(th)
ID(ON)
2.6
3.2
140
A
13.2
25
15.8
30
mΩ
TJ=125°C
VGS=7V, ID=20A
TO220
15.5
12.9
19.4
15.5
19.1
mΩ
mΩ
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=20A
TO263
VGS=7V, ID=20A
TO263
15.2
30
mΩ
VDS=5V, ID=20A
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
S
IS=1A,VGS=0V
0.65
1
V
A
Maximum Body-Diode Continuous Current
60
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
2150 2680 3220
pF
pF
pF
Ω
VGS=0V, VDS=50V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
180
60
260
100
1
340
140
1.5
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=20A
0.5
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
36
14
9
45
17
15
19
16
27
10
54
20
21
nC
nC
nC
ns
ns
ns
ns
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
VGS=10V, VDS=50V, RL=2Ω,
RGEN=3Ω
tD(off)
tf
trr
IF=20A, dI/dt=500A/µs
IF=20A, dI/dt=500A/µs
15
67
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
22
96
29
ns
Qrr
nC
125
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse ratin g.
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev2: Jul 2011
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Page 2 of 7
AOT412/AOB412L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
140
120
100
80
100
VDS=5V
10V
7.5V
7V
80
60
40
20
0
6.5V
60
6V
40
25°C
125°C
4
VGS=5.5V
20
0
0
2
6
8
10
0
1
2
3
4
5
V
DS (Volts)
VGS(Volts)
Fig 1: On-Region Characteristics (Note E)
Figure 2: Transfer Characteristics (Note E)
17
16
15
14
13
12
11
2.6
2.4
2.2
2
VGS=10V
ID=20A
VGS=7V
1.8
1.6
1.4
1.2
1
VGS=10V
=7V
VGS
ID=20A
0.8
0
25
50
75
100 125 150 175 200
0
5
10
15
20
25
30
I
D (A)
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
(Note E)
33
1.0E+02
1.0E+01
ID=20A
125°C
28
1.0E+00
125°C
25°C
23
18
13
8
1.0E-01
1.0E-02
1.0E-03
1.0E-04
25°C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
5
6
7
8
9
10
VSD (Volts)
VGS (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev2: Jul 2011
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Page 3 of 7
AOT412/AOB412L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
3600
10
VDS=50V
ID=20A
3200
2800
2400
2000
1600
1200
800
Ciss
8
6
4
2
Coss
Crss
400
0
0
0
20
40
60
80
100
0
10
20
30
40
50
Qg (nC)
VDS (Volts)
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
5000
4000
3000
2000
1000
0
1000.0
100.0
10.0
1.0
TJ(Max)=175°C
TC=25°C
10µs
RDS(ON)
limited
100µs
1ms
DC
10ms
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
0.1
1
10
100
1000
1E-05 0.0001 0.001 0.01
0.1
1
10
VDS (Volts)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
1
D=Ton/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=1°C/W
PD
0.1
0.01
Ton
T
Single Pulse
0.00001
0.0001
0.001
0.01
Pulse Width (s)
0.1
1
10
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev2: Jul 2011
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Page 4 of 7
AOT412/AOB412L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
160
100
TA=25°C
140
TA=100°C
120
10
100
TA=150°C
80
60
TA=125°C
1
40
20
0
0.1
0
25
50
75
100
125
150
175
1
10
100
1000
Time in avalanche, tA (µs)
TCASE (°C)
Figure 12: Single Pulse Avalanche capability (Note
C)
Figure 13: Power De-rating (Note F)
1000
70
60
50
40
30
20
10
0
TA=25°C
100
10
1
0
25
50
75
CASE (°C)
Figure 14: Current De-rating (Note F)
100
125
150
175
0.00001
0.001
0.1
10
1000
T
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note G)
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
θJA=48°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
R
PD
0.01
Ton
T
Single Pulse
0.001
0.001
0.00001
0.0001
0.01
0.1
Pulse Width (s)
1
10
100
1000
Figure 16: Normalized Maximum Transient Thermal Impedance (Note G)
Rev2: Jul 2011
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Page 5 of 7
AOT412/AOB412L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
220
180
140
100
60
50
40
30
20
10
0
30
25
20
15
10
5
2
125ºC
di/dt=800A/µs
di/dt=800A/µs
125ºC
25ºC
1.5
25ºC
trr
1
Qrr
125ºC
25ºC
25ºC
125ºC
0.5
0
S
Irm
20
0
0
5
10
15
S (A)
20
25
30
0
5
10
15
IS (A)
20
25
30
I
Figure 17: Diode Reverse Recovery Charge and Peak
Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
180
50
40
30
20
10
0
35
30
25
20
15
10
5
2
Is=20A
Is=20A
125ºC
160
140
120
100
80
125ºC
1.5
1
25ºC
trr
25ºC
Qrr
25ºC
125ºC
S
60
0.5
0
40
Irm
25ºC
125ºC
20
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di/dt (A/µs)
di/dt (A/µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Rev2: Jul 2011
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Page 6 of 7
AOT412/AOB412L
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev2: Jul 2011
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Page 7 of 7
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