AOB4184 [AOS]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
AOB4184
型号: AOB4184
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管
文件: 总6页 (文件大小:143K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOB4184  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOB4184/L uses advanced trench technology  
and design to provide excellent RDS(ON) with low gate  
charge. With the excellent thermal resistance of the  
VDS (V) =40V  
ID = 30 A  
(VGS = 10V)  
D2PAK package, this device is well suited for high  
current load applications. AOB4184 and AOB4184L  
are electrically identical.  
R
DS(ON) < 10.5 m(VGS = 10V)  
DS(ON) < 13 m(VGS = 4.5V)  
R
100% UIS Tested!  
-RoHS Compliant  
-AOB4184L is Halogen Free  
TO-263  
D2PAK  
D
Top View  
D
S
G
S
G
Bottom View  
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
Gate-Source Voltage  
Continuous Drain  
Current G  
40  
±20  
30  
V
V
VGS  
TC=25°C  
TC=100°C  
ID  
24  
Pulsed Drain Current C  
IDM  
120  
12  
A
Continuous Drain  
Current A  
Avalanche Current C  
TC=25°C  
TC=70°C  
IDSM  
IAR  
10  
35  
A
Repetitive avalanche energy L=100uH C  
EAR  
61  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
50  
PD  
W
25  
TA=25°C  
2.5  
PDSM  
W
Power Dissipation A  
TA=70°C  
1.6  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
Symbol  
Typ  
11  
42  
Max  
Units  
°C/W  
°C/W  
°C/W  
t 10s  
Steady-State  
Steady-State  
17  
50  
3
RθJA  
RθJC  
2.4  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOB4184  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=250µA, VGS=0V  
40  
V
VDS=40V, VGS=0V  
1
5
IDSS  
Zero Gate Voltage Drain Current  
µA  
TJ=55°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
VDS=0V, VGS=±20V  
VDS=VGS, ID=250µA  
VGS=10V, VDS=5V  
±100  
3
nA  
V
VGS(th)  
ID(ON)  
1.7  
2.1  
120  
A
VGS=10V, ID=20A  
8.5  
13.2  
10  
10.5  
17  
mΩ  
mΩ  
RDS(ON)  
TJ=125°C  
Static Drain-Source On-Resistance  
V
GS=4.5V, ID=20A  
DS=5V, ID=20A  
13  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
V
100  
0.72  
S
V
A
IS=1A, VGS=0V  
Maximum Body-Diode Continuous CurrentG  
1
30  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1250  
165  
95  
1500  
215  
135  
3.5  
1800  
280  
190  
5
pF  
pF  
pF  
V
GS=0V, VDS=20V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
2
SWITCHING PARAMETERS  
Qg(10V)  
Total Gate Charge  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
22  
11  
27.2  
13.6  
4.5  
35  
18  
6
nC  
nC  
nC  
nC  
ns  
Qg(4.5V)  
V
GS=10V, VDS=20V, ID=20A  
Qgs  
Qgd  
tD(on)  
tr  
3.5  
4.5  
6.4  
9
6.4  
VGS=10V, VDS=20V, RL=1,  
RGEN=3Ω  
17.2  
29.6  
16.8  
19  
ns  
tD(off)  
tf  
ns  
ns  
trr  
IF=20A, dI/dt=500A/µs  
IF=20A, dI/dt=500A/µs  
15  
48  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
25  
78  
ns  
Qrr  
59  
nC  
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on  
the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of T J(MAX)=175°C.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA  
curve provides a single pulse rating.  
Rev0 : July 2008  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOB4184  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
120  
100  
80  
60  
40  
20  
0
VDS= 5V  
10V  
4.5V  
80  
60  
40  
20  
0
4V  
Vgs=3.5V  
3V  
125°C  
25°C  
0
1
2
3
4
5
2
2
2.5  
3
3.5  
4
4.5  
VGS(Volts)  
V
DS (Volts)  
Figure 2: Transfer Characteristics  
Figure 1: On-Region Characteristics  
14  
1.8  
1.6  
1.4  
1.2  
1
12  
10  
8
VGS=4.5V  
VGS=10V  
VGS=10V, 30A  
VGS=4.5V, 20A  
6
0.8  
0
5
10  
15  
D (A)  
20  
25  
30  
I
0
25  
50  
75  
100  
125  
150  
175  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
20  
15  
10  
5
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
ID=20A  
125°C  
125°C  
25°C  
25°C  
0
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
3
4
5
6
7
8
9
10  
VSD (Volts)  
VGS (Volts)  
Figure 6: Body-Diode Characteristics  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOB4184  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
2500  
10  
VDS=12.5V  
ID=20A  
2000  
1500  
1000  
500  
0
8
Ciss  
6
4
Coss  
2
Crss  
0
0
10  
20  
30  
40  
0
5
10  
15  
g (nC)  
20  
25  
30  
Q
VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000  
100  
10  
200  
160  
120  
80  
TJ(Max)=175°C, Tc=25°C  
10µ  
TJ(Max)=175°C  
Tc=25°C  
100µs  
D
1ms  
RDS(ON)  
limited  
40  
1
0
0.1  
0.0001  
0.001  
0.01  
0.1  
1
10  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
VDS (Volts)  
Figure 9: Maximum Forward Biased Safe Operating  
Area (Note F)  
10  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
RθJC=3°C/W  
1
PD  
0.1  
Ton  
T
Single Pulse  
0.01  
0.00001  
0.0001  
0.001  
0.01  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.1  
1
10  
100  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOB4184  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
TA=25°C  
150°C  
100°C  
125°C  
0
0
25  
50  
75  
100  
125  
150  
175  
0.000001  
0.00001  
Time in avalanche, tA (s)  
Figure 12: Single Pulse Avalanche capability  
0.0001  
0.001  
TCASE (°C)  
Figure 13: Power De-rating (Note F)  
50  
40  
30  
20  
10  
0
TA=25°C  
40  
30  
20  
10  
0
50  
75  
100  
125  
150  
175  
0.01  
0.1  
1
10  
100  
1000  
T
CASE (°C)  
Pulse Width (s)  
Figure 14: Current De-rating (Note F)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
RθJA=50°C/W  
0.1  
0.01  
PD  
Single Pulse  
Ton  
T
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOB4184  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q rr = - Idt  
Vds +  
DUT  
Vgs  
trr  
Vds -  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Ig  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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