AO4452 [AOS]

100V N-Channel MOSFET; 100V N沟道MOSFET
AO4452
型号: AO4452
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

100V N-Channel MOSFET
100V N沟道MOSFET

文件: 总6页 (文件大小:439K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AO4452  
100V N-Channel MOSFET  
SDMOS TM  
General Description  
Product Summary  
The AO4452 is fabricated with SDMOSTM trench  
technology that combines excellent RDS(ON) with low gate  
charge.The result is outstanding efficiency with controlled  
switching behavior. This universal technology is well  
suited for PWM, load switching and general purpose  
applications.  
VDS  
100V  
ID (at VGS=10V)  
RDS(ON) (at VGS=10V)  
8A  
< 25m  
< 31mΩ  
RDS(ON) (at VGS = 7V)  
100% UIS Tested  
100% Rg Tested  
SOIC-8  
D
Top View  
Bottom View  
D
D
D
D
G
G
S
S
S
S
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
VDS  
Maximum  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
100  
±25  
8
V
V
VGS  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
ID  
6.5  
A
Pulsed Drain Current C  
Avalanche Current C  
IDM  
IAR  
57  
28  
A
Repetitive avalanche energy L=0.1mH C  
TA=25°C  
EAR  
39  
mJ  
3.1  
2
PD  
W
Power Dissipation B  
TA=70°C  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 150  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
31  
Max  
40  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Lead  
t
10s  
RθJA  
Steady-State  
Steady-State  
59  
75  
RθJL  
16  
24  
Rev 3: May 2012  
www.aosmd.com  
Page 1 of 6  
AO4452  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
100  
V
VDS=100V, VGS=0V  
10  
µA  
50  
IDSS  
Zero Gate Voltage Drain Current  
TJ=55°C  
VDS=0V, VGS= ±25V  
VDS=VGS ID=250µA  
VGS=10V, VDS=5V  
VGS=10V, ID=8A  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
100  
4
nA  
V
VGS(th)  
ID(ON)  
2
3.2  
60  
A
20.5  
36  
25  
43  
31  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
VGS=7V, ID=6.5A  
VDS=5V, ID=8A  
IS=1A,VGS=0V  
25  
mΩ  
S
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
23  
0.66  
1
5
V
Maximum Body-Diode Continuous Current  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1400 1770 2200  
pF  
pF  
pF  
VGS=0V, VDS=50V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
115  
33  
165  
55  
215  
80  
VGS=0V, VDS=0V, f=1MHz  
VGS=10V, VDS=50V, ID=8A  
VGS=10V, VDS=50V, RL=6,  
0.3  
0.65  
1.0  
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
14  
4
28  
9
42  
14  
14  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
6
10  
12  
4
RGEN=3Ω  
tD(off)  
tf  
17  
5
trr  
IF=8A, dI/dt=500A/µs  
IF=8A, dI/dt=500A/µs  
IF=8A, dI/dt=100A/µs  
IF=8A, dI/dt=100A/µs  
11  
42  
21  
20  
16  
60  
27  
28  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
21  
78  
33  
36  
ns  
Qrr  
trr  
nC  
ns  
Qrr  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
value in any given application depends on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using 10s junction-to-ambient thermal resistance.  
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep  
initialTJ=25°C.  
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with  
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev 3: May 2012  
www.aosmd.com  
Page 2 of 6  
AO4452  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
60  
50  
40  
30  
20  
10  
0
60  
50  
40  
30  
20  
10  
0
8V  
10V  
VDS=5V  
7V  
125°C  
6.5V  
25°C  
VGS=6V  
3
4
5
6
7
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Fig 1: On-Region Characteristics (Note E)  
Figure 2: Transfer Characteristics (Note E)  
2.2  
2
40  
35  
30  
25  
20  
15  
10  
VGS=10V  
ID=8A  
VGS=7V  
1.8  
1.6  
1.4  
1.2  
1
VGS=10V  
VGS=7V  
ID=6.5A  
0.8  
0
25  
50  
75  
100  
125  
175  
150  
0
6
12  
18  
ID (A)  
24  
30  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
45  
40  
35  
30  
25  
20  
15  
1.0E+02  
1.0E+01  
ID=8A  
1.0E+00  
125°C  
125°C  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
25°C  
25°C  
6
7
8
9
10  
0.0  
0.2  
0.4  
VSD (Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
0.6  
0.8  
1.0  
1.2  
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev 3: May 2012  
www.aosmd.com  
Page 3 of 6  
AO4452  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
8
2500  
VDS=50V  
ID=8A  
Ciss  
2000  
1500  
1000  
500  
0
6
4
Crss  
2
Coss  
0
0
5
10  
15  
Qg (nC)  
20  
25  
30  
0
20  
40  
VDS (Volts)  
Figure 8: Capacitance Characteristics  
60  
80  
100  
Figure 7: Gate-Charge Characteristics  
100  
100.0  
10.0  
1.0  
10µs  
TA=25°C  
RDS(ON)  
limited  
100µs  
TA=100°C  
1ms  
TA=150°C  
TJ(Max)=150°C  
TA=25°C  
10ms  
10s  
0.1  
TA=125°C  
DC  
10  
0.0  
10  
0.000001  
0.01  
0.1  
1
100  
0.00001  
0.0001  
0.001  
VDS (Volts)  
Time in avalanche, tA (s)  
Figure 9: Single Pulse Avalanche capability (Note  
C)  
Figure 10: Maximum Forward Biased  
Safe Operating Area (Note F)  
10000  
1000  
100  
10  
TA=25°C  
1
0.00001  
0.001  
0.1  
10  
1000  
Pulse Width (s)  
Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)  
Rev 3: May 2012  
www.aosmd.com  
Page 4 of 6  
AO4452  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
In descending order  
D=Ton/T  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
TJ,PK=TA+PDM.ZθJA.RθJA  
1
0.1  
RθJA=75°C/W  
PD  
0.01  
Single Pulse  
0.001  
Ton  
T
0.001  
0.00001  
0.0001  
0.01  
Pulse Width (s)  
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)  
0.1  
1
10  
100  
1000  
300  
250  
200  
150  
100  
50  
15  
12  
9
24  
20  
16  
12  
8
2
di/dt=800A/µs  
di/dt=800A/µs  
125ºC  
125ºC  
1.6  
1.2  
0.8  
0.4  
Irm  
trr  
25ºC  
25ºC  
125ºC  
6
125ºC  
3
4
S
Qrr  
25ºC  
25  
25ºC  
20  
0
0
0
0
5
10  
15  
IS (A)  
20  
30  
0
5
10  
15  
25  
30  
IS (A)  
Figure 13: Diode Reverse Recovery Charge and Peak  
Current vs. Conduction Current  
Figure 14: Diode Reverse Recovery Time and  
Softness Factor vs. Conduction Current  
150  
120  
90  
60  
30  
0
30  
30  
25  
20  
15  
10  
5
3
2
1
0
trr  
26  
22  
18  
14  
10  
6
Is=20A  
Is=20A  
125ºC  
125ºC  
25ºC  
25ºC  
125ºC  
Qrr  
125ºC  
25ºC  
25ºC  
Irm  
S
2
-2  
0
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di/dt (A/µs)  
di/dt (A/µs)  
Figure 15: Diode Reverse Recovery Charge and Peak  
Current vs. di/dt  
Figure 16: Diode Reverse Recovery Time and  
Softness Factor vs. di/dt  
Rev 3: May 2012  
www.aosmd.com  
Page 5 of 6  
AO4452  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev 3: May 2012  
www.aosmd.com  
Page 6 of 6  

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