AN-6041 [FAIRCHILD]
PCB Layout Considerations for Video Filter / Drivers; PCB布局考虑视频滤波器/驱动器
| 型号： | AN-6041 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | PCB Layout Considerations for Video Filter / Drivers |
| 文件： | 总4页 (文件大小：60K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
AN-6041 PCB Layout Considerations
for Video Filter / Drivers
Power
Analog GND and Digital GND
The bulk capacitor (Tantalum or Electrolytic) should be
placed reasonably close to the device. If used, a linear
regulator for analog VCC should be close to the power area
of the device. Use separate analog and digital power planes.
The ground plane is the most important layer in the PCB
layout; it greatly affects the performance of analog
components and signals. Proper layout of the ground plane
keeps the board noise level within acceptable margins.
Avoid long current loops, especially when mixing analog
and digital signals. The best way to achieve this is to
partition analog and digital ground very carefully and
clearly so that signal and return current paths can be
localized in their sections. If analog and digital circuitry is
partitioned well, there is no need to split the ground. In most
cases, a single solid ground plane is the best choice because
it keeps ground potential lower between every ground point
and helps reduce EMI. In a complex digital intensive
design, it may be difficult to keep the analog area free from
digital return current. In that case, there may be some
benefit from cutting ground between the digital and analog
and tying the two together under the device. Avoid any
traces running across the split.
Decoupling Capacitors
Placement of bypass capacitors is important to maintain
proper function. Every supply pin should connect to a
ceramic decoupling capacitor. The distance from the device
pin should be no greater than 0.1 inches, as shown in Figure
1. Place high-frequency decoupling capacitors as close to
the device power supply pin as possible; without series vias
between the capacitor and the device pin. This is normally
done for the smallest capacitor, closest to the supply pin.
Board space does not always allow for all bypass capacitors
to be on the same plane; second and third capacitors may
need vias to connect to the power supply pin.
Input Interface
Figure 2 shows a typical AC-coupled input configuration
for driving the filter/driver. In this configuration, use a
0.1µF ceramic capacitor to AC couple the input signal. The
coupling capacitor and the input termination resistor at the
input to the filter/driver should be placed close to the input
pin for optimal signal integrity. If the input signal does not
go below ground, the clamp is inactive; but if the input
signal goes below ground, the clamp circuitry sets the
bottom of the sync tip (or lowest voltage) to just below
ground. The input level set by the clamp, combined with the
internal DC offset, keeps the output signal within acceptable
range. This clamp feature allows the input to be directly
driven (DC-coupled) by a ground-referenced DAC output.
Figure 1. Decoupling Capacitor Placement
Clamp/
Bias
Input
Buf
LPF
0.1µF
Rterm
Termination &
Coupling close
to device input
Figure 2. Typical AC-Coupled Input Configuration for Driving the Filter / Driver
© 2006 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 12/7/06
www.fairchildsemi.com
AN-6041
APPLICATION NOTE
Output Interface
To obtain the highest quality output signal, the series
termination resistor must be placed as close to the device
output pin as possible. This greatly reduces the parasitic
capacitance and inductance effect on the output of the
driver. The distance from device pin to the series
termination resistor should be no greater than 0.1 inches, as
shown in Figure 3. Figure 4 is the schematic representation
of a video filter/driver used in a system as the output driver
to a media device. Figure 4 shows the composite video
signal terminated by the media device and the S-video
output terminations open. It is very critical, in this case, to
have the series termination resistors close to the output pin
of the device to minimize the effects of parasitic capacitance
on the filter output driver, which may show up as noise on
the CV output.
Figure 3. Proper Termination Resistor Placement
Fairchild Filter Driver
+
4 2
75-Ohm
Clamp/
Buf
Bias
LPF
Series
Termination
Resistor
Filter/Driver set for gain of 2X
S-Video
0.1 inches
from DUT
pin
1
3
75-Ohm
RCA JACK
Coax
+
Summer
ADC
Series
75-Ohm
Termination
Resistor
0.1 inches
from DUT
pin
Media
Fairchild Filter Driver
+
75-Ohm
Clamp/
Buf
Bias
LPF
Series
Termination
Resistor
Filter/Driver set for gain of 2X
0.1 inches
from DUT
pin
Figure 4. Schematic Representation of a Video Filter / Driver in a System
© 2006 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 12/7/06
www.fairchildsemi.com
2
AN-6041
APPLICATION NOTE
Printed Circuit Board (PCB) Layers
It is best to use, as a minimum, a four-layer PCB. Assign one inner layer to the dedicated signal ground plane and one inner
layer to the single or split power plane, as shown in Figure 5.
Figure 5. Recommended PCB Layers
Layout Considerations
General layout and supply bypassing play major roles in
high-frequency performance and thermal characteristics.
Fairchild offers a demonstration board for each product to
guide layout and aid device evaluation. The demo boards
are four-layer boards with full power and ground planes.
Following this layout configuration provides the optimum
performance and thermal characteristics for the device. For
the best results, follow the steps and recommended routing
rules listed below.
dissipation. When designing a system board, determine how
much power each device dissipates. Make sure devices of
high power are not placed in the same location, such as
directly above (top plane) and below (bottom plane) each
other on the PCB.
PCB Thermal Layout Considerations
Understand the system power requirements and
environmental conditions.
Maximize thermal performance of the PCB.
Recommended Routing/Layout Rules
Consider using 70µm of copper for high-power
designs.
Do not run analog and digital signals in parallel.
Use separate analog and digital power planes to supply
power.
Make the PCB as thin as possible by reducing FR4
thickness.
Traces should run on top of the ground plane at all times.
No trace should run over ground/power splits.
Avoid routing at 90-degree angles.
Use vias in power pad to tie adjacent layers together.
Remember that baseline temperature is a function of
board area, not copper thickness.
Minimize clock and video data trace length differences.
Modeling techniques can provide a first-order
approximation.
Thermal Considerations
Since the interior of most systems, such as set-top boxes,
TVs, and DVD players are at +70ºC; adequate heat sink
must be provided for the device package for heat
© 2006 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 12/7/06
www.fairchildsemi.com
3
AN-6041
APPLICATION NOTE
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© 2006 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 12/7/06
www.fairchildsemi.com
4
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