AN-6208_技术文档

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ANꢀ6208

SecondaryꢀSide Synchronous Rectifier (SR) for

LLC Resonant Converter Using FAN6208

FAN6208 is a synchronous rectification controller for

Introduction

isolated LLC or LC resonant converters that can drive two

individual SR MOSFETs emulating the behavior of rectifier

diodes. FAN6208 measures the SR conduction time of each

switching cycle by monitoring the drainꢀtoꢀsource voltage of

each SR and determines the optimal timing of SR gate

drive. FAN6208 also uses the change of optoꢀcoupler diode

current to adaptively shrink the duration of SR gate drive

signals during load transients to prevent shootꢀthrough. To

improve lightꢀload efficiency, Green Mode disables the SR

drive signals, minimizing gate drive power consumption at

lightꢀload conditions.

The LLC resonant converter has drawn a lot of attention

recently due to its advantages over a conventional series

resonant converter and parallel resonant converter: narrow

frequency variation over wide load, input variation, and

Zero Voltage Switching (ZVS) for the entire load range.

In an LLC resonant converter, rectifier diodes are typically

used to obtain DC output voltage from the transformer

secondary winding. The conduction loss of diode rectifier

contributes significantly to the overall power losses in an

LLC resonant converter; especially in low output voltage

applications. The conduction loss of

a rectifier is

This application note describes the design procedure for a

SR circuit using FAN6208. The guidelines for printed

circuit board (PCB) layout and a design example with

experiment results are also presented. Figure 1 shows the

typical application circuit of FAN6208.

proportional to the product of its forwardꢀvoltage drop and

the forward conduction current. Using synchronous

rectification (SR) where the rectifier diode is replaced by

MOSFET with a small on resistance (R_DSON), the forwardꢀ

voltage drop of a synchronous rectifier can be lower than

that of a diode rectifier and, consequently, the rectifier

conduction loss can be reduced.

Figure 1. Typical Application

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

LLC Resonance Converter with SR

Q1 Gate

Q2 Gate

Figure 2 shows the simplified schematic of a halfꢀbridge

LLC resonant converter, where L_mis the magnetizing

inductance that acts as a shunt inductor, L_ris the series

resonant inductor, and C_ris the resonant capacitor. Since the

magnetizing inductor is relatively small, a considerable

amount of magnetizing current (I_m) exists, which freewheels

in the primary side without being involved in the power

transfer. The primaryꢀside current (I_p) is sum of the

magnetizing current and the secondaryꢀside current referred

to the primary.

I_P

I_m

Figure 3 shows the typical gain curve of the halfꢀbridge

LLC resonant converter. To allow Zero Voltage Switching

(ZVS) for the primaryꢀside switches, gain curves with

inductive impedance characteristics should be used, where

the gain decreases as frequency increases. The resonant

network has a resonant frequency determined by the

resonance between L_rand C_r. When the switching frequency

is lower than the resonant frequency (below resonance), the

half resonance of reflected secondaryꢀside current (diode

current) finishes before the primaryꢀside switch is turned

off, as shown in Figure 4. When the switching frequency is

higher than the resonant frequency (above resonance) the

primaryꢀside switch is turned off before the half resonance

of reflected secondaryꢀside current (diode current) is

completed, as shown in Figure 5.

I_D

I_SR1

I_SR2

V_SR2

2*Vo

SR Onꢀtime

SR1 Gate

Figure 4. Key Waveforms Below ꢀResonance Operation

Figure 2. Schematic of LLC Resonant

Converter with SR

1

f_o

=

2

π L_rC_r

Figure 5. Key Waveforms of AboveꢀResonance

Operation

L_r/C_r

Q =

R_ac

Figure 3. Typical Gain Curves of LLC

Resonant Converter

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

Application Circuit

t_SR-ON-DETL

Figure 6 shows the typical application circuit of FAN6208

and Figure 7 shows the typical timing diagram of SR gate

drive signal. FAN6208 senses the drainꢀtoꢀsource voltage of

each SR to determine the gate drive timing. Once the body

diode of SR begins conducting, the drainꢀtoꢀsource voltage

drops to zero, which causes low detection (DETL) pin

voltage to drop to zero. FAN6208 turns on the MOSFET

after t_{ONꢀONꢀDETL}(about 350ns), when the voltage on DETL

drops below 2V. As depicted in Figure 8, the turn ꢀon delay

(after t_{SRꢀONꢀDETL}) is a sum of debounce time (150ns) and

propagation delay (200ns).

350ns

DETL1

2V

V_DETL1

t_DB

t_PD

GATE1

150ns 200ns

t_{SRꢀONꢀDETL}

350ns

DETL1

GATE1

2V

V_DETL1

t_DB

150ns 200ns

t_{SRꢀONꢀDETL}

t_PD

FAN6208 measures the SR conduction duration (t_DETL),

during which DETL voltage stays lower than 2V, and uses

this information to determine the turnꢀoff instant of SR

gates of the next switching cycle, as shown in Figure 7. The

turnꢀoff instant is obtained by subtracting a dead time

(t_DEAD) from the measured SR conduction duration of the

previous switching cycle.

350ns

DETL1

GATE1

V_DETL1

2V

t_DB

t_PD

150ns 200ns

Figure 8. Timing Diagram for Turning On SR

Figure 6. Application Circuit of FAN6208

DETL Pin Configuration

Allowable voltage on the DETL pin is from ꢀ0.3V to 7V.

Since the maximum voltage of the SR drainꢀtoꢀsource

voltage is twice that of the output voltage, a diode (D_DETL) is

required for the DETL pin to prevent high voltage. Diode

1N4148 is typically used for D_DETL. Since the DETL

internal current source is 50ꢁA, R_DETLshould be determined

such that the DETL voltage is lower than the low detection

threshold (2V) with enough margin when the SR conducts.

Since the forwardꢀvoltage drop of SR can be as low as zero

when SR current is small, the DETL resistor should be:

(2 −V_FD

50ꢀ A

)

R_DETL⋅ <

(1)

where V_FDis the forwardꢀvoltage drop of DETL diode.

Figure 7. SR Conduction Time Determination

R_DETLlarger than 20kꢂ is not typically recommended for

proper lowꢀvoltage detection on DETL pin.

R_DETLshould be determined such that the DETL voltage is

higher than ꢀ0.3V when the maximum voltage drop occurs

across SR, such as:

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

max

The RP pin has an internal constant current source (41.5ꢁA)

and the pin voltage is determined by the R_presistor.

Depending on the RP pin voltage, the Green Mode threshold

of t_DETLis determined as shown in Figure 12. When R_RPis

less than 36Kꢂ, FAN6208 operates in LowꢀFrequency

Mode, where Green Mode is enabled when t_DETLis smaller

than 3.75ꢁs. When R_RPis larger than 36Kꢂ, Highꢀ

Frequency Mode is selected and Green Mode is enabled for

t_DETLsmaller than 1.90ꢁs.

I_SR

R

−V_FD− 0.3

A

DS.ON

(2)

R_DETL

>

50

ꢀ

where I_SR^maxis the maximum current of SR and R_DS.ONis

the maximum onꢀresistance of the SR MOSFET at high

temperature.

The RP pin also has two internal thresholds for pinꢀopen /

short protection. Using RP pin short protection, remote on /

off control can be implemented as shown in Figure 13

.

Figure 9. Application Circuit of DETL Pin

RP Pin Configuration

The dead time can be programmed using a resistor on the

RP pin. The relationship between the dead time and SR

conduction duration (t_DETL) for different resistor values on

the RP pin are given in Figure 10 and Figure 11. Since the

SR conduction time is shrunk by the protection function

(gateꢀshrink function) when t_DEADis smaller than 125ns, R_p

should be properly selected such that the gateꢀshrink

function does not operate at maximum switching frequency.

Figure 12.RP Pin Operation

Original PSON Circuit Disable RP Pin Circuit

5VB

RP

V_DDSB

41.5ꢁA

R_D

V_DDM

R_P

Q_RP

R_G

Q_PSON

PSON

Figure 10.t_DEADvs. t_DETLfor Different R_P(Low Frequency)

R_GS

5VB

Figure 13.Application Circuit of RP Pin for Remote

ON / OFF

GateꢀShrink Functions

In normal operation, the turnꢀoff instant is determined by

subtracting a dead time (t_DEAD) from the measured SR

conduction duration of the previous switching cycle, as

shown in Figure 7. This allows proper driving timing for the

SR MOSFETS when the converter is in steady state and the

switching frequency does not change much. However, this

control method may cause shootꢀthrough of SR MOSFETs

when the switching frequency increases fast and switching

Figure 11.t_DEADvs. t_DETLfor Different R_P(High Frequency)

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

Figure 15.Application Circuit of FD Pin

transition of the primaryꢀside MOSFETs takes place before

the turnꢀoff command of the SR is given. To prevent the

shootꢀthrough problem, FAN6208 has gateꢀshrink functions.

Gate shrink takes place in the following three conditions:

1. When an insufficient dead time is detected in the

previous switching cycle. When the DETL becomes

HIGH within 125ns of the detection window after SR

gate is turned off, the SR gate drive signal in the next

switching cycle is reduced by t_SHRINKꢀDT(about 1.25ꢁs)

to increase the dead time as shown in Figure 14

.

Figure 16.Gate Shrink by Feedback Detection

3. When the DETL voltage has ringing around zero. As

depicted in Figure 17, the drain voltage of SR has

ringing around zero at lightꢀload condition after the

switching transition of primaryꢀside switches. When

DETL voltage rises above 2V within 350ns after DETL

voltage drops to zero and stays above 2V longer than

150ns, the gate is shrunk by 1.2ꢁs (t_SHRINKꢀRNG), as

shown in Figure 17.

Figure 14.Gate Shrink by Insufficient Dead Time

2. When the feedback information changes fast. FAN6208

monitors the current through the optoꢀcoupler diode by

measuring the voltage across the resistor in series with

optoꢀdiode, as depicted in Figure 15. If the feedback

current through the opto diode increases by more than

20% of the feedback current of the previous switching

cycle, SR gate signal is shrunk by t_SHRINKꢀFD(about

1.4ꢁs) for t_{DꢀSHRINKꢀFD}(about 90ꢁs), shown in Figure 16.

Figure 17.Gate Shrink by the DETL Voltage Ringing

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

Printed Circuit Board Layout

In Figure 18, the power traces are marked as bold lines.

Good PCB layout improves power system efficiency and

reliability and minimizes EMI.

ꢀ

As indicated by 4, the ground of the feedback loop

should be connected to the negative terminal of

output capacitor C_O.

ꢀ

Trace 5 should be long and far from V_oterminal.

Keep trace 6 as short as possible.

As indicated by 7, the source terminals of Q₁and Q₂

are connected to the negative terminal of C_o. Keep

trace 10 short, direct, and wide.

Guidelines

ꢀ

For feedback detection, the FD pin should be connected

to the anode of the opto diode. Connecting the FD pin

through a resistor can improve surge immunity of the

system. Keep trace 1 away from any power trace with

high pulsating current.

ꢀ

As indicated by 8, the negative terminal of C_oshould

be connected to the case directly.

ꢀ

The control ground (trace 2) and power ground (trace 7)

should meet at a single point to minimize interference.

The connecting trace should be as short as possible.

Figure 18.Layout Considerations

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

Design Example

The following example is a 12V/300W single output power

supply with LLC resonant converter topology. As Figure 19

shows, the FAN7621 controller is used for the LLC resonant

converter. The integrated CCM PFC controller FAN6982 is

used for PFC stage.

Table 1.

System Specification

Input Voltage Range

PFC Output

90~264V_AC

360~390V_DC

FAN6982

FAN7621

12V

PFC Controller

Main power Controller

Output Voltage (Vo)

Output Power (Po)

PFC Switching Frequency

The key system parameters are listed in Table 1 and the Bill

of Materials (BOM) is summarized in Table 2.

300W

65kHz

The twoꢀlevel PFC output voltage function of FAN6982 is

used where the typical PFC output voltage is 390V. The

PFC output voltage is reduced to 360V for lowꢀline and

lightꢀload condition to improve efficiency of the PFC stage.

The typical switching frequency (f_s) is 65kHz for PFC stage.

LLC resonant converter Switching Frequency 60~140kHz

The turn ratio n of TX₁is 13.5, L_mis 1.2mH, L_ris 150ꢁH,

and C_ris 47nH. 1N4148 is used for D201 & D202 whose

voltage rating is 100V. 27kꢂ is used for R204 (R_RP) for the

LowꢀFrequency Mode setting.

Figure 19.Complete Circuit Diagram

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

Table 2. Bill of Materials

Part

Value

Resistor

Note

Part

Value

Note

Capacitor

10ꢂF

R₁₀₁

R₁₀₂

R₁₀₃

R₁₀₄

R₁₀₅

R₁₀₆

R₁₀₇

R₁₀₈

R₁₀₉

R₁₁₀

R₂₀₁

R₂₀₂

R₂₀₃

R₂₀₄

R₂₀₅

R₂₀₆

R₂₀₇

R₂₀₈

R₂₀₉

R₂₁₀

R₂₁₁

R₂₁₂

1/4W

1/8W

2W

C₁₀₈

C₂₀₁

C₂₀₂

C₂₀₃

C₂₀₄

C₂₀₅

C₂₀₆

C₃₀₁

25V

16V

10ꢁ

3.3ꢁ

10kꢁ

1kꢁ

3300ꢂF

16V

47nF

50V

47nF

50V

470nF

25V

100nF

50V

0.2ꢁ

5.1kꢁ

9.1kꢁ

5.6kꢁ

10kꢁ

27kꢁ

10kꢁ

1kꢁ

1/8W

22nF/250V

Transformer

L_r=10ꢂH/ L_m=1200ꢂH

Diode

YꢀCapacitor

TX₁

PQ3230

D₁₀₁

D₁₀₂

D₁₀₃

D₂₀₁

D₂₀₂

UF1007

1A/1000V

1N4148

Inductor

L = 150ꢂH

L = 1.8ꢂH

MOSFET

FCPF11N60F

FDP025N06

IC

L101

L201

QP2914

91kꢁ

1kꢁ

Q₁

Q₂

Q₃

Q₄

33kꢁ

24kꢁ

Capacitor

C₁₀₁

C₁₀₂

C₁₀₃

C₁₀₄

C₁₀₅

C₁₀₆

C₁₀₇

270ꢂF

0.33ꢂF

150nF

47nF

450V

50V

1kV

50V

U₁

U₂

U₃

U₄

FAN7621

PC817

LLC Controller

SR Controller

12nF

FAN6208

TL431

100pF

680pF

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

Figure 20 and Figure 21 show the SR gate drive waveforms

for different R_P. As can be seen, the dead time of SR drive

can be programmed.

The efficiency test results of the Schottky diode and

synchronous rectification are shown in Table 3 and Table 4.

Figure 22 compares the efficiencies of Schottky diode and

synchronous rectification. As can be seen, 1~2% efficiency

improvement can be obtained using synchronous

rectification. Figure 22 also shows how the dead time of SR

affects the efficiency. By fineꢀtuning the dead time,

efficiency can be maximized.

Table 3. Efficiency Measurements at V_AC=115V on

300W PC Power with Schottky Diodes (MBRP3045)

Output

Watts(W)

Load

Input Watts(W)

Efficiency

100%

50%

20%

358.070

176.38

73.30

307.658

154.91

62.19

85.920%

87.82%

84.80%

Table 4. Efficiency Measurements at V_AC=115V on

300W PC Power with SRs (FDP025N06 and

R_RP=30kꢁ)

Input

Watts

(W)

Output

Watts

(W)

vs.

Efficiency Schottky

Diode

Load

Figure 20.Secondary Side Current and SR

Gate Signal by R_RP=24kꢁ

100%

50%

20%

347.70

172.81

72.41

307.62

154.77

62.21

88.47%

89.56%

85.91%

+2.55%

+1.74%

+1.11%

Figure 22.Efficiency Analysis

Figure 21.Secondary Side Current and SR

Gate Signal by R_RP=27kꢁ

Rev. 1.0.1 • 3/10/11

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ANꢀ6208

APPLICATION NOTE

Related Resources

FAN6208 — Secondary Synchronous Rectifier Controller for LLC Topology

FAN7621 — PFM Controller for HalfꢀBridge Resonant Converters

FAN6982 — CCM Power Factor Correction Controller

FDP025N06 —FDP025N06 NꢀChannel PowerTrench® MOSFET 60V,265A, 2.5mꢁ

1N/FDLL 914/A/B / 916/A/B / 4148 / 4448 — Small Signal Diode

FSFR2100 — Fairchild Power Switch for HalfꢀBridge Resonant Converters

AN4137 — Design Guidelines for Offꢀline Flyback Converters Using Fairchild Power Switch (FPS)

ANꢀ4151 — HalfꢀBridge LLC Resonant Converter Design Using FSFRꢀSeries Fairchild Power Switch (FPS)

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS

HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE

APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS

PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or

(b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be reasonably

expected to cause the failure of the life support device or

system, or to affect its safety or effectiveness.

Rev. 1.0.1 • 3/10/11

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型号：	AN-6208
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Secondary-Side Synchronous Rectifier (SR) for LLC Resonant Converter 二次侧同步整流器（ SR）的LLC谐振转换器转换器
文件：	总10页 (文件大小：471K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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