TDA7344P [STMICROELECTRONICS]

DIGITAL CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX; 环绕声矩阵数字控制音频处理器
TDA7344P
型号: TDA7344P
厂家: ST    ST
描述:

DIGITAL CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX
环绕声矩阵数字控制音频处理器

文件: 总20页 (文件大小:202K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TDA7344  
DIGITAL CONTROLLED AUDIO PROCESSOR  
WITH SURROUND SOUND MATRIX  
1 STEREO INPUT  
VOLUME CONTROL IN 1.25dB STEP  
TREBLE AND BASS CONTROL  
THREE SURROUND MODES ARE AVAIL-  
ABLE:  
– MOVIE, MUSIC AND SIMULATED  
FOUR SPEAKER ATTENUATORS:  
– 4 INDEPENDENT SPEAKERS CONTROL  
IN 1.25dBSTEPS FOR BALANCE FACILITY  
– INDEPENDENT MUTE FUNCTION  
PQFP44  
(10 X 10)  
SDIP42  
ORDERING NUMBERS: TDA7344P (PQFP44)  
TDA7344S (SDIP42)  
ALL FUNCTIONS PROGRAMMABLE VIA SE-  
RIAL BUS  
shifters and a signal matrix. Control of all the  
functions is accomplished by serial bus.  
The AC signal setting is obtained by resistor net-  
works and switches combined with operational  
amplifiers.  
Thanks to the used BIPOLAR/CMOSTechnology,  
Low Distortion, Low Noise and DC stepping are  
obtained.  
DESCRIPTION  
The TDA7344 is a volume tone (bass and treble)  
balance (Left/Right) processor for quality audio  
applications in car radio and Hi-Fi systems.  
It reproduces surround sound by using phase  
PIN CONNECTIONS  
1/20  
February 1997  
TDA7344  
BLOCK DIAGRAM  
2/20  
TDA7344  
TEST CIRCUIT  
THERMAL DATA  
Symbol  
Description  
Value  
Unit  
Rth j-pins  
Thermal Resistance Junction-pins  
Ma x.  
85  
°C/W  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
VS  
Tamb  
Tstg  
Operating Supply Voltage  
11  
V
Operating Ambient Temperature  
Storage Temperature Range  
-10 to 85  
C
°
-55 to +150  
°C  
QUICK REFERENCE DATA  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
Unit  
V
VS  
VCL  
THD  
S/N  
SC  
Supply Voltage  
7
2
9
10.5  
Max. input signal handling  
Vrms  
%
Total Harmonic Distortion V = 1Vrms f = 1KHz  
Signal to Noise Ratio V out = 1Vrms (made = OFF)  
Channel Separation f = 1KHz  
Volume Control 1.25dB step  
0.02  
106  
70  
0.1  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
-78.75  
-14  
0
Treble Control (2db step)  
+14  
+14  
0
Bass Control (2db step)  
-14  
Balance Control 1.25dB step (LCH, RCH)  
Mute Attenuation  
-38.75  
90  
3/20  
TDA7344  
ELECTRICAL CHARACTERISTICS  
(refer to the test circuit Tamb = 25°C, VS = 9V, RL = 10K ,  
RG = 600, all controls flat (G = 0),Effect Ctrl = -6dB, MODE = OFF; f = 1KHz  
unless otherwise specified)  
Symbol  
Parameter  
Test Condition  
Min.  
Typ.  
Max.  
Unit  
SUPPLY  
VS  
IS  
Supply Voltage  
7
9
10.5  
35  
V
Supply Current  
Ripple Rejection  
20  
60  
25  
80  
mA  
dB  
SVR  
LCH / RCH out, Mode = OFF  
INPUT STAGE  
RII  
Input Resistance  
35  
2
50  
2.5  
65  
K  
Vrms  
Vrms  
dB  
VCL  
Clipping Level  
THD = 0.3%; Lin or Rin  
THD = 0.3%; Rin + Lin (2)  
3.0  
CRANGE  
AVMIN  
AVMAX  
ASTEP  
VDC  
Control Range  
Min. Attenuation  
Max. Attenuation  
Step Resolution  
DC Steps  
19.68  
0
-1  
18.68  
0.11  
-3  
1
20.68  
0.51  
3
dB  
19.68  
0.31  
0
dB  
dB  
adjacent att. step  
mV  
VOLUME CONTROL  
CRANGE  
AVMIN  
AVMAX  
ASTEP  
EA  
Control Range  
70  
-1  
75  
0
dB  
dB  
dB  
dB  
Min. Attenuation  
Max. Attenuation  
Step Resolution  
1
70  
0.5  
75  
1.25  
0
Av = 0 to -40dB  
1.75  
Attenuation Set Error  
Av = 0 to -20dB  
Av = -20 to -60dB  
-1.5  
-3  
1.5  
2
dB  
dB  
ET  
Tracking Error  
DC Steps  
2
dB  
VDC  
adjacent attenuation steps  
From 0dB to Av max  
-3  
-5  
0
0.5  
3
5
mV  
mV  
BASS CONTROL (1)  
Gb  
BSTEP  
RB  
Control Range  
Max. Boost/cut  
+11.5  
1
+14  
2
+16  
3
dB  
dB  
KΩ  
Step Resolution  
Internal Feedback Resistance  
32  
44  
56  
TREBLE CONTROL (1)  
Gt  
Control Range  
Max. Boost/cut  
+13  
0.5  
+14  
2
+15  
1.5  
dB  
dB  
TSTEP  
Step Resolution  
EFFECT CONTROL  
CRANGE  
SSTEP  
Control Range  
Step Resolution  
- 21  
- 6  
dB  
dB  
1
4/20  
TDA7344  
ELECTRICAL CHARACTERISTICS  
(continued)  
SURROUND SOUND MATRIX  
Symbol  
Parameter  
Test Condition  
Min.  
Typ.  
Max.  
Unit  
GOFF  
In-phase Gain (OFF)  
Mode OFF, Input signal of  
-1.5  
0
1.5  
dB  
1kHz, 1.4 Vp-p, Rin Rout  
Lin  
L
out  
DGOFF  
GMOV1  
GMOV2  
DGMOV  
GMUS1  
GMUS2  
DGMUS  
LMON1  
LMON2  
LMON3  
RMON1  
RMON2  
RMON3  
LR In-phase Gain Difference  
(OFF)  
Mode OFF, Input signal of  
1kHz, 1.4 Vp-p  
-1.5  
0
7
1.5  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
KΩ  
(Rin Rout), (L Lout  
)
in  
In-phase Gain (Movie 1)  
In-phase Gain (Movie 2)  
Movie mode, Effect Ctrl = -6dB  
Input signal of 1kHz, 1.4 Vp-p  
R
in Rout, Lin Lout  
Movie mode, Effect Ctrl = -6dB  
Input signal of 1kHz, 1.4 Vp-p  
8
R
in Rout, Lin Lout  
LR In-phase Gain Diffrence  
(Movie)  
Movie mode, Effect Ctrl = -6dB  
Input signal of 1kHz, 1.4 Vp-p  
0
(Rin Rout) – (L Lout  
)
in  
In-phase Gain (Music 1)  
In-phase Gain (Music 2)  
Music mode, Effect Ctrl = -6dB  
Input signal of 1kHz, 1.4 Vp-p  
6
(Rin Rout) – (L Lout  
)
in  
Music mode, Effect Ctrl = -6dB  
Input signal of 1kHz, 1.4 Vp-p  
7.5  
0
Rin  
Rout, Lin  
L
out  
LR In-phase Gain Difference  
(Music)  
Music mode, Effect Ctrl = -6dB  
Input signal of 1kHz, 1.4 Vp-p  
(Rin  
R
out) – (L  
L )  
out  
in  
Simulated L Output 1  
Simulated L Output 2  
Simulated L Output 3  
Simulated R Output 1  
Simulated R Output 2  
Simulated R Output 3  
Simulated Mode, EffectCtrl= -6dB  
Input signal of 250Hz,  
4.5  
– 4.0  
7.0  
– 4.5  
3.8  
– 20  
1.4 Vp-p, R and Lin  
L
out  
in  
Simulated Mode, EffectCtrl= -6dB  
Input signal of 1kHz,  
1.4 Vp-p, R and Lin Lout  
in  
Simulated Mode, EffectCtrl= -6dB  
Input signal of 3.6kHz,  
1.4 Vp-p, R and Lin Lout  
in  
Simulated Mode, EffectCtrl= -6dB  
Input signal of 250Hz,  
1.4 Vp-p, R and Lin Rout  
in  
Simulated Mode, EffectCtrl= -6dB  
Input signal of 1kHz,  
1.4 Vp-p, R and Lin Rout  
in  
Simulated Mode, EffectCtrl= -6dB  
Input signal of 3.6kHz,  
1.4 Vp-p, R and Lin Rout  
in  
RLP1  
RPS1  
RPS2  
RPS3  
RPS4  
RHPF  
RLPF  
Low Pass Filter Resistance  
Phase Shifter 1 Resistance  
Phase Shifter 2 Resistance  
Phase Shifter 3 Resistance  
Phase Shifter 4 Resistance  
High Pass Filter Resistance  
LP Pin Impedance  
7.5  
13.5  
0.3  
10  
17.95  
0.4  
12.5  
22.5  
0.5  
k
KΩ  
KΩ  
KΩ  
13.6  
13.6  
45  
18.08  
18.08  
60  
22.6  
22.6  
75  
K
7.5  
10  
12.5  
KΩ  
5/20  
TDA7344  
ELECTRICAL CHARACTERISTICS (continued)  
Symbol  
Parameter  
Test Condition  
Min.  
Typ.  
Max.  
Unit  
SPEAKER ATTENUATORS  
Crange  
SSTEP  
EA  
Control Range  
35  
0.5  
-1.5  
80  
37.5  
1.25  
40  
1.75  
1.5  
dB  
dB  
dB  
dB  
Step Resolution  
Attenuation set error  
Output Mute Attenuation  
DC Steps  
AMUTE  
VDC  
90  
adjacent att. steps  
from 0 to mute  
0
1
mV  
mV  
SPEAKER ATTENUATORS AUX  
Crange  
SSTEP  
EA  
Control Range  
70  
0.5  
-1.5  
-3  
75  
1.25  
0
dB  
dB  
dB  
dB  
mV  
dB  
Step Resolution  
Attenuation set error  
Av = 0 to -40dB  
Av = 0 to 20dB  
1.75  
1.5  
2
Av = -20 to -60dB  
adjacent att. steps  
0
VDC  
DC Steps  
-3  
0
3
AMUTE  
Output Mute Attenuation  
80  
90  
AUDIO OUTPUTS  
VOCL  
ROUT  
VOUT  
Clipping Level  
d = 0.3%  
2
2.5  
200  
4.5  
Vrms  
Output resistance  
DC Voltage Level  
100  
4.2  
300  
4.8  
V
GENERAL  
NO(OFF)  
Output Noise (OFF)  
BW = 20Hz to 20KHz  
Output R and L  
8
15  
15  
30  
µVrms  
Output AUX R and L  
Vrms  
µ
NO(MOV)  
NO(MUS)  
NO(MON)  
Output Noise (Movie)  
Output Noise (Music)  
Output Noise (Simulated)  
Mode =Movie ,  
BW = 20Hz to 20KHz  
30  
30  
30  
Vrms  
µ
Rout and Lout measurement  
Mode = Music ,  
BW = 20Hz to 20KHz,  
Vrms  
Vrms  
µ
µ
Rout and Lout measurement  
Mode = Simulated,  
BW = 20Hz to 20KHz  
Rout and Lout measurement  
d
Distorsion  
Av = 0 ; Vin = 1Vrms  
0.02  
70  
0.1  
1
%
SC  
Channel Separation  
60  
dB  
BUS INPUTS  
VIL  
VIH  
IIN  
Input Low Voltage  
Input High Voltage  
Input Current  
V
V
3
-5  
+5  
µA  
V
VO  
Output Voltage SDA  
Acknowledge  
IO = 1.6mA  
0.4  
0.8  
Note:  
(1) Bass and Treble response: The center frequency and the resonance quality can be choosen by  
the external circuitry. A standard first order bass response can be realized by a standard feedback network.  
VS  
2
(2) The peack voltage of the two input signals must be less then  
VS  
:
(Lin + Rin) peak AVin  
<
2
6/20  
TDA7344  
2C BUS INTERFACE  
knowledge bit. The MSB is transferredfirst.  
Acknowledge  
I
Data transmission from microprocessor to the  
TDA7344 and viceversa takes place through the  
2 wires I2C BUS interface, consisting of the two  
lines SDA and SCL (pull-up resistors to positive  
supply voltage must be connected).  
The master (µP) puts a resistive HIGH level on the  
SDA line during the acknowledge clock pulse (see  
fig. 5). The peripheral (audioprocessor) that ac-  
knowledges has to pull-down (LOW) the SDA line  
during the acknowledge clock pulse, so that the  
SDA line is stable LOW duringthis clock pulse.  
The audioprocessor which has been addressed  
has to generate an acknowledge after the recep-  
tion of each byte, otherwise the SDA line remains  
at the HIGH level during the ninth clock pulse  
time. In this case the master transmitter can gen-  
erate the STOP information in order to abort the  
transfer.  
Data Validity  
As shown in fig. 3, the data on the SDA line must  
be stable during the high period of the clock. The  
HIGH and LOW state of the data line can only  
change when the clock signal on the SCL line is  
LOW.  
Start and Stop Conditions  
As shown in fig.4 a start condition is a HIGH to  
LOW transition of the SDA line while SCL is  
HIGH. The stop condition is a LOW to HIGH tran-  
sition of the SDA line while SCL is HIGH.  
Transmission without Acknowledge  
Avoiding to detect the acknowledge of the audio-  
processor, the µP can use a simpler transmission:  
simply it waits one clock without checking the  
slave acknowledging, and sends the new data.  
Byte Format  
Every byte transferred on the SDA line must con-  
tain 8 bits. Each byte must be followed by an ac-  
This approach of course is less protected from  
misworking and decreases the noise immunity.  
2
Figure 3:  
Data Validity on the I CBUS  
2
Figure 4:  
Timing Diagram of I CBUS  
Figure 5: Acknowledge on the I2CBUS  
7/20  
TDA7344  
of each transmitted byte.  
A subaddress(function) bytes (identified by the  
MSB = 0)  
A sequence of dates and subaddresses (N  
bytes + achnowledge. The dates are identified  
by MSB = 1, subaddressesby MSB = 0)  
A stop condition (P)  
SOFTWARE SPECIFICATION  
Interface Protocol  
The interface protocol comprises:  
A start condition (s)  
A chip address byte, containing the TDA7344  
address (the 8th bit of the byte must be 0). The  
TDA7344 must always acknowledge at the end  
ACK = Achnowledge  
S = Start  
P = Stop  
So it can receive in a single transmission how  
many subaddress are necessary, and for each  
subaddresshow many data are necessary.  
INTERFACE FEATURES  
- Due to the fact that the MSB is used to select  
if the byte transmitted is a subaddress (func-  
tion) or a data (value), between a start and  
stop condition, is possible to receive, how  
many subaddressesand datas as wanted.  
- The subaddress (function) is fixed until a new  
subaddress is transmitted, so the TDA7344  
can receive how many data as wanted for the  
selected subaddress (without the need for a  
new start condition)  
2) INCREMENTAL BUS  
TDA7344 receives a start condition, the correct  
chip address a subaddress with the LSB = 1 (in-  
cremental bus): now it is in a loop condition with  
an autoincreaseof the subaddress.  
The first data that it receives doesn’t concern the  
subaddress sended but the next one, the second  
one concerns the subaddress sended plus two in  
the loop etc, and at the end it receives the stop  
condition.  
- If TDA7344 receives a subaddress with the  
LSB = 1 the incremental bus is selected, so it  
enters in a loop condition that means that  
every acknowledge will increase automat-  
ically the subaddress (function) and it re-  
ceives the data related to the new subad-  
dress.  
In the pictures there are some examples:  
S = start  
A
0
1
CHIP ADDRESS  
80 (HEX)  
EXAMPLES  
1) NO INCREMENTAL BUS  
82 (HEX)  
TDA7344 receives a start condition, the correct  
chip address, a subaddress with the LSB = 0 (no  
incremental bus), N-datas (all these datas con-  
cern the subaddress selected), a new subad-  
dress, N-data, a stop condition.  
ACK = acknowledge  
B = 1 incremental bus, B = 0 no incremental bus  
P = stop  
1) one subaddress, with n data concerning that subaddress(no incremental bus)  
8/20  
TDA7344  
2) one subaddress, (with incremental bus) , with n data (data1 that concerns subaddress+1, data 2  
that concerns subaddress+ 2 etc.)  
3) moresubaddress with more data  
DATA BYTES  
FUNCTION SELECTION  
FIRST BYTE (subaddress)  
The first byte select the function, it is identified by the MSB = 0  
MSB  
LSB  
SUBADDRESS  
A0  
A1  
A2  
A3  
B
0
0
0
0
0
X
X
X
X
X
B
VOLUME ATTENUATION &  
LOUDNESS  
1
0
0
X
B
SURROUND & OUT &  
EFFECT CONTROL  
0
0
0
0
0
0
0
0
1
0
1
0
1
1
1
1
0
0
1
1
1
0
0
1
1
1
1
1
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
B
B
B
B
B
B
B
BASS  
TREBLE  
ATT SPEAKER R  
ATT SPEAKER L  
ATT. ROUT AUX  
ATT. LOUT AUX  
INPUT STAGE CONTROL  
1
B = 1 yes incremental bus;  
B = 0 no incremental bus;  
X = indifferent 0,1  
9/20  
TDA7344  
VALUE SELECTION  
The second byte select the value, it is identified by the MSB = 1  
VOLUME ATTENUATION  
MSB  
LSB  
1.25 dB STEPS  
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-1.25  
-2.50  
-3.75  
-5.00  
-6.25  
-7.50  
-8.75  
10 dB STEPS  
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
-10  
-20  
-30  
-40  
-50  
-60  
-70  
SELECTION  
LOUDNESS  
ON  
1
1
0
1
OFF  
ATT AUX OUT1 AND 2  
MSB  
LSB  
1.25 dB STEPS  
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
0
1
0
1
0
1
0
-1.25  
-2.50  
-3.75  
-5.00  
-6.25  
-7.50  
-8.75  
10 dB STEPS  
0
0
1
1
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
-10  
-20  
-30  
-40  
-50  
-60  
-70  
MUTE  
OFF  
ON  
1
1
0
1
10/20  
TDA7344  
ATT SPEAKER R AND L  
MSB  
LSB  
1.25 dB STEPS  
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-1.25  
-2.50  
-3.75  
-5.00  
-6.25  
-7.50  
-8.75  
10 dB STEPS  
0
1
1
1
1
1
X
X
X
X
X
X
X
X
X
X
0
0
1
1
1
0
1
0
1
1
-10  
-20  
-30  
1
1
1
MUTE  
TREBLE/ BASS  
MSB  
LSB  
2 dB STEPS  
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
14  
12  
10  
8
6
4
2
0
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-2  
-4  
-6  
-8  
-10  
-12  
-14  
11/20  
TDA7344  
SURROUND & OUT & EFFECT CONTROL  
LSB  
MSB  
SELECTION  
SURROUND  
SELECTION  
1
1
1
1
0
0
1
1
0
1
0
1
SIMULATED  
MUSIC  
MOVIE  
OFF  
SELECTION  
SELECTION  
OUT  
1
1
0
1
OUT VAR  
OUT FIX  
EFFECT CONTROL  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-6  
-7  
-8  
-9  
-10  
-11  
-12  
-13  
-14  
-15  
-16  
-17  
-18  
-19  
-20  
-21  
For example to select the music mode, out fix, effect control =-9dB:  
1 0 0 1 1 1 0 1  
12/20  
TDA7344  
INPUT CONTROL RANGE (0 TO -19.68dB)  
LSB  
MSB  
0.3125 dB STEPS  
1
1
1
1
1
1
1
1
X
Xx  
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-0.3125  
-0.625  
-0.9375  
-1.25  
X
X
X
-1.5625  
-1.875  
-2.1875  
X
X
2.5 dB STEPS  
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-2.5  
-5.0  
-7.5  
-10  
-12.5  
-15  
-17.5  
POWER ON RESET  
VOLUME ATTENUATION  
MAX ATTENUATION, LOUDNESS OFF  
TREBLE  
BASS  
-14dB  
-14dB  
SURROUND & OUT CONTROL + EFFECT CONTROL  
ATT SPEAKER R  
OFF + FIX + MAX ATTENUATION  
MUTE  
MUTE  
MUTE  
MUTE  
ATT SPEAKER L  
ATT AUX OUT 1  
ATT AUX OUT 2  
13/20  
TDA7344  
PIN:  
PIN:  
HP2  
HP1  
PIN:  
PIN:  
LOUD -R, LOUB-L  
Lin, Rin  
PIN: AC - LO, AC - RO,  
PIN: AC - LIN, AC - RIN,  
14/20  
TDA7344  
PIN:  
PIN:  
PIN:  
PIN:  
PIN:  
PIN:  
BASS - LA, BASS - RA  
BASS - LB, BASS - RB  
-
VARO L, VARO -R  
TREBLE - L, TREBLE - R  
-
,
LOUT ROUT, LOUT AUX, ROUT AUX, REAR  
VARi L, VAR -R  
i
15/20  
TDA7344  
PIN:  
PIN:  
PIN:  
PIN:  
SCL, SDA  
ADDR  
PS3, PS2  
CREF  
PIN:  
LP  
PIN:  
PS3A, PS4A  
16/20  
TDA7344  
PIN:  
PIN:  
PS2A  
PS2  
PIN: PS1  
PIN: PS1A  
PIN:  
LP1  
17/20  
TDA7344  
PQFP44 PACKAGE MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
TYP.  
MAX.  
MIN.  
MAX.  
A
A1  
A2  
B
2.45  
0.096  
0.25  
1.95  
0.30  
0.13  
12.95  
9.90  
0.010  
0.077  
0.012  
0.005  
0.51  
2.00  
2.10  
0.45  
0.079  
0.083  
0.018  
0.009  
0.53  
c
0.23  
D
13.20  
10.00  
8.00  
13.45  
10.10  
0.52  
D1  
D3  
e
0.390  
0.394  
0.315  
0.031  
0.520  
0.394  
0.315  
0.031  
0.063  
0.398  
0.80  
E
12.95  
9.90  
13.20  
10.00  
8.00  
13.45  
10.10  
0.510  
0.390  
0.530  
0.398  
E1  
E3  
L
0.65  
0.80  
0.95  
0.026  
0.037  
L1  
K
1.60  
0°(min.), 7°(max.)  
D
D1  
D3  
A
A2  
A1  
23  
33  
22  
34  
0.10mm  
.004  
Seating Plane  
44  
12  
11  
1
C
e
K
PQFP44  
18/20  
TDA7344  
SDIP42 PACKAGE MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
TYP.  
MAX.  
MIN.  
MAX.  
A
A1  
A2  
B
5.08  
0.20  
0.51  
3.05  
0.020  
0.120  
0.0149  
0.035  
0.0090  
1.440  
0.60  
3.81  
0.46  
1.02  
0.25  
36.83  
4.57  
0.56  
0.150  
0.0181  
0.040  
0.180  
0.0220  
0.045  
0.0150  
1.460  
0.629  
0.570  
0.38  
B1  
c
0.89  
1.14  
0.23  
0.38  
0.0098  
1.450  
D
36.58  
15.24  
12.70  
37.08  
16.00  
14.48  
E
E1  
e
13.72  
1.778  
15.24  
0.50  
0.540  
0.070  
0.60  
e1  
e2  
e3  
L
18.54  
1.52  
3.56  
0.730  
0.060  
0.140  
2.54  
3.30  
0.10  
0.130  
E
E1  
B
B1  
e
e1  
e2  
D
c
E
42  
22  
.015  
0,38  
Gage Plane  
e3  
e2  
1
21  
SDIP42  
19/20  
TDA7344  
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No  
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned  
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-  
THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express  
written approval of SGS-THOMSON Microelectronics.  
1997 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved  
SGS-THOMSON Microelectronics GROUP OF COMPANIES  
Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -  
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.  
20/20  

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