TDA7346D [STMICROELECTRONICS]
DIGITAL CONTROLLED SURROUND SOUND MATRIX; 数字控制环绕声矩阵
| 型号： | TDA7346D |
| 厂家： | 
ST |
| 描述： | DIGITAL CONTROLLED SURROUND SOUND MATRIX |
| 文件： | 总14页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TDA7346
DIGITAL CONTROLLED SURROUND SOUND MATRIX
1 STEREO INPUT
THREE INDEPENDENT SURROUND MODES
ARE AVAILABLE MOVIE, MUSIC AND SIMU-
LATED
- MUSIC: 4 SELECTABLERESPONSES
- MOVIE AND SIMULATED:
256 SELECTABLE RESPONSES
TWO INDEPENDENT INPUT ATTENUATORS
IN 0.31dB FOR BALANCE FACILITY
ALL FUNCTIONS PROGRAMMABLE VIA SE-
RIAL BUS
DIP20
SO20
ORDERING NUMBER: TDA7346 (DIP20)
DESCRIPTION
TDA7346D (SO20)
The TDA7346 reproduces surround sound by us-
ing phase shifters and a signal matrix. Control of
all the functions is accomplished by serial bus.
The AC signal setting is obtained by resistor net-
works and switches combined with operational
amplifiers.
BLOCK DIAGRAM
5.6nF
LP1
680nF
HP2
100nF
PS1
4.7nF
PS2
22nF
PS3
22nF
PS4
HP1
100nF
L
RLP1
RHP1
RPS1
RPS2
RPS3
RPS4
MIXING
AMP
L
out
-in
R5
PS1
90Hz
PS2
4KHz
PS3
400Hz
PS4
400Hz
100K
R6
-
-
SIM
+
+
PHASE SHIFTER
MOVIE/SIM
MUSIC
OFF
MOVIE/
MUSIC
+
-
+
L-R
SCL
SDA
I2C BUS
DECODER
LATCHES
DIG GND
ADDR
LPF
9KHz
EFFECT
CONTROL
REAR
100nF
MIXING
AMP
R
out
R
-in
SUPPLY
CREF
100K
V
AGND
LP
D94AU122A
S
C5
22µF
1.2nF
1/14
February 1997
TDA7346
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
10.5
Unit
V
VS
Tamb
Tstg
Operating Supply Voltage
Operating Ambient Temperature
Storage Temperature Range
-40 to 85
-55 to +150
°C
°C
PIN CONNECTION
PS1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PS2
LP1
HP1
HP2
V
S
CREF
L
-in
LP
R
-in
REAR
PS3
PS4
L
out
SDA
SCL
R
out
ADDR
AGND
DIG GND
D94AU128
THERMAL DATA
Symbol
Description
Value
85
Unit
Rth j-pins
Thermal Resistance Junction-pins
Max.
°C/W
QUICK REFERENCE DATA
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
VS
VCL
THD
S/N
SC
Supply Voltage
7
2
9
10.2
Max. input signal handling
Vrms
%
Total Harmonic Distortion V = 1Vrms f = 1KHz
Signal to Noise Ratio V out = 1Vrms (mode = OFF)
Channel Separation f = 1KHz
0.02
106
70
0.1
dB
dB
2/14
TDA7346
TEST CIRCUIT
REAR
6
L
SCL
9
SDA
8
out
HP1
HP2
LP
7
18
17
4
5
680nF
C16
1.2nF
C6
0.1µF
0.1µF
R
-in
L
16
19
-in
LP1 C7
PS1
C17
V
S
5.6nF
C15
10µF C1
TDA7346
2
1
100nF
C14
100nF
C2
PS3
PS4
PS2
15
14
20
22nF
C4
4.7nF
C13
CREF
3
22nF
C5
22µF
C3
13
11
10
12
ADDR
D93AU040C
R
out
AGND
DIG GND
ELECTRICAL CHARACTERISTICS
Ω
(refer to the test circuit Tamb = 25°C, VS = 9V, RL = 10K ,
RG = 600Ω, all controls flat (G = 0),Effect Ctrl = -6dB, MODE = OFF; f = 1KHz
unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SUPPLY
VS
IS
Supply Voltage
7
9
10.2
V
Supply Current
Ripple Rejection
10
80
mA
dB
SVR
LCH / RCH out, Mode = OFF
60
INPUT STAGE
RII
Input Resistance
100
2.5
3.0
20
K
Ω
VCL
Clipping Level
THD = 0.3%; Lin or Rin
2
Vrms
Vrms
dB
THD = 0.3%; Rin + Lin (2)
CRANGE
AVMIN
AVMAX
ASTEP
VDC
Control Range
Min. Attenuation
Max. Attenuation
Step Resolution
DC Steps
-1
0
1
dB
20
dB
0.31
0
dB
adjacent att. step
mV
EFFECT CONTROL
CRANGE
SSTEP
Control Range
Step Resolution
- 21
- 6
dB
dB
1
3/14
TDA7346
ELECTRICAL CHARACTERISTICS
SURROUND SOUND MATRIX
(continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
GOFF
In-phase Gain (OFF)
Mode OFF, Input signal of
-1.5
0
1.5
dB
1kHz, 1.4 Vp-p, Rin → Rout
Lin
L
out
→
DGOFF
GMOV1
GMOV2
DGMOV
GMUS1
GMUS2
DGMUS
LMON1
LMON2
LMON3
LR In-phase Gain Difference
(OFF)
Mode OFF, Input signal of
1kHz, 1.4 Vp-p
-1.5
0
7
1.5
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
(Rin
Rout), (Lin
L )
→
out
→
In-phase Gain (Movie 1)
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Movie mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 Vp-p
R
in → Rout, Lin → Lout
In-phase Gain (Movie 2)
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Movie mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 Vp-p
8
R
in → Rout, Lin → Lout
LR In-phase Gain Difference
(Movie)
Movie mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 Vp-p
0
(Rin
R
out) – (L
L )
→
out
→
in
In-phase Gain (Music 1)
RPS1 = POR PRESET
Music mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 Vp-p
6
(Rin
R
out) – (L
L )
→
out
→
in
In-phase Gain (Music 2)
RPS1 = POR PRESET
Music mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 Vp-p
7.5
0
R
in → Rout, Lin → Lout
LR In-phase Gain Difference
(Music)
Music mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 Vp-p
(Rin → Rout) – (Lin → Lout
)
Simulated L Output 1
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Simulated Mode, EffectCtrl= -6dB
Input signal of 250Hz,
1.4 Vp-p, Rin and Lin → Lout
4.5
– 4.0
7.0
Simulated L Output 2
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Simulated Mode, EffectCtrl= -6dB
Input signal of 1kHz,
1.4 Vp-p, Rin and L
L
out
→
in
Simulated L Output 3
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Simulated Mode, EffectCtrl= -
6dB
Input signal of 3.6kHz,
1.4 Vp-p, Rin and L
L
out
→
in
RMON1
RMON2
RMON3
Simulated R Output 1
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Simulated Mode, EffectCtrl= -6dB
Input signal of 250Hz,
– 4.5
3.8
dB
dB
dB
1.4 Vp-p, Rin and L
R
→
in
out
Simulated R Output 2
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Simulated Mode, EffectCtrl= -6dB
Input signal of 1kHz,
1.4 Vp-p, Rin and Lin →Rout
Simulated R Output 3
RPS1, RPS2, RPS3, RPS4 =
POR Preset
Simulated Mode, EffectCtrl= -6dB
Input signal of 3.6kHz,
1.4 Vp-p, Rin and Lin → Rout
– 20
RLP1
RPS1
RPS2
RPS3
RPS2
RHPI
RLPF
Low Pass Filter Resistance
Phase Shifter 1 Resistance
Phase Shifter 2 Resistance
Phase Shifter 3 Resistance
Phase Shifter 4 Resistance
High Pass Filter Resistance
LP Pin Impedance
10
17.95
8.465
18.050
18.050
60
KΩ
kΩ
at POR
at POR
at POR
at POR
K
K
Ω
Ω
KΩ
KΩ
KΩ
10
4/14
TDA7346
ELECTRICAL CHARACTERISTICS
(continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
AUDIO OUTPUTS
VOCL
ROUT
VOUT
Clipping Level
Output resistance
d = 0.3%
2
2.5
200
3.8
Vrms
Ω
100
3.5
300
4.1
DC Voltage Level
V
GENERAL
NO(OFF)
Output Noise (OFF)
Output Noise (Movie)
BW = 20Hz to 20KHz
out and Lout measurement
8
µVrms
R
NO(MOV)
NO(MUS)
NO(MON)
Mode =Movie ,
BW = 20Hz to 20KHz
30
Vrms
µ
Rout and Lout measurement
Output Noise (Music)
Mode = Music ,
BW = 20Hz to 20KHz,
30
30
µVrms
µVrms
Rout and Lout measurement
Output Noise (Simulated)
Mode = Simulated,
BW = 20Hz to 20KHz
Rout and Lout measurement
d
Distorsion
Av = 0 ; Vin = 1Vrms
0.02
70
0.1
1
%
SC
Channel Separation
dB
BUS INPUTS
VIL
VIH
IIN
Input Low Voltage
Input High Voltage
Input Current
V
V
3
-5
+5
A
µ
VO
Output Voltage SDA
Acknowledge
IO = 1.6mA
0.4
0.8
V
Note:
(1) Bass and Treble response: The center frequency and the resonance quality can be choosen by
the external circuitry. A standard first order bass response can be realized by a standard feedback network.
VS
2
(2) The peak voltage of the two input signals must be less then
VS
:
(Lin + Rin) peak • AVin
<
2
5/14
TDA7346
2C BUS INTERFACE
knowledge bit. The MSB is transferred first.
I
Data transmission from microprocessor to the
TDA7346 and viceversa takes place through the
2 wires I2C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supply voltage must be connected).
Acknowledge
The master (µP) puts a resistive HIGH level on the
SDA line during the acknowledge clock pulse (see
fig. 5). The peripheral (audioprocessor) that ac-
knowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDAline is stable LOW duringthis clock pulse.
The audioprocessor which has been addressed
has to generate an acknowledge after the recep-
tion of each byte, otherwise the SDA line remains
at the HIGH level during the ninth clock pulse
time. In this case the master transmitter can gen-
erate the STOP information in order to abort the
transfer.
Data Validity
As shown in fig. 3, the data on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
Start and Stop Conditions
As shown in fig.4 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop condition is a LOW to HIGH tran-
sition of the SDA line while SCL is HIGH.
Transmission without Acknowledge
Avoiding to detect the acknowledge of the audio-
processor, the µP can use a simpler transmission:
simply it waits one clock without checking the
slave acknowledging,and sends the new data.
Byte Format
Every byte transferred on the SDA line must con-
tain 8 bits. Each byte must be followed by an ac-
This approach of course is less protected from
misworking and decreases the noise immunity.
2
Figure 3:
Data Validity on the I CBUS
2
Figure 4:
Timing Diagram of I CBUS
Figure 5: Acknowledge on the I2CBUS
6/14
TDA7346
address (the 8th bit of the byte must be 0). The
TDA7346 must always acknowledge at the end
of each transmitted byte.
A sequenceof data (N bytes + achnowledge).
A stop condition (P)
SOFTWARE SPECIFICATION
InterfaceProtocol
The interface protocol comprises:
A start condition (s)
A chip address byte, containing the TDA7346
TDA7346 ADDRESS
first byte
MSB
1
LSB
0
MSB
LSB
MSB
LSB
S
1
0
1
1
1
A
DATA
DATA
P
ACK
ACK
ACK
Data Transferred (N-bytes + Acknowledge)
ACK = Acknowledge
S = Start
P = Stop
MAX CLOCK SPEED 100kbits/s
SOFTWARE SPECIFICATION
Chip address
A
0
1
CHIP ADDRESS
DC (HEX)
DE (HEX)
1
1
0
1
1
1
A
0
LSB
MSB
A = Logic level on pin ADDR
A = 1 if ADDR pin = open
A = 0 if ADDR pin = connected to ground
Software Specification
MSB
LSB
SUBADDRESS
0
0
1
1
1
1
1
1
1
1
1
1
0
1
A5
A5
M0
0
A4
A4
A3
A3
A2
A2
A1
A0
A0
INPUT ATTENUATION R
INPUT ATTENUATION L
SURROUND MODES
SIMULATED MODE
MUSIC MODE
A1
M1
0
0
1
1
0
MOVIE MODE
1
1
1
1
0
0
0
0
1
B3
0
1
B2
0
1
1
OFF MODE
M1
M1
M1
M1
M1
M0
M0
M0
M0
M0
B1
C1
C1
D1
E1
B0
C0
C0
D0
E0
EFFECT CONTROL
PHASE SHIFTER 4 CONTROL
PHASE SHIFTER 3 CONTROL
PHASE SHIFTER 2 CONTROL
PHASE SHIFTER 1 CONTROL
0
1
1
0
1
1
7/14
TDA7346
INPUT ATTENUATION
MSB
LSB
0.3125 dB STEPS
I
A5
A4
A3
A2
0
A1
0
A0
0
0
0
0
0
0
0
0
0
0
-0.3125
-0.625
-0.9375
-1.25
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
-1.5625
-1.875
-2.1875
2.5 dB STEPS
0
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
-2.5
-5
-7.5
-10
-12.5
-15
-17.5
I = 0 AttenuationInput R
I = 1 AttenuationInput L
Example: to program an R input attenuationequal to -11.25 you have to send 00100100
EFFECT CONTROL (-6 / -21dB)
MSB
LSB
1dB STEPS
B3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
B2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
B1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
B0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
-6
-7
-8
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
8/14
TDA7346
PHASE SHIFTER 3, 4
MSB
LSB
RESISTOR VALUE (KΩ)
C1
C0
0
1
1
1
1
M1
M1
M1
M1
M0
M0
M0
M0
0
0
0
0
0
0
0
0
F
F
F
F
0
0
1
1
12.060
14.450
18.050
39.100
1
0
1
F = 0 Phase Shifter 4
F = 1 Phase Shifter 3
PHASE SHIFTER 2
MSB
LSB
RESISTOR VALUE (K )
Ω
D1
0
D0
0
1
1
1
1
M1
M1
M1
M1
M0
M0
M0
M0
0
0
0
0
1
0
0
0
0
5.640
6.770
8.465
18.300
1
1
1
0
1
1
0
1
1
PHASE SHIFTER 1
MSB
LSB
RESISTOR VALUE (K )
Ω
E1
0
E0
0
1
1
1
1
M1
M1
M1
M1
M0
M0
M0
M0
0
0
0
0
1
1
1
1
1
11.745
14.150
17.950
37.625
1
1
1
0
1
1
0
1
1
Example: to program MOVIE MODE with EFFECT control = -7dB with PHASE SHIFTER resistor =
11.745KΩ, PHASE SHIFTER 2 resistor = 6.77KΩ, PHASE SHIFTER 3 resistor = 12.06KΩ, PHASE
SHIFTER 4 resistor = 18.05KΩ, you have to send in sequence5 bytes:
11010001
11001100
11001001
11000100
11000010
POWER ON RESET
INPUT ATTENUATION
-19.375dB
-20dB
EFFECT CONTROL
SURROUND MODE
OFF MODE
PHASE SHIFTER 1 RESISTOR VALUE
PHASE SHIFTER 2 RESISTOR VALUE
PHASE SHIFTER 3, 4 RESISTOR VALUE
17.950 K
Ω
8.465 K
Ω
18.050 K
Ω
9/14
TDA7346
PIN:
PIN:
HP2
HP1
LP1
VS
VS
10K
60K
20µA
5.5K
60K
5.5K
GND
HP1
D94AU199
HP2
D94AU198
PIN: Lin, Rin
PIN: LOUT, ROUT, REAR
VS
VS
20µA
20µA
100Ω
100K
Vref
D94AU204
D94AU123
PIN:
SCL, SDA
PIN:
ADDR
VS
20µA
20µA
100K
D94AU205
D94AU212
10/14
TDA7346
PIN:
PIN:
LP
PS3, PS2
VS
VS
20µA
20µA
10K
18.050K
PS3A
PS4A
D94AU124
D94AU206
PIN: CREF
PIN: PS2
VS
VS
20µA
20µA
20K
20K
8.465K
PS2A
D94AU208
D94AU125
PIN:
PIN:
LP1
PS1
VS
VS
20µA
20µA
17.95K
10K
PS1A
HP1
D94AU211
D94AU126
11/14
TDA7346
SO20 PACKAGE MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
2.65
0.3
MIN.
MAX.
0.104
0.012
0.096
0.019
0.013
A
a1
a2
b
0.1
0.004
2.45
0.49
0.32
0.35
0.23
0.014
0.009
b1
C
0.5
0.020
c1
D
45 (typ.)
°
12.6
10
13.0
0.496
0.394
0.512
0.419
E
10.65
e
1.27
0.050
0.450
e3
F
11.43
7.4
0.5
7.6
0.291
0.020
0.299
0.050
0.030
L
1.27
0.75
M
S
8 (max.)
°
12/14
TDA7346
DIP20 PACKAGE MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
0.254
1.39
TYP.
MAX.
MIN.
0.010
0.055
MAX.
a1
B
b
1.65
0.065
0.45
0.25
0.018
0.010
b1
D
E
e
25.4
1.000
8.5
2.54
22.86
0.335
0.100
0.900
e3
F
7.1
0.280
0.155
I
3.93
L
3.3
0.130
Z
1.34
0.053
13/14
TDA7346
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-
THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.
1997 SGS-THOMSON Microelectronics – Printedin Italy – All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
14/14
相关型号：
©2020 ICPDF网 联系我们和版权申明