STW29NK50Z [STMICROELECTRONICS]
N-CHANNEL 500 V - 0.105ohm - 31A TO-247 Zener-Protected SuperMESH MOSFET; N沟道500 V - 0.105ohm - 31A TO- 247齐纳保护超网MOSFET型号: | STW29NK50Z |
厂家: | ST |
描述: | N-CHANNEL 500 V - 0.105ohm - 31A TO-247 Zener-Protected SuperMESH MOSFET |
文件: | 总10页 (文件大小:476K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
STW29NK50Z
N-CHANNEL 500 V - 0.105Ω - 31A TO-247
Zener-Protected SuperMESH™ MOSFET
Table 1: General Features
Figure 1: Package
TYPE
VDSS
RDS(on)
ID
PW
STW29NK50Z
500 V
< 0.13 Ω 31 A 350 W
I TYPICAL RDS(on) = 0.105 Ω
I EXTREMELY HIGH dv/dt CAPABILITY
I 100% AVALANCHE TESTED
I GATE CHARGE MINIMIZED
I VERY LOW INTRINSIC CAPACITANCES
I VERY GOOD MANUFACTURING
REPEATIBILITY
3
2
1
TO-247
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding application. Such series
complements ST full range of high vltage MOS-
FETs including revolutionary MDmesh™ products.
Figure 2: Internal Schematic Diagram
APPLICATIONS
I HIGH CURRENT, HIGH SPEED SWITCHING
I IDEAL FOR OFF-LINE POWER SUPPLIES
I WELDING MACHINES
I LIGHTING
Table 2: Order Codes
PART NUMBER
MARKING
PACKAGE
PACKAGING
STW29NK50Z
W29NK50Z
TO-247
TUBE
Rev. 1
October 2004
1/10
STW29NK50Z
Table 3: Absolute Maximum ratings
Symbol
VDS
Parameter
Value
500
500
30
Unit
V
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 KΩ)
Gate- source Voltage
VDGR
VGS
V
V
ID
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
Drain Current (pulsed)
31
A
ID
19.5
124
350
2.77
6000
4.5
A
IDM (*)
PTOT
A
Total Dissipation at TC = 25°C
Derating Factor
W
W/°C
V
VESD(G-S)
dv/dt (1)
Gate source ESD (HBM-C = 100pF, R = 1.5 KΩ)
Peak Diode Recovery voltage slope
V/ns
Tstg
Tj
Storage Temperature
Operating Junction Temperature
-55 to 150
°C
(*) Pulse width limited by safe operating area
(1) I ≤ 31 A, di/dt ≤ 200 A/µs, V ≤ V
, T ≤ T
(BR)DSS J JMAX
SD
DD
Table 4: Thermal Data
Rthj-case
Thermal Resistance Junction-case Max
0.36
°C/W
Rthj-amb
Tl
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
50
300
°C/W
°C
Table 5: Avalanche Characteristics
Symbol
Parameter
Max Value
Unit
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
31
A
EAS
Single Pulse Avalanche Energy
550
mJ
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Table 6: Gate-Source Zener Diode
Symbol
Parameter
Test Condition
Min.
Typ.
Max
Unit
BVGSO
Gate-Source Breakdown
Voltage
30
A
Igs= 1mA (Open Drain)
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
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STW29NK50Z
TABLE 7: ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
On /Off
Symbol
Parameter
Test Conditions
ID = 1 mA, VGS = 0
Min.
Typ.
Max.
Unit
V(BR)DSS
Drain-source Breakdown
Voltage
500
S
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125°C
1
50
µA
µA
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20 V
± 10
µA
VGS(th)
RDS(on)
V
DS = VGS, ID = 150 µA
3
4.5
V
Gate Threshold Voltage
3.75
Static Drain-source On
Resistance
VGS = 10 V, ID = 15.5 A
0.105
0.13
Ω
Table 8: Dynamic
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
gfs (1)
Forward Transconductance
VDS = 15 V, ID = 15.5 A
24
S
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25 V, f = 1 MHz, VGS = 0
6110
697
166
pF
pF
pF
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off-Delay Time
Fall Time
V
DD = 250 V, ID = 15 A,
44.5
41
129
33
ns
ns
ns
ns
RG = 4.7 Ω, VGS = 10 V
(Resistive Load see Figure 17)
Qg
Qgs
Qgd
V
DD = 400 V, ID = 30 A,
266
nC
nC
nC
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
190
35.5
111
VGS = 10 V
Table 9: Source Drain Diode
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
ISD
ISDM (2)
31
124
A
A
Source-drain Current
Source-drain Current (pulsed)
V
SD (1)
ISD = 31 A, VGS = 0
SD = 30 A, di/dt = 100 A/µs
VDD = 44.8V, Tj = 25°C
(see test circuit Figure 5)
Forward On Voltage
1.6
V
trr
Qrr
I
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
436
6.1
28
ns
µC
A
IRRM
trr
Qrr
IRRM
ISD = 30 A, di/dt = 100 A/µs
VDD = 44.8V, Tj = 150°C
(see test circuit Figure 5)
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
500
7.5
30
ns
µC
A
(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
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STW29NK50Z
Figure 3: Safe Operating Area
Figure 6: Thermal Impedance
Figure 4: Output Characteristics
Figure 7: Transfer Characteristics
Figure 5: Transconductance
Figure 8: Static Drain-source On Resistance
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STW29NK50Z
Figure 12: Capacitance Variations
Figure 9: Gate Charge vs Gate-source Voltage
Figure 10: Normalized Gate Thereshold Volt-
age vs Temperature
Figure 13: Normalized On Resistance vs Tem-
perature
Figure 11: Dource-Drain Diode Forward Char-
acteristics
Figure 14: Normalized BVDSS vs Temperature
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STW29NK50Z
Figure 15: Maximum Avalanche Energy vs
Temperature
6/10
STW29NK50Z
Figure 16: Unclamped Inductive Load Test Cir-
cuit
Figure 19: Unclamped Inductive Wafeform
Figure 17: Switching Times Test Circuit For
Resistive Load
Figure 20: Gate Charge Test Circuit
Figure 18: Test Circuit For Inductive Load
Switching and Diode Recovery Times
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STW29NK50Z
TO-247 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
4.85
2.20
1.0
TYP
MAX.
5.15
MIN.
0.19
MAX.
0.20
A
A1
b
2.60
0.086
0.039
0.079
0.118
0.015
0.781
0.608
0.102
0.055
0.094
0.134
0.03
1.40
b1
b2
c
2.0
2.40
3.0
3.40
0.40
19.85
15.45
0.80
D
20.15
15.75
0.793
0.620
E
e
5.45
18.50
5.50
0.214
0.728
0.216
L
14.20
3.70
14.80
4.30
0.560
0.14
0.582
0.17
L1
L2
øP
øR
S
3.55
4.50
3.65
5.50
0.140
0.177
0.143
0.216
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STW29NK50Z
Table 10: Revision History
Date
Revision
Description of Changes
19-Oct-2004
1
First Release.
9/10
STW29NK50Z
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2004 STMicroelectronics - All Rights Reserved
STMicroelectronics group of companies
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10/10
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