NL17SH125P5T5G [ONSEMI]
Non-Inverting 3-State Buffer;
| 型号： | NL17SH125P5T5G |
| 厂家： | 
ONSEMI |
| 描述： | Non-Inverting 3-State Buffer 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总5页 (文件大小：102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NL17SH125
Non-Inverting 3-State Buffer
The NL17SH125 MiniGatet is an advanced high−speed CMOS
non−inverting buffer in ultra−small footprint.
The NL17SH125 requires the 3−state control input (OE) to be set
High to place the output in the high impedance state.
The NL17SH125 input structures provide protection when voltages
up to 7.0 V are applied, regardless of the supply voltage.
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MARKING
DIAGRAM
Features
• High Speed: t = 3.8 ns (Typ) at V = 5.0 V
• Low Power Dissipation: I = 1.0 mA (Max) at T = 25°C
PD
CC
CC
A
SOT−953
CASE 527AE
M
• Power Down Protection Provided on Inputs
1
• Balanced Propagation Delays
T
= Specific Device Code
(Rotated 90°)
• These are Pb−Free and Halide−Free Devices
M
= Month Code
PIN ASSIGNMENT
1
2
3
4
5
IN A
GND
OE
5
IN A
GND
OE
1
2
3
V
CC
OUT Y
V
CC
4
OUT Y
FUNCTION TABLE
Input OE
Figure 1. Pinout (Top View)
Input A
Output Y
L
H
X
L
L
L
H
Z
OE
IN A
EN
OUT Y
H
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
September, 2012 − Rev. 0
NL17SH125/D
NL17SH125
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
−0.5 to +7.0
−0.5 to +7.0
V
IN
DC Input Voltage
V
V
OUT
DC Output Voltage
−0.5 to V + 0.5
V
CC
I
DC Input Diode Current
V
< GND
IN
−20
mA
mA
mA
mA
mA
°C
IK
I
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Moisture Sensitivity
V
< GND, V
> V
CC
20
OK
OUT
OUT
I
12.5
OUT
I
25
CC
I
25
−65 to +150
260
GND
T
STG
T
°C
L
T
+150
°C
J
MSL
Level 1
F
R
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
>3000
>150
N/A
V
I
Latchup Performance
Above V and Below GND at 125°C (Note 5)
100
mA
LATCHUP
CC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
1.65
0.0
Max
5.5
Unit
V
V
CC
Positive DC Supply Voltage
Digital Input Voltage
V
IN
5.5
V
V
OUT
Output Voltage
0.0
V
CC
V
T
Operating Temperature Range
Input Transition Rise or Fail Rate
−55
+125
°C
ns/V
A
Dt / DV
V
CC
V
CC
= 3.3 V 0.3 V
= 5.0 V 0.5 V
0
0
100
20
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2
NL17SH125
DC ELECTRICAL CHARACTERISTICS
T
A
= 255C
Typ
T
v 855C
*555C to 1255C
A
V
CC
Min
Max
Min
Max
Min
Max
(V)
Symbol
Parameter
Test Conditions
Unit
V
IH
High−Level Input
Voltage
1.65 to 0.75 x
0.75 x
V
CC
V
2.0
V
CC
2.3 to
5.5
0.70 x
CC
0.70 x
CC
V
V
V
Low−Level Input
1.65 to
2.0
0.25 x
CC
0.25 x
CC
0.25 x
CC
V
V
IL
Voltage
V
V
V
2.3 to
5.5
0.30 x
0.30 x
0.30 x
V
CC
V
CC
V
CC
V
OH
High−Level Output
Voltage
V
IN
V
IN
V
IN
V
IN
= V or V
IL
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
IH
I
= −50 mA
OH
= V or V
IH
IL
I
= −4 mA
= −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
OH
OH
I
V
OL
Low−Level Output
Voltage
= V or V
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IH
IL
I
= 50 mA
OL
= V or V
IH
IL
I
= 4 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
OL
I
OL
= 8 mA
I
Input Leakage Current 0 ≤ V ≤ 5.5 V
0 to 5.5
5.5
$0.1
1.0
$1.0
10
$1.0
40
mA
mA
IN
IN
I
Quiescent Supply
Current
0 ≤ V ≤ V
CC
CC
IN
I
3−State Leakage
Current
V
V
= V or V
IL
0.0
$0.25
$2.5
$2.5
mA
OZ
IN
IH
= V or GND
OUT
CC
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)
r
f
T
A
= 255C
Typ
T
v 855C
*555C to 1255C
A
V
(V)
Test
Conditions
CC
Min
Max
Min
Max
Min
Max
Symbol
Parameter
Unit
t
t
t
,
Propagation Delay,
A to Y
3.0 to 3.6
C = 15 pF
L
5.6
8.1
8.0
1.0
1.0
9.5
12.0
16.0
ns
PLH
L
t
C = 50 pF
11.5
13.0
PHL
4.5 to 5.5
3.0 to 3.6
4.5 to 5.5
3.0 to 3.6
4.5 to 5.5
C = 15 pF
3.8
5.3
5.5
7.5
1.0
1.0
6.5
8.5
8.5
10.5
L
C = 50 pF
L
,
Output Enable Time,
OE to Y
C = 15 pF
5.4
7.9
8.0
11.5
1.0
1.0
9.5
13.0
11.5
15.0
ns
ns
PZL
t
L
C = 50 pF
PZH
L
C = 15 pF
3.6
5.1
5.1
7.1
1.0
1.0
6.0
8.0
7.5
9.5
L
C = 50 pF
L
,
Output Enable Time,
OE to Y
C = 15 pF
6.5
8.0
9.7
13.2
1.0
1.0
11.5
15.0
14.5
18.5
PLZ
t
L
C = 50 pF
PHZ
L
C = 15 pF
4.8
7.0
6.8
8.8
1.0
1.0
8.0
10
10.0
12.0
L
C = 50 pF
L
C
Input Capacitance
5.5
11
10
10
10
pF
pF
IN
C
Power Dissipation
Capacitance (Note 6)
5.0
PD
6. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
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3
NL17SH125
ORDERING INFORMATION
Device
†
Package
Shipping
NL17SH125P5T5G
SOT−953
(Pb−Free)
8000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
V
CC
50%
V
CC
GND
A or B
50%
t
t
PLZ
PZL
GND
HIGH
IMPEDANCE
t
t
PLH
PHL
50% V
Y
Y
CC
V
V
+ 0.3V
OL
t
t
PZH PHZ
Y
50% V
CC
− 0.3V
OH
50% V
CC
HIGH
IMPEDANCE
Figure 3. Switching Waveform
Figure 4.
TEST POINT
OUTPUT
TEST POINT
1 kW
Connect to V when
CC
testing t
and t
.
PLZ
PZL
Connect to GND when
testing t and t
DEVICE
UNDER
TEST
DEVICE
UNDER
TEST
.
PZH
PHZ
C *
L
C *
L
*Includes all probe and jig capacitance.
*Includes all probe and jig capacitance.
Figure 5. Test Circuit
Figure 6. Test Circuit
INPUT
Figure 7. Input Equivalent Circuit
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4
NL17SH125
PACKAGE DIMENSIONS
SOT−953
CASE 527AE
ISSUE E
NOTES:
X
Y
D
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
5
4
3
PIN ONE
H
E
INDICATOR
E
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
MAX
0.40
0.20
0.17
1.05
0.85
A
b
0.34
0.10
0.07
0.95
0.75
C
TOP VIEW
e
C
D
SIDE VIEW
E
e
0.80
0.35 BSC
HE
L
0.95
1.00
0.175 REF
1.05
5X
L
L2
L3
0.05
−−−
0.10
−−−
0.15
0.15
5X
5X
L3
L2
SOLDERING FOOTPRINT*
5X
0.35
5X
0.20
5X
b
PACKAGE
OUTLINE
0.08 X
Y
BOTTOM VIEW
1.20
1
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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NL17SH125/D
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