UPD3753_02 [NEC]

2088 PIXELS CCD LINEAR IMAGE SENSOR WITH PERIPHERAL CIRCUIT; 与外围电路2088 PIXELS CCD线性图像传感器
UPD3753_02
型号: UPD3753_02
厂家: NEC    NEC
描述:

2088 PIXELS CCD LINEAR IMAGE SENSOR WITH PERIPHERAL CIRCUIT
与外围电路2088 PIXELS CCD线性图像传感器

传感器 图像传感器 CD
文件: 总20页 (文件大小:169K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD3753  
2088 PIXELS CCD LINEAR IMAGE SENSOR WITH PERIPHERAL CIRCUIT  
DESCRIPTION  
The µPD3753 is a 2088-pixel high sensitivity CCD (Charge Coupled Device) linear image sensor which changes  
optical images to electrical signal.  
The µPD3753 consists of 2088-pixels photocell array and a line of 2088-pixel CCD charge transferred register. It  
contains a reset a feed-through level clamp circuit, a reset pulse generator, a clamp pulse generator, and a voltage  
amplifier to provide high sensitivity and low noise. It also supports low power consumption with single 5 V power  
supply. The µPD3753 can be driven by power supply and three input clocks owing to the on-chip reset pulse  
generator and a clamp pulse generator.  
FEATURES  
Valid photocell  
Photocell pitch  
: 2088 pixels  
: 14 µm  
Peak response wavelength : 550 nm (green)  
Resolution  
: 8 dot/mm B4 (257 × 364 mm) size (shorter side)  
High response sensitivity  
Low noise  
Drive clock level  
Data rate  
: CMOS output under +5 V operation  
: 2 MHz Max.  
Power supply  
On-chip circuits  
: +5 V  
: Reset feed-through level clamp circuit  
Reset pulse generator  
Clamp pulse generator  
Voltage amplifier  
ORDERING INFORMATION  
Part Number  
Package  
µPD3753CY-A  
CCD linear image sensor 22-pin plastic DIP (10.16 mm (400))  
<R>  
Remark The µPD3753CY-A is a lead-free product.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. S16546EJ2V0DS00 (2nd edition)  
Date Published February 2006 NS CP (N)  
Printed in Japan  
1994  
The mark <R> shows major revised points.  
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.  
µPD3753  
BLOCK DIAGRAM  
VOD  
3
Reset pulse/  
clamp pulse  
generator  
φ
2
15  
Optical black 18 pixels, invalid photocell 2 pixels,  
valid photocell 2088 pixels, invalid photocell 2 pixels  
Voltage amplifier  
Reset feed-through  
level clamp circuit  
VOUT  
19  
φ
φ
TG  
1
9
CCD register  
14  
20  
13  
AGND  
DGND  
2
Data Sheet S16546EJ2V0DS  
µPD3753  
PIN CONFIGURATION (Top View)  
CCD linear image sensor 22-pin plastic DIP (10.16 mm (400))  
µPD3753CY-A  
No connection  
No connection  
1
2
NC  
NC  
NC 22  
NC 21  
No connection  
No connection  
Analog ground  
Output  
AGND  
Output drain voltage  
No connection  
3
V
OD  
20  
19  
V
OUT  
4
NC  
NC  
NC  
NC  
NC  
No connection  
5
NC 18  
NC 17  
NC 16  
No connection  
No connection  
No connection  
Shift register clock 2  
Shift register clock 1  
Digital ground  
No connection  
No connection  
6
No connection  
7
No connection  
8
φ
φ
2
1
15  
14  
φ
TG  
Transfer gate clock  
No connection  
9
10  
11  
NC  
NC  
DGND 13  
NC 12  
No connection  
Caution Connect the No connection pins (NC) to GND.  
PHOTOCELL STRUCTURE DIAGRAM  
12  
2
µ
µ
m
m
µ
Channel stopper  
Aluminum  
shield  
3
Data Sheet S16546EJ2V0DS  
µPD3753  
ABSOLUTE MAXIMUM RATINGS (TA = +25°C)  
Parameter  
Output drain voltage  
Symbol  
Ratings  
Unit  
V
VOD  
0.3 to +8  
0.3 to +8  
0.3 to +8  
25 to +60  
40 to +70  
Shift register clock voltage  
Transfer gate clock voltage  
Operating ambient temperature Note  
Storage temperature  
Vφ 1, Vφ 2  
Vφ TG  
TA  
V
V
°C  
°C  
Tstg  
Note Use at the condition without dew condensation.  
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any  
parameter. That is, the absolute maximum ratings are rated values at which the product is on the  
verge of suffering physical damage, and therefore the product must be used under conditions that  
ensure that the absolute maximum ratings are not exceeded.  
RECOMMENDED OPERATING CONDITIONS (TA = +25°C)  
Parameter  
Output drain voltage  
Symbol  
Min.  
4.7  
Typ.  
5.0  
5.0  
0
Max.  
5.3  
Unit  
V
VOD  
Shift register clock high level  
Shift register clock low level  
Transfer gate clock high level  
Transfer gate clock low level  
Data rate  
Vφ 1_H, Vφ 2_H  
Vφ 1_L, Vφ 2_L  
Vφ TGH  
4.5  
VOD +0.2  
+0.5  
V
0.3  
4.5  
V
Note  
Note  
Vφ 1_H  
Vφ 1_H  
V
Vφ TGL  
0.3  
0.2  
0
1
+0.5  
V
fφ R  
2
MHz  
Note When Transfer gate clock high level (Vφ TGH) is higher than Shift register clock high level (Vφ 1_H), Image lag  
can increase.  
4
Data Sheet S16546EJ2V0DS  
µPD3753  
ELECTRICAL CHARACTERISTICS  
TA = +25°C, VOD = 5 V, fφ 1 = 1 MHz, data rate = 1 MHz, storage time = 10 ms, input signal clock = 5 Vp-p,  
light source : 3200 K halogen lamp + C500 (infrared cut filter)  
Parameter  
Saturation voltage  
Symbol  
Vsat  
Test Conditions  
Min.  
1.0  
Typ.  
1.2  
0.013  
2
Max.  
Unit  
V
Saturation exposure  
Photo response non-uniformity  
Average dark signal  
Dark signal non-uniformity  
Power consumption  
Output impedance  
Response  
SE  
Daylight color fluorescent lamp  
VOUT = 500 mV  
lx•s  
%
PRNU  
ADS  
DSNU  
PW  
8
Light shielding  
1.0  
4
8.0  
+8  
50  
1
mV  
mV  
mW  
kΩ  
Light shielding  
8  
30  
ZO  
0.5  
90  
RF  
Daylight color fluorescent lamp  
VOUT = 1.0 V  
63  
117  
V/lx•s  
nm  
%
Response peak  
550  
7
Image lag  
Offset level Note  
Output fall delay time Note  
Total transfer efficiency  
Dynamic range  
IL  
14  
3.5  
VOS  
td  
2.5  
3.0  
130  
98  
V
VOUT = 500 mV, t1, t2 = 50 ns  
VOUT = 1.0 V, data rate = 2 MHz  
Vsat/DSNU  
ns  
TTE  
DR  
RFTN  
BN  
92  
%
375  
800  
10  
times  
mV  
mVp-p  
%
Reset feed-through noise Note  
Light shielding  
0
1500  
Bit noise  
Light shielding  
Resolution  
MTF  
Modulation transfer function at  
nyquist frequency  
65  
Note Refer to TIMING CHART 2.  
Remark When VOD = 4.7 V, the response typically decreases to 90% of the value under 5 V operation.  
INPUT PIN CAPACITANCE (TA = +25°C, VOD = 5 V)  
Parameter  
Shift register clock pin capacitance 1  
Shift register clock pin capacitance 2  
Transfer gate clock pin capacitance  
Symbol  
Pin name Pin No.  
Min.  
Typ.  
300  
300  
100  
Max.  
Unit  
pF  
Cφ 1  
φ 1  
14  
15  
9
Cφ 2  
φ 2  
pF  
Cφ TG  
φ TG  
pF  
5
Data Sheet S16546EJ2V0DS  
µPD3753  
TIMING CHART 1  
φ
TG  
φ
φ
1
2
V
OUT  
V
OUT unstable period *  
(12 pixels)  
Optical black  
(18 pixels)  
Valid photocell  
(2088 pixels)  
Invalid photocell  
(2 pixels)  
Invalid photocell  
(2 pixels)  
Caution Be sure not to use this period (indicated by *) as the black level, because this part is unstable.  
TIMING CHART 2  
t1  
90%  
t2  
φ
φ
1
2
10%  
90%  
10%  
td  
V
OUT  
10%  
Remark  
: Signal output  
Symbol  
t1, t2  
Min.  
Typ.  
50  
Max.  
(100)  
Unit  
ns  
0
Remark The MAX. in the table above shows the operation range in which the output characteristics are kept  
almost enough for general purpose, does not show the limit above which the µ PD3753 is destroyed.  
6
Data Sheet S16546EJ2V0DS  
µPD3753  
φ TG, φ 1, φ 2 TIMING CHART  
t3  
t5  
t4  
t7  
90%  
10%  
φTG  
t6  
90%  
φ
φ
1
2
Symbol  
Min.  
Typ.  
Max.  
Unit  
ns  
t3, t4  
t5  
0
650  
0
50  
(2000)  
1000  
100  
ns  
t6, t7  
ns  
Remark The MAX. in the table above shows the operation range in which the output characteristics are kept  
almost enough for general purpose, does not show the limit above which the µ PD3753 is destroyed.  
φ 1, φ 2 cross points  
φ
φ
1
2
2.0 V or more  
2.0 V or more  
Remark Adjust cross points φ 1, φ 2 with input resistance of each pin.  
7
Data Sheet S16546EJ2V0DS  
µPD3753  
DEFINITIONS OF CHARACTERISTIC ITEMS  
1. Saturation voltage : Vsat  
Output signal voltage at which the response linearity is lost.  
2. Saturation exposure : SE  
Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs.  
3. Photo response non-uniformity : PRNU  
The peak/bottom ratio to the average output voltage of all the valid pixels calculated by the following formula.  
V
MAX. or VMIN.  
1  
n
PRNU (%) =  
× 100  
1
n
Vj  
Σ
j = 1  
n : Number of valid pixcels  
: Output voltage of each pixel  
Vj  
n
VMIN.  
1
n
Vj  
Σ
VMAX.  
Register Dark  
DC level  
j = 1  
4. Average dark signal : ADS  
Average output signal voltage of all the valid pixels at light shielding. This is calculated by the following  
formula.  
2088  
d
j
Σ
j = 1  
2088  
ADS (mV) =  
dj : Dark signal of valid pixel number j  
5. Dark signal non-uniformity : DSNU  
The difference between ADS and voltage of the highest or lowest output pixel of all the valid pixels at light  
shielding.  
VOUT  
ADS  
Register Dark  
DC level  
DSNU MIN.  
DSNU MAX.  
8
Data Sheet S16546EJ2V0DS  
µPD3753  
6. Output impedance : ZO  
Impedance of the output pins viewed from outside.  
7. Response : R  
Output voltage divided by exposure (lx•s).  
Note that the response varies with a light source (spectral characteristic).  
8. Image lag : IL  
The rate between the last output voltage and the next one after read out the data of a line.  
φ
TG  
Light  
ON  
OFF  
V
OUT  
V1  
VOUT  
V
1
IL (%) =  
× 100  
OUT  
V
9. Bit Noise : BN  
Output signal distribution of a photocell by scan.  
9
Data Sheet S16546EJ2V0DS  
µPD3753  
STANDARD CHARACTERISTIC CURVES (Reference Value)  
DARK OUTPUT TEMPERATURE  
CHARACTERISTIC  
STORAGE TIME OUTPUT VOLTAGE  
CHARACTERISTIC (T = +25°C)  
A
8
2
1
4
2
1
0.5  
0.2  
0.1  
0.25  
0.1  
0
10  
20  
30  
40  
50  
1
5
10  
Operating Ambient Temperature T  
A
(°C)  
Storage Time (ms)  
TOTAL SPECTRAL RESPONSE CHARACTERISTICS (without infrared cut filter) (T = +25°C)  
A
100  
80  
60  
40  
20  
0
400  
600  
800  
1000  
1200  
Wavelength (nm)  
10  
Data Sheet S16546EJ2V0DS  
µPD3753  
POWER SUPPLY VOLTAGE RESPONSE RATIO CHARACTERISTIC  
110  
100  
90  
0
4.5  
4.7  
5.0  
5.3  
5.5  
Power Supply Voltage (V)  
11  
Data Sheet S16546EJ2V0DS  
µPD3753  
APPLICATION CIRCUIT EXAMPLE  
+5 V  
+5 V  
10 Ω  
10  
µ
F/16 V  
10  
µ
F/16 V  
+
+
0.1  
µ
F
0.1 µF  
µ
PD3753CY  
74HC04  
1
2
3
4
5
6
7
8
9
NC  
NC  
NC 22  
NC 21  
2.2 kΩ  
AGND  
V
OD  
20  
19  
V
OUT  
100 Ω  
NC  
NC  
NC  
NC  
NC  
V
OUT  
2SA1005  
NC 18  
NC 17  
NC 16  
100 Ω  
47 Ω  
47 Ω  
φ
φ
1
φ
2 15  
1 14  
10 Ω  
2
φ
TG  
φ
10 NC  
11 NC  
DGND 13  
NC 12  
φ
TG  
Caution Connect the No connection pins (NC) to GND.  
12  
Data Sheet S16546EJ2V0DS  
µPD3753  
PACKAGE DRAWING  
µ
PD3753CY  
CCD LINEAR IMAGE SENSOR 22-PIN PLASTIC DIP (10.16 mm (400) )  
(Unit : mm)  
44.0 0.3  
1st valid pixel  
1
9.25 0.3  
1.7 0.3  
22  
12  
11  
1
2.0  
37.5  
2
10.16 0.2  
(1.99)  
1.02 0.15  
4.39 0.4  
3
2.35 0.2  
(5.42)  
4.21 0.5  
0.25 0.05  
0.46 0.1  
2.54 0.25  
+0.7  
10.16  
0.2  
Name  
Dimensions  
42.9×8.35×0.7  
Refractive index  
Plastic cap  
1.5  
1 1st valid pixel  
The center of the pin1  
2 The surface of the CCD chip  
3 The bottom of the package  
The top of the cap  
The surface of the CCD chip  
22C-1CCD-PKG15-1  
13  
Data Sheet S16546EJ2V0DS  
µPD3753  
RECOMMENDED SOLDERING CONDITIONS  
When soldering this product, it is highly recommended to observe the conditions as shown below.  
If other soldering processes are used, or if the soldering is performed under different conditions, please make sure  
to consult with our sales offices.  
Type of Through-hole Device  
µPD3753CY-A : CCD linear image sensor 22-pin plastic DIP (10.16 mm (400))  
Process  
Conditions  
Partial heating method  
Pin temperature : 300 °C or below, Heat time : 3 seconds or less (per pin)  
Cautions 1.  
2.  
During assembly care should be taken to prevent solder or flux from contacting the plastic  
cap. The optical characteristics could be degraded by such contact.  
Soldering by the solder flow method may have deleterious effects on prevention of plastic  
cap soiling and heat resistance. So the method cannot be guaranteed.  
14  
Data Sheet S16546EJ2V0DS  
µPD3753  
NOTES ON HANDLING THE PACKAGES  
1
DUST AND DIRT PROTECTING  
The optical characteristics of the CCD will be degraded if the cap is scratched during cleaning. Don’t either  
touch plastic cap surface by hand or have any object come in contact with plastic cap surface. Should dirt  
stick to a plastic cap surface, blow it off with an air blower. For dirt stuck through electricity ionized air is  
recommended. And if the plastic cap surface is grease stained, clean with our recommended solvents.  
CLEANING THE PLASTIC CAP  
Care should be taken when cleaning the surface to prevent scratches.  
We recommend cleaning the cap with a soft cloth moistened with one of the recommended solvents below.  
Excessive pressure should not be applied to the cap during cleaning. If the cap requires multiple cleanings it is  
recommended that a clean surface or cloth be used.  
RECOMMENDED SOLVENTS  
The following are the recommended solvents for cleaning the CCD plastic cap.  
Use of solvents other than these could result in optical or physical degradation in the plastic cap.  
Please consult your sales office when considering an alternative solvent.  
Solvents  
Ethyl Alcohol  
Symbol  
EtOH  
MeOH  
IPA  
Methyl Alcohol  
Isopropyl Alcohol  
N-methyl Pyrrolidone  
NMP  
2
MOUNTING OF THE PACKAGE  
The application of an excessive load to the package may cause the package to warp or break, or cause chips  
to come off internally. Particular care should be taken when mounting the package on the circuit board. Don't  
have any object come in contact with plastic cap. You should not reform the lead frame. We recommended to  
use a IC-inserter when you assemble to PCB.  
Also, be care that the any of the following can cause the package to crack or dust to be generated.  
1. Applying heat to the external leads for an extended period of time with soldering iron.  
2. Applying repetitive bending stress to the external leads.  
3. Rapid cooling or heating  
3
4
OPERATE AND STORAGE ENVIRONMENTS  
Operate in clean environments. CCD image sensors are precise optical equipment that should not be subject  
to mechanical shocks. Exposure to high temperatures or humidity will affect the characteristics. So avoid  
storage or usage in such conditions.  
Keep in a case to protect from dust and dirt. Dew condensation may occur on CCD image sensors when the  
devices are transported from a low-temperature environment to a high-temperature environment. Avoid such  
rapid temperature changes.  
For more details, refer to our document "Review of Quality and Reliability Handbook" (C12769E)  
ELECTROSTATIC BREAKDOWN  
CCD image sensor is protected against static electricity, but destruction due to static electricity is sometimes  
detected. Before handling be sure to take the following protective measures.  
1. Ground the tools such as soldering iron, radio cutting pliers of or pincer.  
2. Install a conductive mat or on the floor or working table to prevent the generation of static electricity.  
3. Either handle bare handed or use non-chargeable gloves, clothes or material.  
4. Ionized air is recommended for discharge when handling CCD image sensor.  
5. For the shipment of mounted substrates, use box treated for prevention of static charges.  
6. Anyone who is handling CCD image sensors, mounting them on PCBs or testing or inspecting PCBs on  
which CCD image sensors have been mounted must wear anti-static bands such as wrist straps and ankle  
straps which are grounded via a series resistance connection of about 1 M.  
15  
Data Sheet S16546EJ2V0DS  
µPD3753  
[MEMO]  
16  
Data Sheet S16546EJ2V0DS  
µPD3753  
[MEMO]  
17  
Data Sheet S16546EJ2V0DS  
µPD3753  
[MEMO]  
18  
Data Sheet S16546EJ2V0DS  
µPD3753  
NOTES FOR CMOS DEVICES  
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN  
1
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the  
CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may  
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,  
and also in the transition period when the input level passes through the area between VIL (MAX) and  
VIH (MIN).  
HANDLING OF UNUSED INPUT PINS  
2
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is  
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS  
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed  
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND  
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must  
be judged separately for each device and according to related specifications governing the device.  
3
PRECAUTION AGAINST ESD  
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and  
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as  
much as possible, and quickly dissipate it when it has occurred. Environmental control must be  
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that  
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static  
container, static shielding bag or conductive material. All test and measurement tools including work  
benches and floors should be grounded. The operator should be grounded using a wrist strap.  
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for  
PW boards with mounted semiconductor devices.  
4
STATUS BEFORE INITIALIZATION  
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power  
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does  
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the  
reset signal is received. A reset operation must be executed immediately after power-on for devices  
with reset functions.  
5
POWER ON/OFF SEQUENCE  
In the case of a device that uses different power supplies for the internal operation and external  
interface, as a rule, switch on the external power supply after switching on the internal power supply.  
When switching the power supply off, as a rule, switch off the external power supply and then the  
internal power supply. Use of the reverse power on/off sequences may result in the application of an  
overvoltage to the internal elements of the device, causing malfunction and degradation of internal  
elements due to the passage of an abnormal current.  
The correct power on/off sequence must be judged separately for each device and according to related  
specifications governing the device.  
6
INPUT OF SIGNAL DURING POWER OFF STATE  
Do not input signals or an I/O pull-up power supply while the device is not powered. The current  
injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and  
the abnormal current that passes in the device at this time may cause degradation of internal elements.  
Input of signals during the power off state must be judged separately for each device and according to  
related specifications governing the device.  
19  
Data Sheet S16546EJ2V0DS  
µPD3753  
The information in this document is current as of February, 2006. The information is subject to  
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data  
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not  
all products and/or types are available in every country. Please check with an NEC Electronics sales  
representative for availability and additional information.  
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written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may  
appear in this document.  
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(1)  
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(2)  
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M8E 02. 11-1  

相关型号:

UPD3768

7500 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3768D

7500 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3768D-AZ

CCD Sensor, 7500 Horiz pixels, 7500 Vert pixels, 1.50-2V, Rectangular, Through Hole Mount, CERAMIC, DIP-36
NEC

UPD3777

5400 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3777CY

5400 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3778

10600 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3778CY

10600 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3788

7300 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3788D

7300 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3789CY

CCD Sensor, 5348 Horiz pixels, 5348 Vert pixels, 2-2.50V, Rectangular, Through Hole Mount, 10.16 MM, PLASTIC, DIP-32
NEC

UPD3794

2700 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC