UPD3789CY [NEC]

CCD Sensor, 5348 Horiz pixels, 5348 Vert pixels, 2-2.50V, Rectangular, Through Hole Mount, 10.16 MM, PLASTIC, DIP-32;
UPD3789CY
型号: UPD3789CY
厂家: NEC    NEC
描述:

CCD Sensor, 5348 Horiz pixels, 5348 Vert pixels, 2-2.50V, Rectangular, Through Hole Mount, 10.16 MM, PLASTIC, DIP-32

CD 传感器 换能器
文件: 总20页 (文件大小:151K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD3798  
5348 PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR  
The µPD3798 is a color CCD (Charge Coupled Device) linear image sensor which changes optical images to  
electrical signal and has the function of color separation.  
The µPD3798 has 3 rows of 5348 pixels, and each row has a single-sided readout type of charge transfer register.  
And it has reset feed-through level clamp circuits and voltage amplifiers. Therefore, it is suitable for 600 dpi/A4 color  
image scanners, color facsimiles and so on.  
FEATURES  
• Valid photocell : 5348 pixels × 3  
• Photocell's pitch : 7 µm  
• Line spacing  
• Color filter  
• Resolution  
: 28 µm (4 lines) Red line-Green line, Green line-Blue line  
: Primary colors (red, green and blue), pigment filter (with light resistance 107 lx•hour)  
: 24 dot/mm A4 (210 × 297 mm) size (shorter side)  
600 dpi US letter (8.5” × 11”) size (shorter side)  
• Drive clock level : CMOS output under 5 V operation  
• Data rate  
: 5 MHz MAX.  
: +12 V  
• Power supply  
• On-chip circuits : Reset feed-through level clamp circuits  
Voltage amplifiers  
ORDERING INFORMATION  
Part Number  
Package  
µPD3798CY  
CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. S14314EJ2V0DS00 (2nd edition)  
Date published December 2002 N CP(K)  
Printed in Japan  
The mark shows major revised points.  
©
µPD3798  
BLOCK DIAGRAM  
φ
φ
1
2
VOD  
GND GND  
11  
30  
2
25  
24  
Photocell  
(Blue)  
······  
······  
······  
φ
TG1  
(Blue)  
Transfer gate  
23  
22  
VOUT1  
31  
CCD analog shift register  
(Blue)  
Photocell  
(Green)  
φ
TG2  
(Green)  
Transfer gate  
VOUT2  
(Green)  
CCD analog shift register  
32  
Photocell  
(Red)  
φ
TG3  
(Red)  
Transfer gate  
10  
VOUT3  
(Red)  
CCD analog shift register  
1
8
9
3
4
φ
φ
1
2
φ
φ
RB  
CLB  
2
Data Sheet S14314EJ2V0DS  
µPD3798  
PIN CONFIGURATION (Top View)  
CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))  
µPD3798CY  
Output signal 3 (Red)  
V
OUT  
3
32  
V
V
V
OUT  
2
1
Output signal 2 (Green)  
1
2
Ground  
GND  
31  
30  
29  
28  
27  
26  
25  
24  
23  
OUT  
OD  
Output signal 1 (Blue)  
Output drain voltage  
No connection  
Reset gate clock  
φ
3
RB  
Reset feed-through level  
clamp clock  
φ
CLB  
4
NC  
NC  
IC  
No connection  
Internal connection  
Internal connection  
5
No connection  
NC  
IC  
6
Internal connection  
Internal connection  
Shift register clock 2  
IC  
7
IC  
φ
φ
φ
φ
φ
2
1
2
8
Shift register clock 2  
Shift register clock 1  
φ
9
1
Shift register clock 1  
φ
TG3  
Transfer gate clock 3  
(for Red)  
10  
11  
12  
13  
14  
15  
16  
TG1  
TG2  
Transfer gate clock 1  
(for Blue)  
22  
21  
Transfer gate clock 2  
(for Green)  
GND  
IC  
Ground  
Internal connection  
Internal connection  
Internal connection  
Internal connection  
No connection  
IC  
IC  
20  
19  
18  
17  
IC  
NC  
NC  
NC  
No connection  
No connection  
NC  
NC  
No connection  
No connection  
NC  
No connection  
Cautions 1. Leave pins 6, 7, 12, 13, 20, 21, 26, 27 (IC) unconnected.  
2. Connect the No connection pins (NC) to GND.  
Data Sheet S14314EJ2V0DS  
3
µPD3798  
PHOTOCELL STRUCTURE DIAGRAM  
PHOTOCELL ARRAY STRUCTURE DIAGRAM  
(Line spacing)  
7 µm  
Blue photocell array  
Green photocell array  
Red photocell array  
3
µ
m
4
µ
m
4 lines  
(28 µm)  
7 µm  
7 µm  
µ
Channel stopper  
4 lines  
(28 µm)  
Aluminum  
shield  
4
Data Sheet S14314EJ2V0DS  
µPD3798  
ABSOLUTE MAXIMUM RATINGS (TA = +25°C)  
Parameter  
Output drain voltage  
Symbol  
Ratings  
0.3 to +15  
0.3 to +8  
0.3 to +8  
0.3 to +8  
0.3 to +8  
25 to +60  
40 to +70  
Unit  
V
VOD  
Shift register clock voltage  
Vφ1, Vφ2  
VφRB  
V
Reset gate clock voltage  
V
Reset feed-through level clamp clock voltage  
Transfer gate clock voltage  
Operating ambient temperatureNote  
Storage temperature  
VφCLB  
V
VφTG1 to VφTG3  
TA  
V
°C  
°C  
Tstg  
Note Use at the condition without dew condensation.  
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any  
parameter. That is, the absolute maximum ratings are rated values at which the product is on the  
verge of suffering physical damage, and therefore the product must be used under conditions that  
ensure that the absolute maximum ratings are not exceeded.  
RECOMMENDED OPERATING CONDITIONS (TA = +25°C)  
Parameter  
Output drain voltage  
Symbol  
MIN.  
11.4  
4.5  
TYP.  
12.0  
5.0  
0
MAX.  
12.6  
5.5  
Unit  
V
VOD  
Shift register clock high level  
Shift register clock low level  
Reset gate clock high level  
Vφ1H, Vφ2H  
Vφ1L, Vφ2L  
VφRBH  
V
0.3  
4.5  
+0.5  
5.5  
V
5.0  
0
V
Reset gate clock low level  
VφRBL  
0.3  
4.5  
+0.5  
5.5  
V
Reset feed-through level clamp clock high level  
Reset feed-through level clamp clock low level  
Transfer gate clock high level  
Transfer gate clock low level  
Data rate  
VφCLBH  
5.0  
V
VφCLBL  
0.3  
4.5  
0
+0.5  
V
Vφ1HNote  
Vφ1HNote  
VφTG1H to VφTG3H  
VφTG1L to VφTG3L  
fφRB  
V
0.3  
0
+0.5  
5.0  
V
1.0  
MHz  
Note When Transfer gate clock high level (VφTG1H to VφTG3H) is higher than Shift register clock high level (Vφ1H),  
Image lag can increase.  
Data Sheet S14314EJ2V0DS  
5
µPD3798  
ELECTRICAL CHARACTERISTICS  
TA = +25 °C, VOD = 12 V, data rate (fφRB) = 1 MHz, storage time = 5.5 ms, input signal clock = 5 Vp-p  
light source: 3200 K halogen lamp +C-500S (infrared cut filter, t = 1mm) + HA-50 (heat absorbing filter, t = 3 mm)  
Parameter  
Saturation voltage  
Saturation exposure  
Symbol  
Vsat  
Test Conditions  
MIN.  
2.0  
TYP.  
2.5  
MAX.  
Unit  
V
Red  
SER  
SEG  
SEB  
PRNU  
ADS  
DSNU  
PW  
0.223  
0.245  
0.409  
6
lxs  
lxs  
lxs  
%
Green  
Blue  
Photo response non-uniformity  
Average dark signal  
VOUT = 1.0 V  
20  
2.0  
3.0  
540  
1
Light shielding  
Light shielding  
0.2  
mV  
mV  
mW  
kΩ  
Dark signal non-uniformity  
Power consumption  
1.5  
360  
0.5  
Output impedance  
ZO  
Response  
Red  
RR  
7.8  
7.1  
4.2  
11.2  
10.2  
6.1  
14.6  
13.3  
8.0  
7.0  
7.0  
V/lxs  
V/lxs  
V/lxs  
%
Green  
Blue  
RG  
RB  
Image lag  
IL  
VOUT = 1.0 V  
1.5  
Note1  
Offset level  
VOS  
4.0  
5.5  
V
Note2  
Output fall delay time  
td  
VOUT = 1.0 V  
40  
ns  
Total transfer efficiency  
Response peak  
TTE  
VOUT = 1.0 V,  
92  
98  
%
data rate = 5 MHz  
Red  
630  
540  
nm  
nm  
Green  
Blue  
460  
nm  
Dynamic range  
DR1  
DR2  
RFTN  
σ
Vsat /DSNU  
Vsat /σ  
1666  
2500  
300  
1.0  
times  
times  
mV  
1000  
Note1  
Reset feed-through noise  
Random noise  
Light shielding  
Light shielding  
+500  
mV  
Notes 1. Refer to TIMING CHART 2.  
2. When the fall time of φ1 (t1) is the TYP. value (refer to TIMING CHART 2).  
6
Data Sheet S14314EJ2V0DS  
µPD3798  
INPUT PIN CAPACITANCE (TA = +25 °C, VOD = 12 V)  
Parameter  
Symbol Pin name Pin No.  
MIN.  
TYP.  
400  
400  
400  
400  
15  
MAX.  
Unit  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
Shift register clock pin capacitance 1  
Cφ1  
φ1  
9
24  
8
Shift register clock pin capacitance 2  
Reset gate clock pin capacitance  
Cφ2  
φ2  
25  
3
CφRB  
φRB  
Reset feed-through level clamp clock pin capacitance CφCLB  
Transfer gate clock pin capacitance  
φCLB  
φTG1  
φTG2  
φTG3  
4
15  
CφTG  
23  
22  
10  
100  
100  
100  
Remark Pins 9 and 24 (φ1), 8 and 25 (φ2) are each connected inside of the device.  
Data Sheet S14314EJ2V0DS  
7
TIMING CHART 1 (for each color)  
φTG1 to  
φ
TG3  
φ
φ
1
2
φ
RB  
φ
CLB  
Note  
Note  
V
OUT1 to  
VOUT  
3
Optical black (16 pixels)  
Valid photocell (5348 pixels)  
Invalid photocell  
(2 pixels)  
Invalid photocell  
(3 pixels)  
Note Input the φRB and CLB pulses continuously during this period, too.  
φ
µ
µPD3798  
TIMING CHART 2 (for each color)  
t1  
t2  
90 %  
10 %  
φ
φ
1
2
90 %  
10 %  
t4  
t6  
t5  
t3  
90 %  
10 %  
φ
RB  
t8  
t10  
t9  
t7 t11  
90 %  
10 %  
+
_
φ
CLB  
t
d
RFTN  
RFTN  
V
OUT  
VOS  
10 %  
Data Sheet S14314EJ2V0DS  
9
µPD3798  
φTG1 to φTG3, φ1, φ2 TIMING CHART  
t12  
t13  
t14  
90 %  
10 %  
φ
TG1 to TG3  
φ
t16  
t15  
90 %  
φ
φ
1
2
Symbol  
t1, t2  
MIN.  
0
TYP.  
MAX.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
25  
50  
t3  
20  
70  
0
t4  
250  
25  
t5, t6  
t7  
30  
0
50  
t8, t9  
t10  
t11  
25  
30  
5
50  
15  
t12, t13  
t14  
0
50  
3000  
900  
10000  
1000  
t15, t16  
φ1, φ2 cross points  
φ
2
1
2.0 V or more  
0.5 V or more  
φ
Remark Adjust cross points of φ1 and φ2 with input resistance of each pin.  
10  
Data Sheet S14314EJ2V0DS  
µPD3798  
DEFINITIONS OF CHARACTERISTIC ITEMS  
1. Saturation voltage: Vsat  
Output signal voltage at which the response linearity is lost.  
2. Saturation exposure: SE  
Product of intensity of illumination (IX) and storage time (s) when saturation of output voltage occurs.  
3. Photo response non-uniformity: PRNU  
The output signal non-uniformity of all the valid pixels when the photosensitive surface is applied with the light  
of uniform illumination. This is calculated by the following formula.  
x  
PRNU (%) =  
× 100  
x
x : maximum of x  
5348  
j
x  
x
j
Σ
j=1  
5348  
: Output voltage of valid pixel number j  
x =  
xj  
VOUT  
x
Register Dark  
DC level  
x  
4. Average dark signal: ADS  
Average output signal voltage of all the valid pixels at light shielding. This is calculated by the following formula.  
5348  
dj  
Σ
j=1  
ADS (mV) =  
5348  
dj : Dark signal of valid pixel number j  
5. Dark signal non-uniformity: DSNU  
Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the valid  
pixels at light shielding. This is calculated by the following formula.  
DSNU (mV) : maximum of dj ADS j = 1 to 5348  
dj : Dark signal of valid pixel number j  
V
OUT  
ADS  
Register Dark  
DC level  
DSNU  
Data Sheet S14314EJ2V0DS  
11  
µPD3798  
6. Output impedance: ZO  
Impedance of the output pins viewed from outside.  
7. Response: R  
Output voltage divided by exposure (Ixs).  
Note that the response varies with a light source (spectral characteristic).  
8. Image Lag: IL  
The rate between the last output voltage and the next one after read out the data of a line.  
TG  
Light  
ON  
OFF  
V
OUT  
V1  
VOUT  
V1  
IL (%) =  
×100  
VOUT  
9. Random noise: σ  
Random noise σ is defined as the standard deviation of a valid pixel output signal with 100 times (=100 lines)  
data sampling at dark (light shielding).  
100  
100  
(V  
i
V)2  
100  
1
Σ
σ (mV) =  
, V =  
Vi  
100 Σ  
i=1  
i=1  
Vi: A valid pixel output signal among all of the valid pixels for each color  
V
V
1
2
V
OUT  
line 1  
line 2  
V
100  
line 100  
This is measured by the DC level sampling of only the signal level, not by CDS (Correlated Double Sampling).  
12  
Data Sheet S14314EJ2V0DS  
µPD3798  
STANDARD CHARACTERISTIC CURVES (Reference Value)  
DARK OUTPUT TEMPERATURE  
CHARACTERISTIC  
STORAGE TIME OUTPUT VOLTAGE  
CHARACTERISTIC (TA = +25 °C)  
8
2
4
1
2
1
0.5  
0.2  
0.25  
0.1  
0.1  
0
10  
20  
30  
40  
50  
1
5
10  
Operating Ambient Temperature TA(°C)  
Storage Time (ms)  
TOTAL SPECTRAL RESPONSE CHARACTERISTICS  
(without infrared cut filter and heat absorbing filter) (TA = +25 °C)  
100  
80  
R
B
G
60  
40  
20  
G
B
0
400  
500  
600  
700  
800  
Wavelength (nm)  
Data Sheet S14314EJ2V0DS  
13  
µPD3798  
APPLICATION CIRCUIT EXAMPLE  
+5 V  
+12 V  
10  
+
+
µ
PD3798  
10  
µ
F/16 V 0.1  
µ
F
0.1 µF 47 µF/25 V  
1
2
3
32  
31  
30  
29  
28  
B3  
V
OUT  
3
V
OUT  
2
B2  
B1  
GND  
VOUT  
1
47  
47  
V
OD  
φ
RB  
φ
φ
RB  
4
5
6
7
+5 V  
NC  
NC  
CLB  
φ
CLB  
NC  
+
27  
26  
25  
24  
23  
22  
IC  
IC  
IC  
IC  
0.1 µF 10 µF/16 V  
4.7 Ω  
4.7 Ω  
4.7 Ω  
4.7 Ω  
4.7 Ω  
4.7 Ω  
4.7 Ω  
8
9
φ
φ
φ
2
φ
φ
2
1
φ
2
1
φ
φ
1
10  
TG3  
φ
TG1  
TG  
11  
GND  
IC  
φ
TG2  
12  
13  
14  
15  
16  
21  
20  
19  
18  
IC  
IC  
IC  
NC  
NC  
NC  
NC  
NC  
17  
NC  
Cautions 1. Leave pins 6, 7, 12, 13, 20, 21, 26, 27 (IC) unconnected.  
2. Connect the No connection pins (NC) to GND.  
Remark The inverters shown in the above application circuit example are the 74HC04.  
14  
Data Sheet S14314EJ2V0DS  
µPD3798  
B1 to B3 EQUIVALENT CIRCUIT  
12 V  
+
µ
47 F/25 V  
100  
100 Ω  
CCD  
2SC945  
V
OUT  
2 kΩ  
Data Sheet S14314EJ2V0DS  
15  
µPD3798  
PACKAGE DRAWING  
µ
PD3798CY  
CCD LINEAR IMAGE SENSOR 32-PIN PLASTIC DIP (10.16 mm (400) )  
(Unit : mm)  
55.2±0.5  
54.8±0.5  
1st valid pixel  
1
4.2±0.3  
32  
17  
16  
1
46.7  
2.0  
12.6±0.5  
4.1±0.5  
10.16±0.20  
1.02±0.15  
4.55±0.5  
2
(1.80)  
3
2.58±0.3  
0.46±0.1  
0.25±0.05  
2.54±0.25  
(5.42)  
+0.7  
10.16  
0.2  
4.21±0.5  
Name  
Dimensions  
Refractive index  
Plastic cap  
52.2×6.4×0.7  
1.5  
1 1st valid pixel  
The center of the pin1  
2 The surface of the CCD chip  
3 The bottom of the package  
The top of the cap  
The surface of the CCD chip  
32C-1CCD-PKG2-2  
16  
Data Sheet S14314EJ2V0DS  
µPD3798  
RECOMMENDED SOLDERING CONDITIONS  
When soldering this product, it is highly recommended to observe the conditions as shown below.  
If other soldering processes are used, or if the soldering is performed under different conditions, please make sure  
to consult with our sales offices.  
Type of Through-hole Device  
µPD3798CY : CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))  
Process  
Conditions  
Partial heating method  
Pin temperature: 300 °C or below,  
Heat time: 3 seconds or less (per pin)  
Cautions 1. During assembly care should be taken to prevent solder or flux from contacting the plastic cap.  
The optical characteristics could be degraded by such contact.  
2. Soldering by the solder flow method may have deleterious effects on prevention of plastic cap  
soiling and heat resistance. So the method cannot be guaranteed.  
Data Sheet S14314EJ2V0DS  
17  
µPD3798  
NOTES ON HANDLING THE PACKAGES  
1
DUST AND DIRT PROTECTING  
The optical characteristics of the CCD will be degraded if the cap is scratched during cleaning. Don’t either  
touch plastic cap surface by hand or have any object come in contact with plastic cap surface. Should dirt  
stick to a plastic cap surface, blow it off with an air blower. For dirt stuck through electricity ionized air is  
recommended. And if the plastic cap surface is grease stained, clean with our recommended solvents.  
CLEANING THE PLASTIC CAP  
Care should be taken when cleaning the surface to prevent scratches.  
We recommend cleaning the cap with a soft cloth moistened with one of the recommended solvents below.  
Excessive pressure should not be applied to the cap during cleaning. If the cap requires multiple cleanings it is  
recommended that a clean surface or cloth be used.  
RECOMMENDED SOLVENTS  
The following are the recommended solvents for cleaning the CCD plastic cap.  
Use of solvents other than these could result in optical or physical degradation in the plastic cap.  
Please consult your sales office when considering an alternative solvent.  
Solvents  
Ethyl Alcohol  
Symbol  
EtOH  
MeOH  
IPA  
Methyl Alcohol  
Isopropyl Alcohol  
N-methyl Pyrrolidone  
NMP  
2
MOUNTING OF THE PACKAGE  
The application of an excessive load to the package may cause the package to warp or break, or cause chips  
to come off internally. Particular care should be taken when mounting the package on the circuit board. Don't  
have any object come in contact with plastic cap. You should not reform the lead frame. We recommended to  
use a IC-inserter when you assemble to PCB.  
Also, be care that the any of the following can cause the package to crack or dust to be generated.  
1. Applying heat to the external leads for an extended period of time with soldering iron.  
2. Applying repetitive bending stress to the external leads.  
3. Rapid cooling or heating  
3
4
OPERATE AND STORAGE ENVIRONMENTS  
Operate in clean environments. CCD image sensors are precise optical equipment that should not be subject  
to mechanical shocks. Exposure to high temperatures or humidity will affect the characteristics. So avoid  
storage or usage in such conditions.  
Keep in a case to protect from dust and dirt. Dew condensation may occur on CCD image sensors when the  
devices are transported from a low-temperature environment to a high-temperature environment. Avoid such  
rapid temperature changes.  
For more details, refer to our document "Review of Quality and Reliability Handbook" (C12769E)  
ELECTROSTATIC BREAKDOWN  
CCD image sensor is protected against static electricity, but destruction due to static electricity is sometimes  
detected. Before handling be sure to take the following protective measures.  
1. Ground the tools such as soldering iron, radio cutting pliers of or pincer.  
2. Install a conductive mat or on the floor or working table to prevent the generation of static electricity.  
3. Either handle bare handed or use non-chargeable gloves, clothes or material.  
4. Ionized air is recommended for discharge when handling CCD image sensor.  
5. For the shipment of mounted substrates, use box treated for prevention of static charges.  
6. Anyone who is handling CCD image sensors, mounting them on PCBs or testing or inspecting PCBs on  
which CCD image sensors have been mounted must wear anti-static bands such as wrist straps and ankle  
straps which are grounded via a series resistance connection of about 1 M.  
18  
Data Sheet S14314EJ2V0DS  
µPD3798  
NOTES FOR CMOS DEVICES  
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS  
Note:  
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and  
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity  
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control  
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using  
insulators that easily build static electricity. Semiconductor devices must be stored and transported  
in an anti-static container, static shielding bag or conductive material. All test and measurement  
tools including work bench and floor should be grounded. The operator should be grounded using  
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need  
to be taken for PW boards with semiconductor devices on it.  
2
HANDLING OF UNUSED INPUT PINS FOR CMOS  
Note:  
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided  
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence  
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels  
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused  
pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of  
being an output pin. All handling related to the unused pins must be judged device by device and  
related specifications governing the devices.  
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES  
Note:  
Power-on does not necessarily define initial status of MOS device. Production process of MOS  
does not define the initial operation status of the device. Immediately after the power source is  
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does  
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the  
reset signal is received. Reset operation must be executed immediately after power-on for devices  
having reset function.  
Data Sheet S14314EJ2V0DS  
19  
µPD3798  
The information in this document is current as of November, 2002. The information is subject to  
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data  
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not  
all products and/or types are available in every country. Please check with an NEC Electronics sales  
representative for availability and additional information.  
No part of this document may be copied or reproduced in any form or by any means without the prior  
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may  
appear in this document.  
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual  
property rights of third parties by or arising from the use of NEC Electronics products listed in this document  
or any other liability arising from the use of such products. No license, express, implied or otherwise, is  
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.  
Descriptions of circuits, software and other related information in this document are provided for illustrative  
purposes in semiconductor product operation and application examples. The incorporation of these  
circuits, software and information in the design of a customer's equipment shall be done under the full  
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by  
customers or third parties arising from the use of these circuits, software and information.  
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,  
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To  
minimize risks of damage to property or injury (including death) to persons arising from defects in NEC  
Electronics products, customers must incorporate sufficient safety measures in their design, such as  
redundancy, fire-containment and anti-failure features.  
NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and  
"Specific".  
The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-  
designated "quality assurance program" for a specific application. The recommended applications of an NEC  
Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of  
each NEC Electronics product before using it in a particular application.  
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio  
and visual equipment, home electronic appliances, machine tools, personal electronic equipment  
and industrial robots.  
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster  
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed  
for life support).  
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life  
support systems and medical equipment for life support, etc.  
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC  
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications  
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to  
determine NEC Electronics' willingness to support a given application.  
(Note)  
(1)  
"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its  
majority-owned subsidiaries.  
(2)  
"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as  
defined above).  
M8E 02. 11-1  

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