UPD3794 [NEC]

2700 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR; 2700像素× 3彩色CCD线性图像传感器
UPD3794
型号: UPD3794
厂家: NEC    NEC
描述:

2700 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
2700像素× 3彩色CCD线性图像传感器

传感器 图像传感器 CD
文件: 总20页 (文件大小:167K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD3794  
2700 PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR  
The µPD3794 is a color CCD (Charge Coupled Device) linear image sensor which changes optical images to  
electrical signal and has the function of color separation.  
The µPD3794 has 3 rows of 2700 pixels, and each row has a single-sided readout type of charge transfer register.  
And it has reset feed-through level clamp circuits, a clamp pulse generation circuit, an RGB selector and voltage  
amplifiers. Therefore, it is suitable for 300 dpi/A4 color image scanners, color facsimiles and so on.  
FEATURES  
• Valid photocell  
: 2700 pixels × 3  
• Photocell's pitch : 8 µm  
• Line spacing  
• Color filter  
• Resolution  
: 32 µm (4 lines) Green line-Blue line, Blue line-Red line  
: Primary colors (red, green and blue), pigment filter (with light resistance 107 lx•hour)  
: 12 dot/mm A4 (210 × 297 mm) size (shorter side)  
300 dpi US letter (8.5” × 11”) size (shorter side)  
• Drive clock level : CMOS output under 5 V operation  
• Data rate  
: 4 MHz MAX.  
: +12 V  
• Power supply  
• On-chip circuits : Reset feed-through level clamp circuits  
Clamp pulse generation circuit  
RGB selector  
Voltage amplifiers  
ORDERING INFORMATION  
Part Number  
Package  
µPD3794CY  
CCD linear image sensor 22-pin plastic DIP (400 mil)  
The information in this document is subject to change without notice.  
Document No.S13125EJ1V0DS00(1st edition)  
Date published December 1997 N CP(K)  
Printed in Japan  
1997  
©
µPD3794  
BLOCK DIAGRAM  
φ
1
SEL1  
22  
GND  
15  
SEL2  
20  
V
OD  
GND GND  
11  
19  
2
14  
Photocell  
(Green)  
······  
······  
······  
φ
TG1  
(Green)  
Transfer gate  
13  
12  
CCD analog shift register  
Photocell  
(Blue)  
φ
TG2  
(Blue)  
Transfer gate  
1
VOUT  
CCD analog shift register  
Photocell  
(Red)  
φ
TG3  
(Red)  
Transfer gate  
10  
CCD analog shift register  
Clamp pulse  
generator  
9
3
φ
2
φ
RB  
2
µPD3794  
PIN CONFIGURATION (Top View)  
CCD linear image sensor 22-pin plastic DIP (400 mil)  
Output signal  
Ground  
V
OUT  
22  
SEL1  
NC  
RGB select input 1  
1
2
GND  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
No connection  
Reset gate clock  
No connection  
φ
3
SEL2  
RGB select input2  
Output drain voltage  
RB  
NC  
NC  
NC  
NC  
NC  
4
VOD  
No connection  
No connection  
No connection  
5
NC  
No connection  
No connection  
No connection  
Ground  
6
NC  
7
NC  
GND  
8
No connection  
φ
9
φ
φ
φ
2
1
Shift register clock 2  
Shift register clock 1  
φ
TG3  
Transfer gate clock 3  
(for Red)  
10  
11  
TG1  
TG2  
Transfer gate clock 1  
(for Green)  
Transfer gate clock 2  
(for Blue)  
GND  
Ground  
PHOTOCELL STRUCTURE DIAGRAM  
PHOTOCELL ARRAY STRUCTURE DIAGRAM  
(Line spacing)  
8 µm  
8 µm  
8 µm  
Green photocell array  
Blue photocell array  
Red photocell array  
3
5 µm  
µ
m
4 lines  
(32 µm)  
µ
Channel stopper  
4 lines  
(32 µm)  
Aluminum  
shield  
3
µPD3794  
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C)  
Parameter  
Output drain voltage  
Symbol  
Ratings  
–0.3 to +15  
–0.3 to +8  
–0.3 to +8  
–0.3 to +8  
–0.3 to +8  
–25 to +60  
–40 to +70  
Unit  
V
VOD  
Shift register clock voltage  
Reset gate clock voltage  
Transfer gate clock voltage  
RGB select input voltage  
Operating ambient temperature  
Storage temperature  
Vφ1, Vφ2  
VφRB  
V
V
VφTG1 to VφTG3  
VSEL1,VSEL2  
TA  
V
V
°C  
°C  
Tstg  
Caution  
Exposure to ABSOLUTE MAXIMUM RATINGS for extended periods may affect device reliability;  
exceeding the ratings could cause permanent damage. The parameters apply independently.  
RECOMMENDED OPERATING CONDITIONS (TA = +25 °C)  
Parameter  
Output drain voltage  
Symbol  
MIN.  
11.4  
4.5  
TYP.  
12.0  
5.0  
0
MAX.  
12.6  
5.5  
Unit  
V
VOD  
Shift register clock high level  
Shift register clock low level  
Reset gate clock high level  
Reset gate clock low level  
Transfer gate clock high level  
Transfer gate clock low level  
RGB select input high level  
RGB select input low level  
Data rate  
Vφ1H, Vφ2H  
Vφ1L, Vφ2L  
VφRBH  
V
–0.3  
4.5  
+0.5  
5.5  
V
5.0  
V
VφRBL  
–0.3  
4.5  
0
+0.5  
V
Vφ1HNote  
Vφ1HNote  
VφTG1H to VφTG3H  
VφTG1L to VφTG3L  
VSEL1H, VSEL2H  
VSEL1L, VSEL2L  
fφRB  
V
–0.3  
4.5  
0
+0.5  
5.5  
V
5.0  
0
V
–0.3  
+0.5  
4.0  
V
1.0  
MHz  
Note When Transfer gate clock high level (VφTG1H to VφTG3H) is higher than Shift register clock high level (Vφ1H),  
Image lag can increase.  
4
µPD3794  
ELECTRICAL CHARACTERISTICS  
TA = +25 °C, VOD = 12 V, data rate (fφRB) = 1 MHz, storage time = 10 ms,  
light source: 3200 K halogen lamp +C-500S (infrared cut filter, t = 1mm), input signal clock = 5 Vp-p  
Parameter  
Saturation voltage  
Saturation exposure  
Symbol  
Vsat  
Test Conditions  
MIN.  
2.0  
TYP.  
3.0  
MAX.  
Unit  
V
Red  
SER  
SEG  
SEB  
PRNU  
ADS  
DSNU  
PW  
0.205  
0.225  
0.375  
6
lx•s  
lx•s  
lx•s  
%
Green  
Blue  
Photo response non-uniformity  
Average dark signal  
VOUT = 1.0 V  
20  
5.0  
Light shielding  
Light shielding  
0.5  
mV  
mV  
mW  
kΩ  
Dark signal non-uniformity  
Power consumption  
4.0  
10.0  
600  
1
300  
0.5  
Output impedance  
ZO  
Response  
Red  
RR  
10.3  
9.4  
14.6  
13.3  
8.0  
18.9  
17.2  
10.4  
10.0  
7.5  
V/lx•s  
V/lx•s  
V/lx•s  
%
Green  
Blue  
RG  
RB  
5.6  
Image lag  
IL  
VOUT = 1.0 V  
5.0  
Note1  
Offset level  
VOS  
4.5  
92  
6.0  
V
Note2  
Output fall delay time  
td  
VOUT = 1.0 V  
70  
ns  
Total transfer efficiency  
TTE  
VOUT = 1.0 V,  
98  
%
data rate = 4 MHz  
Response peak  
Red  
630  
540  
460  
750  
3000  
–300  
1.0  
nm  
nm  
Green  
Blue  
nm  
Dynamic range  
DR1  
DR2  
RFTN  
σ
Vsat /DSNU  
Vsat /σ  
times  
times  
mV  
Note1  
Reset feed-through noise  
Random noise  
Light shielding  
Light shielding  
–1000  
+500  
mV  
Notes 1. Refer to TIMING CHART 2.  
2. When the fall time of φ1 (t1) is the TYP. value (refer to TIMING CHART 2).  
5
µPD3794  
INPUT PIN CAPACITANCE (TA = +25 °C, VOD = 12 V)  
Parameter  
Symbol Pin name Pin No.  
MIN.  
TYP.  
300  
300  
20  
MAX.  
Unit  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
pF  
Shift register clock pin capacitance 1  
Shift register clock pin capacitance 2  
Reset gate clock pin capacitance  
Transfer gate clock pin capacitance  
Cφ1  
φ1  
14  
9
Cφ2  
φ2  
CφRB  
CφTG  
φRB  
φTG1  
φTG2  
φTG3  
SEL1  
SEL2  
3
13  
12  
10  
22  
20  
50  
50  
50  
RGB select input pin capacitance  
CSEL  
50  
50  
RGB SELECT FUNCTION  
RGB select input  
Output color  
SEL1  
High level  
High level  
Low level  
Low level  
SEL2  
High level  
Low level  
High level  
Low level  
Blue  
Green  
Red  
Prohibited  
6
TIMING CHART 1-1  
SEL1  
SEL2  
φ TG1 to  
a
b
φ TG3  
φ 1  
φ 2  
φ RB  
Note  
Note  
V
OUT  
(Blue)  
Optical black  
(48 pixels)  
Valid photocell (2700 pixels)  
Invalid photocell  
(2 pixels)  
Invalid photocell  
(3 pixels)  
µ
Input the φRB pluse continuously during this period, too.  
Note  
TIMING CHART 1-2  
SEL1  
SEL2  
φ TG1 to  
b
c
φ TG3  
φ 1  
φ 2  
φ RB  
Note  
Note  
V
OUT  
(Green)  
Optical black  
(48 pixels)  
Valid photocell (2700 pixels)  
Invalid photocell  
(2 pixels)  
Invalid photocell  
(3 pixels)  
Input the φRB pluse continuously during this period, too.  
Note  
µ
TIMING CHART 1-3  
SEL1  
SEL2  
φ TG1 to  
c
a
φ TG3  
φ 1  
φ 2  
φ RB  
Note  
Note  
V
OUT  
(Red)  
Optical black  
(48 pixels)  
Valid photocell (2700 pixels)  
Invalid photocell  
(2 pixels)  
Invalid photocell  
(3 pixels)  
µ
Input the φRB pluse continuously during this period, too.  
Note  
µPD3794  
TIMING CHART 2 (for each color)  
t1  
t2  
90 %  
10 %  
φ
φ
1
2
90 %  
10 %  
t5  
t6  
t3  
t4  
90 %  
10 %  
φ
RB  
+
_
td  
RFTN  
RFTN  
VOUT  
VOS  
10 %  
φTG1 to φTG3, φ1, φ2 TIMING CHART  
t8  
t9  
t7  
90 %  
φ
TG1 to TG3  
φ
10 %  
t10  
t11  
90 %  
φ
1
φ
2
Symbol  
t1, t2  
MIN.  
0
TYP.  
25  
MAX.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
t3  
30  
50  
t4  
150  
0
250  
25  
t5, t6  
t7  
3000  
0
10000  
50  
t8, t9  
t10, t11  
900  
1000  
φ1, φ2 cross points  
φ
1
2
2 V or more  
2 V or more  
φ
Remark Adjust cross points of φ1 and φ2 with input resistance of each pin.  
10  
µPD3794  
APPLICATION TIMING EXAMPLE (for reference)  
The µPD3794 can be operated under the following timing to switch Red, Green, and Blue outputs and get each  
color data in a 1-pixel period. However the offset level of each color is not the same. Therefore, offset level  
compensation is required to each color by using each color’s data at dark or the optical black pixels.  
The following timing and parameters are for reference only.  
SEL1  
SEL2  
t
R
t
G
t
B
φ
φ
1
2
φ
RB  
at dark  
VOUT  
with light  
Red  
Green  
Blue  
Symbol  
MIN.  
300  
TYP.  
MAX.  
Unit  
ns  
tR, tG, tB  
11  
µPD3794  
DEFINITIONS OF CHARACTERISTIC ITEMS  
1. Saturation voltage: Vsat  
Output signal voltage at which the response linearity is lost.  
2. Saturation exposure: SE  
Product of intensity of illumination (IX) and storage time (s) when saturation of output voltage occurs.  
3. Photo response non-uniformity: PRNU  
The output signal non-uniformity of all the valid pixels when the photosensitive surface is applied with the light  
of uniform illumination. This is calculated by the following formula.  
x  
PRNU (%) =  
× 100  
x
x : maximum of xj x  
2700  
xj  
Σ
j=1  
x =  
2700  
xj : Output voltage of valid pixel number j  
VOUT  
x
Register Dark  
DC level  
x  
4. Average dark signal: ADS  
Average output signal voltage of all the valid pixels at light shielding. This is calculated by the following formula.  
2700  
d
j=1  
2700  
j
Σ
ADS (mV) =  
dj : Dark signal of valid pixel number j  
5. Dark signal non-uniformity: DSNU  
Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the valid  
pixels at light shielding. This is calculated by the following formula.  
DSNU (mV) : maximum of d  
j
ADS j = 1 to 2700  
dj  
: Dark signal of valid pixel number j  
V
OUT  
ADS  
Register Dark  
DC level  
DSNU  
12  
µPD3794  
6. Output impedance: ZO  
Impedance of the output pins viewed from outside.  
7. Response: R  
Output voltage divided by exposure (Ix•s).  
Note that the response varies with a light source (spectral characteristic).  
8. Image Lag: IL  
The rate between the last output voltage and the next one after read out the data of a line.  
TG  
Light  
ON  
OFF  
V
OUT  
V
1
V
OUT  
V1  
IL (%) =  
×100  
VOUT  
9. Random noise: σ  
Random noise σ is defined as the standard deviation of a valid pixel output signal with 100 times (=100 lines)  
data sampling at dark (light shielding).  
100  
100  
(V  
i
– V)2  
100  
1
Σ
σ (mV) =  
, V =  
Vi  
100 Σ  
i=1  
i=1  
Vi: A valid pixel output signal among all of the valid pixels for each color  
V
V
1
2
V
OUT  
line 1  
line 2  
V
100  
line 100  
This is measured by the DC level sampling of only the signal level, not by CDS (Correlated Double Sampling).  
13  
µPD3794  
STANDARD CHARACTERISTIC CURVES  
DARK OUTPUT TEMPERATURE  
CHARACTERISTIC  
STORAGE TIME OUTPUT VOLTAGE  
CHARACTERISTIC (TA = +25 °C)  
8
4
2
1
2
1
0.5  
0.25  
0.2  
0.1  
0.1  
0
10  
20  
30  
40  
50  
1
5
10  
Operating Ambient Temperature TA(°C)  
Storage Time (ms)  
TOTAL SPECTRAL RESPONSE CHARACTERISTICS  
(without infrared cut filter) (T = +25 °C)  
A
100  
80  
R
B
G
60  
40  
20  
G
B
0
400  
500  
600  
700  
800  
Wavelength (nm)  
14  
µPD3794  
APPLICATION CIRCUIT EXAMPLE  
+5 V  
+12 V  
10  
+
+
µPD3794  
10  
µ
F/16 V 0.1  
µ
F
0.1 µF 47 µF/25 V  
47 Ω  
47 Ω  
1
2
3
22  
21  
20  
19  
18  
B
VOUT  
SEL1  
SEL1  
GND  
NC  
47 Ω  
SEL2  
φ
RB  
φ
RB  
SEL2  
+5 V  
4
5
6
7
VOD  
NC  
NC  
NC  
NC  
NC  
NC  
17  
16  
15  
14  
13  
12  
+
NC  
NC  
0.1 µF 10 µF/16 V  
8
9
GND  
4.7 Ω  
10 Ω  
4.7 Ω  
10 Ω  
10 Ω  
φ
φ
2
φ1  
φ
φ
1
2
φ
10  
TG3  
φ
TG1  
TG2  
TG  
11  
GND  
φ
Remark  
Inverters: 74HC04  
B EQUIVALENT CIRCUIT  
12 V  
+
µ
47 F/25 V  
100  
100 Ω  
CCD  
2SC945  
V
OUT  
2 kΩ  
15  
µPD3794  
PACKAGE DRAWING  
CCD LINEAR IMAGE SENSOR 22PIN PLASTIC DIP (400 mil)  
(Unit : mm)  
1st valid pixel  
3.95±0.3  
3
37.5  
44.0±0.3  
10.16  
(1.99)  
1
2.35±0.2  
(5.42)  
4.21±0.5  
4.39±0.4  
2.54  
1.02±0.15  
0.46±0.1  
25.4  
Name  
Dimensions  
42.9 x 8.35 x 0.7  
Refractive index  
2
Plastic cap  
1.5  
1 The bottom of the package  
2 The thickness of the cap over the chip  
3 The 1st valid pixel The center of the pin 1.  
The surface of the chip  
22C-1CCD-PKG10-1  
16  
µPD3794  
RECOMMENDED SOLDERING CONDITIONS  
When soldering this product, it is highly recommended to observe the conditions as shown below.  
If other soldering processes are used, or if the soldering is performed under different conditions, please make sure  
to consult with our sales offices.  
For more details, refer to our document "Semiconductor Device Mounting Technology Manual"(C10535E).  
Type of Through-hole Device  
µPD3794CY: CCD linear image sensor 22-pin plastic DIP (400 mil)  
Process  
Conditions  
Partial heating method  
Pin temperature: 260 °C or below,  
Heat Time: 10 seconds or less (per pin)  
Caution  
During assembly care should be taken to prevent solder or flux from contacting the plastic cap.  
The optical characteristics could be degraded by such contact.  
17  
µPD3794  
NOTES ON CLEANING THE PLASTIC CAP  
1 CLEANING THE PLASTIC CAP  
Care should be taken when cleaning the surface to prevent scratches.  
The optical characteristics of the CCD will be degraded if the cap is scratched during  
cleaning.  
We recommend cleaning the cap with a soft cloth moistened with one of the recommended  
solvents below. Excessive pressure should not be applied to the cap during cleaning. If the  
cap requires multiple cleanings it is recommended that a clean surface or cloth be used.  
2 RECOMMENDED SOLVENTS  
The following are the recommended solvents for cleaning the CCD plastic cap. Use of  
solvents other than these could result in optical or physical degradation in the plastic cap.  
Please consult your sales office when considering an alternative solvent.  
Solvents  
Symbol  
Ethyl Alcohol  
EtOH  
MeOH  
IPA  
Methyl Alcohol  
Isopropyl Alcohol  
N-methyl Pyrrolidone  
NMP  
18  
µPD3794  
NOTES FOR CMOS DEVICES  
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS  
Note: Strong electric field, when exposed to a MOS device, can cause destruction of  
the gate oxide and ultimately degrade the device operation. Steps must be  
taken to stop generation of static electricity as much as possible, and quickly  
dissipate it once, when it has occurred. Environmental control must be  
adequate. When it is dry, humidifier should be used. It is recommended to  
avoid using insulators that easily build static electricity. Semiconductor  
devices must be stored and transported in an anti-static container, static  
shielding bag or conductive material. All test and measurement tools including  
work bench and floor should be grounded. The operator should be grounded  
using wrist strap. Semiconductor devices must not be touched with bare  
hands. Similar precautions need to be taken for PW boards with semiconductor  
devices on it.  
2 HANDLING OF UNUSED INPUT PINS FOR CMOS  
Note: No connection for CMOS device inputs can be cause of malfunction. If no  
connection is provided to the input pins, it is possible that an internal input  
level may be generated due to noise, etc., hence causing malfunction. CMOS  
device behave differently than Bipolar or NMOS devices. Input levels of CMOS  
devices must be fixed high or low by using a pull-up or pull-down circuitry. Each  
unused pin should be connected to VDD or GND with a resistor, if it is considered  
to have a possibility of being an output pin. All handling related to the unused  
pins must be judged device by device and related specifications governing the  
devices.  
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES  
Note: Power-on does not necessarily define initial status of MOS device. Production  
process of MOS does not define the initial operation status of the device.  
Immediately after the power source is turned ON, the devices with reset function  
have not yet been initialized. Hence, power-on does not guarantee out-pin  
levels, I/O settings or contents of registers. Device is not initialized until the  
reset signal is received. Reset operation must be executed immediately after  
power-on for devices having reset function.  
19  
µPD3794  
[MEMO]  
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.  
No part of this document may be copied or reproduced in any form or by any means without the prior written  
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in  
this document.  
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property  
rights of third parties by or arising from use of a device described herein or any other liability arising from use  
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other  
intellectual property rights of NEC Corporation or others.  
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,  
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or  
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety  
measures in its design, such as redundancy, fire-containment, and anti-failure features.  
NEC devices are classified into the following three quality grades:  
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a  
customer designated "quality assurance program" for a specific application. The recommended applications of  
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device  
before using it in a particular application.  
Standard: Computers, office equipment, communications equipment, test and measurement equipment,  
audio and visual equipment, home electronic appliances, machine tools, personal electronic  
equipment and industrial robots  
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster  
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed  
for life support)  
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life  
support systems or medical equipment for life support, etc.  
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.  
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,  
they should contact an NEC sales representative in advance.  
Anti-radioactive design is not implemented in this product.  
M4 96.5  

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NEC

UPD3799

5300 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD3799CY

5300 PIXELS x 3 COLOR CCD LINEAR IMAGE SENSOR
NEC

UPD4016C-1

Standard SRAM, 2KX8, 250ns, NMOS, PDIP24, 0.600 INCH, DIP-24
NEC

UPD4016C-2

Standard SRAM, 2KX8, 200ns, NMOS, PDIP24, 0.600 INCH, DIP-24
NEC

UPD4016C-3

Standard SRAM, 2KX8, 150ns, NMOS, PDIP24, 0.600 INCH, DIP-24
NEC

UPD4016C-5

Standard SRAM, 2KX8, 120ns, NMOS, PDIP24, 0.600 INCH, DIP-24
NEC

UPD4016C2

2KX8 STANDARD SRAM, 200ns, PDIP24, 0.600 INCH, DIP-24
NEC