HI-5700/883 [INTERSIL]
8-Bit, 20 MSPS Flash A/D Converter; 8位, 20 MSPS的Flash A / D转换器型号: | HI-5700/883 |
厂家: | Intersil |
描述: | 8-Bit, 20 MSPS Flash A/D Converter |
文件: | 总8页 (文件大小:658K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
HI-5700/883
8-Bit, 20 MSPS Flash A/D Converter
May 1997
Features
Description
• This Circuit is Processed in Accordance to MIL-STD- The HI-5700/883 is a monolithic, 8-bit, CMOS Flash Analog-
883 and is Fully Conformant Under the Provisions of to-Digital Converter. It is designed for high speed applica-
Paragraph 1.2.1.
tions where wide bandwidth and low power consumption are
essential. Its 20 MSPS speed is made possible by a parallel
architecture which also eliminates the need for an external
sample and hold circuit. The HI-5700/883 delivers ±0.5 LSB
differential nonlinearity while consuming only 725mW (typi-
cal) at 20 MSPS. Microprocessor compatible data output
latches are provided which present valid data to the output
bus 1.5 clock cycles after the convert command is received.
An overflow bit is provided to allow the series connection of
two converters to achieve 9-bit resolution.
• 20 MSPS with No Missing Codes
• 18MHz Full Power Input Bandwidth
• No Missing Codes Over Temperature
• Sample and Hold Not Required
• Single +5V Supply Voltage
• CMOS/TTL
• Overflow Bit
Applications
Ordering Information
• Video Digitizing
TEMPERATURE
• Radar Systems
PART NUMBER
RANGE
PACKAGE
• Medical Imaging
HI1-5700S/883
-55oC to +125oC
28 Lead CerDIP
• Communication Systems
• High Speed Data Acquisition Systems
Functional Block Diagram
Pinout
∅2
∅1
∅1
∅1
∅2
HI-5700/883
(28 LEAD CERDIP)
TOP VIEW
VIN
28
OVERFLOW
(OVF)
D
CL
R/2
Q
14
VREF+ 17
V
V
1
2
R
CLK
D7
28
IN
COMP
D
CL
256
Q
2
3
D7 (MSB)
D6
-
27
26
25
24
REF
R
D6
AV
DD
3
9
22
6
3/4R
1/2R
1/4R
D
CL
Q
R
R
R
R
R
R
AGND
AGND
4
D5
COMP
193
5
D4
1/4R
VDD
D
CL
Q
D5
D4
D3
4
5
6
23 AVDD
COMP
129
1/2R
AV
7
22
21
20
19
18
17
16
15
D
CL
Q
8
GND
3/4R
DD
AGND
D
CL
9
10
Q
COMP
65
D3
D2
10
11
12
13
14
AGND
D
CL
AV
DD
D2
D1
Q
11
12
V
+
D1
REF
D
CL
COMP
2
Q
D0
CE1
CE2
R
OVF
D
CL
VREF
-
27
1
13
D0 (LSB)
Q
R/2
COMP
1
CE1
CE2
16
15
∅1
∅2
V
DD
AV
7
8
23 21 26 18
24 25 19 20
DD
CLK
AGND
GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Spec Number 512023
File Number 3286.1
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
6-8
HI-5700/883
Chip Enable Truth Table
Pin Descriptions
PIN #
NAME
CLK
D7
DESCRIPTION
Clock Input
CE1
CE2
D0 - D7
Valid
OVF
1
0
1
1
0
Valid
Valid
2
Bit 7, Output (MSB)
Bit 6, Output
1
Three-State
Three-State
3
D6
X
Three-State
4
D5
Bit 5, Output
X = Don’t Care.
5
D4
Bit 4, Output
6
1/4R
VDD
GND
3/4R
D3
1/4th Point of Reference Ladder
Digital Power Supply
Digital Ground
7
8
9
3/4th Point of Reference Ladder
Bit 3, Output
10
11
12
13
14
15
D2
Bit 2, Output
D1
Bit 1, Output
D0
Bit 0, Output (LSB)
Overflow, Output
OVF
CE2
Three-State Output Enable Input,
Active High. (See Truth Table)
16
CE1
Three-State Output Enable Input,
Active Low. (See Truth Table))
17
18
19
20
21
22
23
24
25
26
27
28
VREF
+
Reference Voltage Positive Input
Analog Power Supply, +5V
Analog Ground
AVDD
AGND
AGND
AVDD
1/2R
Analog Ground
Analog Power Supply, +5V
1/2 Point of Reference Ladder
Analog Power Supply, +5V
Analog Ground
AVDD
AGND
AGND
AVDD
Analog Ground
Analog Power Supply, +5V
Reference Voltage Negative Input
Analog Input
VREF
VIN
-
Spec Number 512023
6-9
Specifications HI-5700/883
Absolute Maximum Ratings
Thermal Information
Supply Voltage, VDD to GND . . . . . . . . . (GND - 0.5) < VDD < +7.0V
Analog and Reference Input Pins. .(VSS - 0.5) < VINA < (VDD +0.5V)
Thermal Resistance
θJA
θJC
HI1-5700S/883 . . . . . . . . . . . . . . . . . . . .
470C/W
28oC/W
Digital I/O Pins . . . . . . . . . . . . . . . (GND - 0.5) < VI/O < (VDD +0.5V) Power Dissipation at +75oC (Note 1)
Operating Temperature Range
HI1-5700S/883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2100mW
HI1-5700S/883 . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
Power Dissipation Derating Factor Above +75oC
HI1-5700S/883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21mW/oC
Storage Temperature Range . . . . . . . . . . . . . . . -65oC to +150oC Reliabiliy Information
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . 300oC
ESD Clasification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14677
Worst Case Density . . . . . . . . . . . . . . . . . . . . . . . . 3.05 x 104A/cm2
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: AVDD = VDD = +5.0V; VREF+ = +4.0V; VREF- = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle;
CL = 30pF; Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETERS
ACCURACY
SYMBOL
CONDITIONS
SUBGROUP
TEMPERATURE
MIN
MAX
UNIT
Integral Linearity Error
(Best Fit Method)
INL
FS = 15MHz, fIN = DC
FS = 20MHz, fIN = DC
FS = 15MHz, fIN = DC
FS = 20MHz, fIN = DC
FS = 15MHz, fIN = DC
FS = 20MHz, fIN = DC
FS = 15MHz, fIN = DC
FS = 20MHz, fIN = DC
1
2, 3
1
+25oC
+125oC, -55oC
+25oC
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
±2.0
±2.65
±2.25
±4.1
±0.9
±1.0
±0.9
±1.0
±8.0
±9.5
±8.0
±9.5
±4.5
±8.0
±4.5
±8.0
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
2, 3
1
+125oC, -55oC
+25oC
Differential Linearity Error
(Guaranteed No Missing
Codes)
DNL
VOS
FSE
2, 3
1
+125oC, -55oC
+25oC
2, 3
1
+125oC, -55oC
+25oC
Offset Error
(Adjustable to Zero)
2, 3
1
+125oC, -55oC
+25oC
2, 3
1
+125oC, -55oC
+25oC
Full Scale Error
(Adjustable to Zero)
2, 3
1
+125oC, -55oC
+25oC
2, 3
+125oC, -55oC
ANALOG INPUT
Analog Input Resistance
RIN
VIN = 4V
1
+25oC
+125oC, -55oC
+25oC
4
4
-
MΩ
MΩ
µA
2, 3
1
-
Analog Input Bias Current
IB
VIN = 0V, 4V
±1.0
±1.0
2, 3
+125oC, -55oC
µA
REFERENCE INPUT
Total Reference Resistance
RL
1
+25oC
250
235
-
-
Ω
Ω
2, 3
+125oC, -55oC
Spec Number 512023
6-10
Specifications HI-5700/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: AVDD = VDD = +5.0V; VREF+ = +4.0V; VREF- = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle;
CL = 30pF; Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETERS
DIGITAL INPUTS
SYMBOL
VIH
CONDITIONS
SUBGROUP
TEMPERATURE
MIN
MAX
UNIT
Input High Voltage
Input Low Voltage
Logic Input Current
1
2, 3
1
+25oC
+125oC, -55oC
+25oC
2.0
-
V
V
2.0
-
VIL
-
-
-
-
0.8
0.8
±1
±1
V
2, 3
1
+125oC, -55oC
+25oC
V
IIN
VIN = 0V, +5V
µA
µA
2, 3
+125oC, -55oC
DIGITAL OUTPUTS
Output Leakage
IOZ
IOH
IOL
CE2 = 0V, VO = 0V, 5V
VO = 4.5V
1
2, 3
1
+25oC
+125oC, -55oC
+25oC
-
±1.0
µA
µA
-
±1.0
Output Logic Source Current
Output Logic Sink Current
-3.2
-3.2
3.2
3.2
-
-
-
-
mA
mA
mA
mA
2, 3
1
+125oC, -55oC
+25oC
VO = 0.4V
2, 3
+125oC, -55oC
POWER SUPPLY REJECTION
Offset Error PSRR
∆VOS
∆FSE
VDD = 5V ±10%
VDD = 5V ±10%
1
+25oC
+125oC, -55oC
+25oC
-
-
-
-
±2.75
±5.5
LSB
LSB
LSB
LSB
2, 3
1
Gain Error PSRR
±2.75
±5.5
2, 3
+125oC, -55oC
POWER SUPPLY CURRENT
Supply Current
IDD
FS = 20MHz
1
+25oC
-
-
180
190
mA
mA
2, 3
+125oC, -55oC
NOTE:
1. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: AVDD = VDD = +5.0V; VREF+ = +4.0V; VREF- = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle;
CL = 30pF; Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETER
SYMBOL
CONDITIONS
SUBGROUP
TEMPERATURE
+25oC
MIN
20
20
-
MAX
UNIT
MSPS
MSPS
ns
Maximum Conversion Rate
No Missing Codes
9
-
10, 11
9
+125oC, -55oC
+25oC
-
Data Output Enable Time
tEN
25
30
10, 11
+125oC, -55oC
-
ns
Spec Number 512023
6-11
Specifications HI-5700/883
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: AVDD = VDD = +5.0V; VREF+ = +4.0V; VREF- = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty Cycle;
CL = 30pF; Unless Otherwise Specified.
LIMITS
GROUP A
PARAMETER
SYMBOL
CONDITIONS
SUBGROUP
TEMPERATURE
+25oC
MIN
MAX
20
25
25
30
-
UNIT
ns
Data Output Disable Time
tDIS
9
-
-
10, 11
9
+125oC, -55oC
+25oC
ns
Data Output Delay
Data Output Hold
tOD
-
ns
10, 11
9
+125oC, -55oC
+25oC
-
ns
tH
10
5
ns
10, 11
+125oC, -55oC
-
ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (NOTE 1)
Device Characterized at: AVDD = VDD = +5.0V; VREF+ = +4.0V; VREF- = GND = AGND = 0V; FS = Specified Clock Frequency at 50% Duty
Cycle; CL = 30pF; Unless Otherwise Specified.
LIMITS
PARAMETER
Minimum Conversion Rate
NOTE:
SYMBOL
CONDITIONS
TEMPERATURE
MIN
MAX
UNIT
No Missing Codes
+25oC, +125oC, -55oC
-
0.125
MSPS
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These pa-
rameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by character-
ization based upon data from multiple production runs which reflect lot to lot and within lot variation.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Interim Electrical Parameters (Pre Burn-In)
Final Electrical Test Parameters
Group A Test Requirements
Groups C & D Endpoints
SUBGROUPS (SEE TABLES 1 AND 2)
1
1 (Note 1), 2, 3, 9, 10, 11
1, 2, 3, 9, 10, 11
1
NOTE:
1. PDA applies to Subgroup 1 only. No other subgroups are included in PDA.
Spec Number 512023
6-12
HI-5700/883
Die Characteristics
DIE DIMENSIONS:
154.3 x 173.2 x 19 ± 1mils
METALLIZATION:
Type: Si - Al
Thickness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO
2
Thickness: 8kÅ ± 1kÅ
DIE ATTACH:
Material: Gold Silicon Eutectic Alloy
o
Temperature: Ceramic DIP - 460 C (Max)
WORST CASE CURRENT DENSITY:
4
2
3.05 x 10 A/cm
Metallization Mask Layout
HI-5700/883
26
25
4
3
2
1
28
27
D4
5
AGND
1/4R
VDD
6
7
AGND
AVDD
24
23
VDD
GND
GND
7
8
22
21
1/2R
AVDD
AGND
8
20
3/4R
D3
9
AGND
AVDD
19
10
11
12
13
14
15
16
17
18
Spec Number 512023
6-13
Specifications HI-5700/883
Timing Waveforms
ENCODER DATA IS
LATCHED INTO THE
OUTPUT REGISTERS
COMPARATOR DATA
IS LATCHED
SAMPLE
SAMPLE
N-1
SAMPLE
N
SAMPLE
N+1
SAMPLE
N+2
CLOCK
N-2
AUTO
BALANCE
tAB
AUTO
BALANCE
AUTO
BALANCE
AUTO
BALANCE
INPUT
ANALOG
INPUT
tAP
tH
tAJ
tOD
DATA
OUTPUT
DATA N-4
DATA N-3
DATA N-2
DATA N-1
DATA N
FIGURE 1. INPUT-TO-OUTPUT TIMING
CE1
CE2
tEN
tEN
tDIS
tDIS
HIGH
HIGH
D0 - D7
DATA
DATA
DATA
DATA
IMPEDANCE
IMPEDANCE
HIGH
IMPEDANCE
OVF
DATA
FIGURE 2. OUTPUT ENABLE TIMING
Spec Number 512023
6-14
HI-5700/883
Burn-In Circuit
HI-5700/883 CERAMIC DIP
+5.5V
1:10 DUTY CYCLE
100kHz; 0 < V< 5 VOLTS
0.01µF
1µF
GND
TRIANGLE-WAVEFORM;
28
1
2
3
4
5
6
7
8
9
CLK
D7
VIN
fIN = 12.5kHz
27
26
25
24
23
22
21
20
19
VREF-
AVDD
AGND
AGND
AVDD
1/2R
D6
D5
D4
1/4R
DVDD
DGND
3/4R
AVDD
AGND
AGND
10 D3
D2
AVDD 18
11
12
13
14
D1
VREF+
CE1
17
16
15
0.01µF
D0
1µF
OVF
CE2
GND
GND
Spec Number 512023
6-15
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