MB3782PF-XXXE1 [FUJITSU]
Switching Controller, 0.075A, 500kHz Switching Freq-Max, BIPolar, PDSO20, 5.30 X 12.70 MM, 2.25 MM HEIGHT, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, SOP-20;
| 型号： | MB3782PF-XXXE1 |
| 厂家： | 
FUJITSU |
| 描述： | Switching Controller, 0.075A, 500kHz Switching Freq-Max, BIPolar, PDSO20, 5.30 X 12.70 MM, 2.25 MM HEIGHT, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, SOP-20 开关 光电二极管 |
| 文件： | 总28页 (文件大小：294K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FUJITSU MICROELECTRONICS
DATA SHEET
DS04-27205-7Ea
ASSP Power Supplies
BIPOLAR
Switching Regulator Controller
MB3782
■ DESCRIPTION
The FUJITSU MICROELECTRONICS MB3782 is a PWM-type switching regulator controller, designed with open-
collector output for connection to external drive transistors and coils, providing a selection of three types of output
voltage: step-up, step-down or inverting (inverting output is available on one circuit only).
The MB3782 features identical oscillator output waveforms to enable completely synchronous operation and
prevent the occurrence of low-frequency beat between channels.
Also, the MB3782 features low power dissipation (2.1 mA Typ) and a built-in standby mode (10 µA), making
possible the configuration of a wide variety of high-efficiency, stable power supplies, even with the use of battery
power. The MB3782 is an ideal power supply for high-performance portable devices such as video camcorders
and cameras.
■ FEATURES
• Wide voltage range (3.6 V to 18 V)
• Low power dissipation (operating mode: 2.1 mA (Typ), standby mode: 10 µA (Max)
• Wide range of oscillator frequencies, high-frequency capability (1 kHz to 500 kHz)
• On-chip timer-latch type short detection circuit
• On-chip undervoltage lockout circuit
• On-chip 2.50 V reference voltage circuit (1.25 V output available at RT pin)
• Dead time adjustment over full duty cycle range
• On-chip standby mode (power on/off function)
• One type of package (SOP-20pin : 1 type)
■ APPLICATIONS
• LCD monitor/panel
• Surveillance camera
etc.
Copyright©1995-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2006.5
MB3782
■ PIN ASSIGNMENT
TOP VIEW
VREF
CT
1
2
20
VCC
19
18
17
16
15
14
13
12
11
CTL
RT
3
− IN3
FB3
+ IN1
− IN1
FB1
4
5
DTC3
OUT3
SCP
− IN2
FB2
6
DTC1
PUT1
GND
OUT2
7
8
9
10
DTC2
(FPT-20P-M01)
■ PIN DESCRIPTION
Pin No.
Pin Name
I/O
Description
2.50 V (typ) voltage output: provides load current up to 3 mA,
for use as error amplifier reference input and for dead time
setting.
1
VREF
O
Oscillator timing capacity connection: should be used in the
capacity range 150 pF to 15000 pF.
2
3
CT
—
Oscillator timing resistor connection: should be used in the
resistance range 5.1 kΩ to 100 kΩ. This pin can also provide
output at voltage level VREF/2, for use as error amplifier
reference input.
RT
—
4
5
+IN1
–IN1
I
I
Error amplifier 1 non-inverting input pin.
Error amplifier 1 inverting input pin.
Error amplifier 1 output pin: connect resistor and capacitor
between this pin and the –IN1 pin to set gain and adjust
frequency characteristics.
6
7
FB1
O
I
OUT1 dead time setting pin: VREF voltage is divided by an
external resistor and applied to set dead time. Also, a capacitor
may be connected between this pin and the GND pin to perform
soft start operations.
DTC1*1
(Continued)
2
MB3782
(Continued)
Pin No.
Pin Name
I/O
Description
Open collector type output pin with an emitter connected to
GND.
8
VOUT1
O
Output current may be up to 50 mA.
9
GND
—
O
Ground pin
Open collector type output pin with an emitter connected to
GND. Output current may be up to 50 mA.
10
OUT2
Used to set OUT2 pin dead time. VREF voltage is divided by an
external resistor and applied to set dead time. Also, a capacitor
may be connected between this pin and the GND pin to perform
soft start operations.
11
DTC2*1
I
Error amplifier 2 output pin: connect resistor and capacitor
between this pin and the –IN2 pin to set gain and adjust
frequency characteristics.
12
13
FB2
O
I
–IN2
Error amplifier 2 inverting input pin.
Time constant setting capacitor connection for timer-latch
type short prevention circuit: a capacitor should be connected
between this pin and the GND pin. For details, see “■ Setting
the Time Constant for the Timer-Latch Type Short Prevention
Circuit.”
14
SCP*2
—
Open collector type output pin for emitter connected to GND.
Output current may be up to 50 mA.
15
16
OUT3
O
I
Used to set OUT3 pin dead time. VREF voltage is divided by an
external resistor and applied to set dead time. Also, a capacitor
may be connected between this pin and the GND pin to perform
soft start operations.
DTC3*1
Error amplifier 3 output pin: connect resistor and capacitor
between this pin and the –IN3 pin to set gain and adjust
frequency characteristics.
17
18
19
20
FB3
–IN3
CTL
VCC
O
I
Error amplifier 3 inverting input pin.
Power supply control pin: low level places the IC in standby
mode and reduces power consumption to 10 µA or lower. Input
level may be driven by TTL or CMOS.
I
—
Power supply pin: voltage range is 3.6 V to 18 V.
*1: DTC = Dead Time Control
*2: SCP = Short Circuit Protection
3
MB3782
■ BLOCK DIAGRAM
RT
CT
VREF
V
CC
CLT
3
2
1
20
19
1.25 V
2.5 V
Reference
voltage
source
Power on/off
control
Triangular wave
oscillator
9
GND
circuit
Error Amp 1
PWM Comp.1
Ch.1
+
-
4
+ IN1
8
OUT1
+
+
-
- IN1
5
FB1
6
7
DTC1
Error Amp 2
PWM Comp.2
Ch.2
-
13
- IN2
10
OUT2
+
+
-
+
1.25 V
12
11
FB2
DTC2
Error Amp 3
-
PWM Comp.3
Ch.3
- IN3 18
15
OUT3
+
+
-
+
1.25 V
17
FB3
16
DTC3
SCP Comp.
-
-
-
+
2.1 V
VREF
1 µA
14
SCP
S
R
Latch
U.V.L.O.
4
MB3782
■ FUNCTIONAL DESCRIPTIONS
1. Reference Voltage Source
The reference voltage source uses the voltage provided at the VCC pin (pin 20) to generate a temperature-
compensated reference voltage (≅ 2.50 V), which is used as the operating power supply for the internal circuits
of the IC. The reference voltage source can be output through the VREF pin (pin 1).
2. Triangular Wave Oscillator
By connecting a timing capacitor and resistor respectively to the CT pin (pin 2) and RT pin (pin 3), the oscillator
can provide a triangular waveform at any desired frequency.
The waveform has an amplitude of 1.3 V to 1.9 V, and can be connected to the non-inverting input of the on-
chip PWM comparator and also output through the CT pin (pin 2).
3. Error Amps
The error amps are amplifiers that detect the output voltage of the switching regulator and send the PWM control
signal. The common-mode input voltage range is 1.05 V to 1.45 V, so that the voltage applied to the non-inverting
input pin as a reference voltage should be either the voltage obtained by dividing the IC reference voltage output
(recommended value: VREF/2) or the voltage obtained from the RT pin (pin 3) (1.25 V). The non-inverting input
for the error amps 1 and 2 is internally connected to VREF/2 voltage.
Also, a feedback transistor and capacitor can be connected between the error amp output pin and inverting input
pin to provide any desired level of loop gain, enabling stable phase compensation.
4. Timer Latch (S-R Latch) Type Short Prevention Circuit
The timer-latch type short prevention circuit detects the output levels from each of the error amps. Whenever
one or more error amps produces an output level of 2.1 V or higher, the timer circuit is activated starting the
charging of the external protection enabler capacitor.
If the error amp output voltage does not return to normal range before the voltage in this capacitor reaches the
transistor’s base-emitter junction voltage (VBE (≅ 0.65 V)), the latch circuit will operate to turn the output transistor
off and at the same time set the dead time to 100%.
Once the prevention circuit is activated, the power must be switched on again to resume normal operation.
5. Low Input Voltage Fault Prevention Circuit (Under Voltage Lock-Out (UVLO) function)
When power is switched on, excess power or momentary drops in power line current can cause operating faults
in the controller IC, which can in turn lead to damage or deterioration in systems.
The low input voltage fault prevention circuit detects the internal reference voltage level with respect to the power
supply voltage level and acts to reset the latch circuit, thereby turning the output transistor off and at the same
time setting the dead time to 100% and holding the SCP pin (pin 14) at “low.” Operation returns to normal when
the power supply voltage reaches or exceeds the UVLO threshold voltage level.
6. PWM Comparator
The PWM comparator is a voltage comparator with one inverting and two non-inverting inputs, which acts as a
voltage to pulse width converter controlling the on-time of the output pulse according to the input voltage level.
When the triangular waveform produced by the oscillator is lower than either the error amp output or the DTC
pin voltage, the output transistor is switched on.
It is also possible to use the DTC terminal to provide a soft start function.
7. Output Transistor
The output is open-collector type, with the emitter of the output transistor connected to the GND pin. The power
transistor for external switching can carry a base current of up to 50 mA.
8. Power Supply Control
Power supply on/off control is enabled through the CTL pin (pin 19). (In standby mode, power supply current is
10 µA or less.)
5
MB3782
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Condition
Unit
Min
—
Max
20
Power supply voltage
Error amp input voltage
Dead time control input voltage
Control input voltage
VCC
VIN
—
V
V
—
–0.3
–0.3
–0.3
—
+10
+2.8
+20
20
Vdt
—
V
VCTL
VOUT
IOUT
PD*1
Ta
—
V
Collector output voltage
Collector output current
Allowable loss
—
V
—
—
75
mA
mW
°C
°C
—
740*2
+85
+125
Ta ≤ +25°C SOP Version
Operating ambient temperature
Storage temperature
—
—
–30
–55
Tstg
*1: For operation in conditions where Ta > +25°C, and the SOP version should be derated by 7.4 mW/°C.
*2: When mounted on a 4 cm-square dual-sided epoxy board.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Symbol
Condition
Unit
Min
3.6
1.05
0
Typ
6.0
—
Max
18.0
1.45
18
Power supply voltage
VCC
VIN
—
—
—
—
—
—
—
—
—
—
V
V
Error amp input voltage
Control input voltage
VCTL
VOUT
IOUT
IREF
CT
—
V
Collector output voltage
Collector output current
Reference voltage output current
Timing capacitance
—
—
18
V
0.3
–3
—
50
mA
mA
pF
kΩ
kHz
°C
–1
—
0
150
5.1
1
15000
100
500
+85
Timing resistance
RT
—
Oscillator frequency
fOSC
Ta
—
Operating ambient temperature
–30
+25
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
6
MB3782
■ ELECTRICAL CHARACTERISTICS
(VCC = 6 V, Ta= +25°C)
Value
Unit
Parameter
Output voltage
Symbol
Conditions
IOR = –1 mA
Min
Typ
Max
VREF
2.45
2.50
2.55
V
Output voltage
temperature variation
VRTC
Ta = –30°C to +85°C
–2
±0.2
+2
%
Input stability
Line
Load
IOS
VCC = 3.6 V to 18 V
IOR = –0.1 mA to –1 mA
VREF = 2 V
—
—
2
10
7.5
–3
—
mV
mV
mA
V
Load stability
1
Short output current
–30
—
–10
2.72
2.60
120
VtH
IOR = –0.1 mA
Threshold voltage
Hysteresis width
VtL
IOR = –0.1 mA
—
—
V
VHYS
IOR = –0.1 mA
80
—
mV
Reset voltage (VCC)
VR
—
1.5
1.9
—
V
Input threshold voltage
Input standby voltage
Input latch voltage
VtPC
VSTB
VIN
—
No pull-up
No pull-up
—
0.60
—
0.65
50
0.70
100
100
–0.6
V
mV
mV
µA
—
50
Input source current
Ibpc
–1.4
–1.0
Comparator threshold
voltage
VtC
Pin 6, pin 12, pin 17
—
2.1
—
V
Oscillator frequency
fOSC
fdev
fdV
CT = 330 pF, RT = 15 kΩ
CT = 330 pF, RT = 15 kΩ
VCC = 3.6 V to 18 V
160
—
200
±5
240
—
kHz
%
Frequency deviation
Frequency deviation (VCC)
—
±1
—
%
Frequency deviation (Ta)
Input threshold voltage
fdT
Ta = –30°C to +85°C
–4
—
+4
%
Vt0
Vt100
Dtr
Duty cycle = 0 %
Duty cycle = 100 %
Vdt = VR/1.45 V
—
1.05
—
1.3
1.9
65
—
2.25
75
V
V
ON duty cycle
55
%
µA
µA
V
Input bias current
Latch mode sink current
Latch input voltage
Ibdt
Idt
—
0.2
500
—
1
Vdt = 2.5 V
150
—
—
Vdt
Idt = 100 µA
0.3
(Continued)
7
MB3782
(Continued)
(VCC = 6 V, Ta= +25°C)
Value
Unit
Parameter
Symbol
Conditions
Min
–6
Typ
Max
Input offset voltage
Input offset current
Input bias current
VIO
IIO
IB
VOUT = 1.6 V
—
+6
mV
nA
nA
VOUT = 1.6 V
VOUT = 1.6 V
–100
—
+100
—
–500 –100
Common mode input
voltage range
VICR
VCC = 3.6 V to 18 V
1.05
—
1.45
V
Voltage gain
Av
—
70
—
80
—
—
dB
Frequency bandwidth
BW
Av = 0 dB
0.8
MHz
Common mode rejection
ratio
CMRR
VOM+
—
—
60
80
—
—
—
dB
V
VREF
–0.3
Maximum output voltage
range
VOM-
IOM+
IOM-
Vt0
—
VOUT = 1.6 V
VOUT = 1.6 V
Duty cycle = 0 %
Duty cycle = 100 %
Pin 6, pin 12, pin 17
Pin 6, pin 12, pin 17
—
—
—
0.7
1.0
–60
1.3
1.9
1.0
–60
—
0.9
—
V
mA
µA
V
Output sink current
Output source current
—
—
1.05
—
—
Input threshold voltage
Vt100
IIN+
2.25
—
V
Input sink current
—
mA
µA
V
Input source current
Input OFF conditions
Input ON conditions
Control pin current
Output leak current
IIN-
—
—
VOFF
VON
ICTL
—
0.7
—
—
2.1
—
—
V
VCTL = 10 V
200
—
400
10
µA
µA
Leak
VOUT = 18 V
—
Output saturation voltage
Standby current
VSAT
ICCS
ICCa
IOUT = 50 mA
—
—
—
1.1
—
1.4
10
V
VCTL = 0 V
µA
mA
Average feed current
VCTL = VCC, no output load
2.1
3.2
Notes : • Voltage control on channel 1 may be positive or negative.
• The non-inverting input to the error amps on channel 2 and channel 3 is internally connected to VREF/2,
and therefore voltage control is positive only.
• VREF/2 output can be obtained from the RT pin.
8
MB3782
■ SETTING THE TIME CONSTANT FOR THE TIMER-LATCH TYPE SHORT PREVENTION
CIRCUIT
Figure 1 shows the configuration of the protection latch circuit.
The output lines from the error amps are each connected to the inverting input lines of the short protection
comparator, which constantly compares them with the reference voltage of approximately 2.1 V connected to
the non-inverting input.
When load conditions in the switching regulator are stabilized, there is no variation in the output from the error
amps, and therefore the short prevention controls are held in equilibrium. In this situation, voltage at the SCP
pin (pin 14) is held at approximately 50 mV.
When load conditions change rapidly, as in the case of a load short, high potential signal (greater than 2.1V)
fromthe erroramps isinput totheinvertingsignalinputoftheshortprotection comparator, andtheshort protection
comparator outputs a “low” level signal. The transistor Q1 is consequently switched off, so that short protection
capacitor CPE externally connected to the SCP pin voltage is then charged according to the following formulas.
VPE = 50 mV + tPE × 10–6/CPE
0.65 = 50 mV + tPE × 10–6/CPE
CPE = tPE/0.6 (µF)
When the short protection capacitor is charged to a level of approximately 0.65 V, the SR latch is set and the
low input voltage fault prevention circuit is enabled, turning the output drive transistor off. At the same time, the
dead time isset to 100% and the SCP pin (pin 14) is held “low.” This closes the S-R latch input and then discharges
the capacitor CPE
2.50 V
1 µA
S.C.P.Comp.
Out
14
PWM
Comp.
-
-
Error Amp 1
Error Amp 2
Error Amp 3
S
R
CPE
-
U.V.L.O.
Latch
+
Q1
Q3
2.1 V
Figure 1 Protection Latch Circuit
9
MB3782
■ SETTING OUTPUT VOLTAGE
The following diagrams show the connections used to set the output voltage.
Because the power supply to the error amps is provided by the same reference voltage circuit used for the other
internal circuits, the common-mode input voltage range is set at 1.05 V to 1.45 V.
The reference voltage input to the +IN and -IN pins should be set at 1.25 V (VREF/2). The method of connection
for channel 1 is different from channel 2 and channel 3. In addition, channel 1 is capable of picking up both
positive and negative voltages, while channel 2 and channel 3 can pick up only positive output voltages.
VREF
VREF
+
+ =
V0
× (R1 + R2)
V0
2R2
R
R1
+
−
pin 6
R
R2
RNF
Figure 2 Error amp (channel 1) connection: Output voltage VO positive
VREF
VREF
× (R1 + R2) + VREF
− =
−
V0
2×R2
R
R1
+
pin 6
−
R
R2
RNF
−
V0
Figure 3 Error amp (channel 1) connection: Output voltage VO positive
10
MB3782
1.25
R2
+
+ =
× (R1 + R2)
V0
V0
R1
+
pin 12,17
−
R2
RNF
1.25 V
Figure 4 Error amp (channel 2, channel 3) connection
The non-inverting input to the error amps on channel 2 and channel 3 is internally connected to VREF/2, and
therefore cannot be configured for inverting output.
ch.1
■
ch.2
■
ch.3
■
Step up
Step down
Inverting
■
■
■
■
×
×
11
MB3782
■ USING THE RT PIN
The triangular waves, as shown in Figure 5, act to set the oscillator frequency by charging and discharging the
capacitor connected to the CT pin using the current value of the resistor connected to the RT pin.
In addition, when voltage level VREF/2 is output to external circuits from the RT pin, care must be taken in making
the external circuit connections to adjust for the fact that I1 is increased by the value of the current I2 to the
external circuits in determining the oscillator frequency (see Figure 6).
ICT = IRT
Triangular wave oscillator
VREF
=
2RT
VREF
2
2
1
IRT
RT
ICT
CT
Figure 5 No VREF/2 connection to external circuits from RT pin
ICT = IRT
Triangular wave generator
= I1 + I2
VREF
2RT
=
+ I2
VREF
2
2
1
IRT
I1
ICT
To external circuits
IRT
CT
RT
Figure 6 VREF/2 connection to external circuits from RT pin
12
MB3782
■ TREATMENT OF UNUSED ERROR AMPS
Any error amps that are not used should be handled as follows.
Note that failure to apply proper treatment to error amps will cause the SCP circuit to activate and disable the
switching regulator output.
1. Error Amp (channel 1) Not In Use
1
VREF
3
RT
4
5
+ IN1
– IN1
7
9
DTC1
GND
Note: Pin 6 and pin 8 shoud be left open.
2. Error Amp (channel 2) Not In Use
1
VREF
13
11
– IN2
GND
DTC2
9
Note: Pin 10 and pin 12 shoud be left open.
3. Error Amp (channel 3) Not In Use
1
VREF
– IN3
DTC3
18
16
9
GND
Note: Pin 15 and pin 17 shoud be left open.
13
MB3782
■ TREATMENT OF UNUSED SCP PIN
When the timer latch short protection circuit is not used, the SCP pin (pin 14) should be connected to the GND
by the shortest possible path.
SCP
14
14
MB3782
■ TEST CIRCUIT
OUTPUT
4.7 kΩ
OUTPUT
4.7 kΩ
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
330 pF
CTL
150 kΩ
4.7 kΩ
TEST
INPUT
TEST
INPUT
OUTPUT
CPF
TEST
INPUT
15
MB3782
■ TIMING CHART (INTERMAL WAVEFORMS)
CT pin wavefoms
Short protection
comparator reference input
2.1 V
1.9 V
1.6 V
1.3 V
Dead time,PWM input voltage
Error amp output
"High"
PWM comparator output
"Low"
Dead time 100 %
"High"
Output transistor-collector
waveforms
"Low"
0.6 V
SCP pin waveforms
0 V
tPE
"High"
Short protection comparator output
"Low"
Power ON
Power OFF
2.1 V
Control pin voltage (VCTL: minimum value)
0 V
3.6V
Power supply voltage (VCC: minimum)
0V
6
Protection enable time tPE 0.6 × 10 × CPE (µs)
16
MB3782
■ EXAMPLE OF APPLICATION
16 kΩ
5.6 kΩ
9.1 kΩ
1 µF
1.8 kΩ
10 kΩ
4.7kΩ
10 kΩ
1 µF
2.4 kΩ
10 kΩ
1 µF
4.7 kΩ
5.6 µH
V
IN (6V)
CTL
11
16
19
1
7
20
4.7 kΩ
VREF
DTC1
DTC2
DTC3 VCC CTL
4
5
6
+IN1
−IN1
FB1
V −
O
330 Ω
330 Ω
(−5V)
120 µH
4.7 kΩ
1.8 kΩ
8
OUT1
0.033 µF
150 k
Ω
120 µH
220 µF
V +
O
+
330 Ω
330 Ω
(+5V)
−
10
OUT2
13
12
−IN2
0.033 µF
0.033 µF
150 k
150 k
Ω
Ω
120 µH
FB2
MB3782
+
V
O
1.8 kΩ
+
(+12V)
220 µF
−
18
−IN3
3.9 kΩ 100 Ω
17
FB3
15
820 pF
OUT3
GND
2
CT
8.2 kΩ
9
3
RT
0.1 µF
14
SCP
17
MB3782
■ TYPICAL CHARACTERISTICS CURVES
Reference voltage vs. Power supply voltage
Average feed current vs. Power supply voltage
Ta = +25˚C
5.0
3.0
Ta = +25˚C
2.5
1.5
0
0
0
0
4
8
12
16
20
4
8
12
16
20
Power supply voltage VCC (V)
Power supply voltage VCC (V)
Reference voltage vs. Operating ambient temperature
2.51
2.50
2.49
2.48
2.47
2.46
Triangular wave maximum amplitude voltage vs. Timing capacitance
2.2
V
CC = VCTL = 6 V
= -1 mA
I
OR
VCC = 6 V
R = 15 kΩ
Ta = +25˚C
T
2.0
1.8
1.6
1.4
1.2
1.0
0.8
2.45
2
10
3
4
10
-
40
-
20
0
+ 20 + 40 + 60 + 80 + 100
10
Timing capacitance C
Operating ambient temperature Ta (˚C)
T
(pF)
Collector saturation voltage vs. Sink current
2.0
VCC = 6 V
Ta = +25˚C
Error amp maximum output voltage amplitude vs. Frequency
1.5
3.0
2.0
1.0
0
V
CC = 6 V
Ta = +25˚C
1.0
0.5
0
100
500 1 k
5 k 10 k
50 k 100 k
500 k
0
10
20
30
40
50
Fequency f (Hz)
Sink current IOL (mA)
(Continued)
18
MB3782
Oscillator frequency vs. Timing resistance
V
CC = 6 V
Ta = +25˚C
Triangular wave period vs. Timing capacitance
100
10
V
R
CC = 6 V
T
= 15 kΩ
1 M
Ta = +25˚C
100 k
10 k
C = 150 pF
T
CT
= 1500 pF
1
2
10
3
10
4
10
5
10
CT
= 15000 pF
Timing capacitance C
T
(pF)
1 k
1 k
5 k 10 k 50 k
100 k
500 k
Timing resistance R
T
(
Ω
)
Frequency variation vs. Operating ambient temperature
ON duty cycle vs. Oscillator frequency
10
0
100
80
V
C
R
CC = 6 V
V
C
R
CC = 6 V
T
T
= 1330 pF
= 15 kΩ
T
= 330 pF
T
= 15 kΩ
Ta = +25˚C
60
40
20
0
-10
5 k 10 k
50 k 100 k
500 k 1 M
-
40
-20
0
+20 +40 +60 +80 +100 +120
Oscillator frequency (Hz)
Operating ambient temperature Ta (˚C)
Reference voltage vs. Control input voltage
Control input current vs. Control input voltage
V
C
CC = 6 V
VCC = 6 V
CT = +25˚C
5.0
2.5
0
500
250
T
= +25˚C
0
0
4
8
12
16
20
0
1
2
3
4
5
Control input voltage VCTL (V)
Control input voltage VCTL (V)
(Continued)
19
MB3782
Voltage gain and phase vs. Frequenncy
CNF = open
Voltage gain and phase vs. Frequenncy
CNF = 0.047 pF
40
20
180
90
40
20
180
90
AV
AV
0
0
0
0
φ
φ
-20
-40
-90
-180
-20
-40
-90
-180
10
100
1 k
10 k
100 k
1 M
10
100
1 k
10 k
100 k
1 M
Frequenncy f (Hz)
Frequenncy f (Hz)
Voltage gain and phase vs. Frequenncy
CNF = 470 pF
Voltage gain and phase vs. Frequenncy
CNF = 4700 pF
40
20
180
90
40
20
180
90
AV
AV
0
0
0
0
φ
φ
-20
-40
-90
-180
-20
-40
-90
-180
10
100
1 k
10 k
100 k
1 M
10
100
1 k
10 k
100 k
1 M
Frequenncy f (Hz)
Test Circuit
Frequenncy f (Hz)
VREF
VREF
CNF
4.7 kΩ 4.7 kΩ
240 kΩ
4
5
-
10 µF
-
OUT
6
+
+
IN
4.7 kΩ 4.7 kΩ
Error amp
(Continued)
20
MB3782
(Continued)
Allowable loss vs. Operating ambient temperature
1200
1110
1000
800
740
SOP version
600
400
200
0
-30 -20 -10
+85
0
+10 +20 +30 +40 +50 +60 +70 +80
Operating ambient temperature Ta (˚C)
21
MB3782
■ CONCERNING EQUIVALENT SERIES RESISTANCE AND STABILITY OF SMOOTHING
CAPACITORS
In DC/DC converters, the equivalent series resistance value (ESR) of smoothing capacitors has a major influence
on loop phase characteristics.
The ESR is a means by which phase characteristics approximate phase relationships to ideal capacitors in high-
frequencybands(seeGraph1), thusimproving system stability. Atthesametime, theuseofsmoothingcapacitors
with low ESR reduces system stability, so that care must be taken when using semiconductor electrolytic ca-
pacitors (OS-CONTM*) or tantalum capacitors with low ESR.
* : OS-CON is a trademark of Sanyo Electric Co., Ltd.
L
Tr
Rc
VIN
D
RL
C
Figure 7 Basic circuit for step-down voltage DC/DC converter
Phase vs. frequency
Gain vs. frequency
0
20
0
2
− 90
− 20
− 40
− 60
2
: Rc = 0 Ω
1
2
1
: Rc = 0 Ω
1
: Rc = 31 mΩ
1
− 180
2 : Rc = 31 mΩ
10
100
1 k
Frequency f (Hz)
10 k
100 k
10
100
1 k
10 k
100 k
Frequency f (Hz)
Graph 1 Gain and phase vs. frequency
22
MB3782
• Reference data
Changing the smoothing capacitor from an aluminum electrolytic capacitor (RC ≅ 1.0Ω) to a lower-ESR semi-
conductor electrolytic capacitor (OS-CONTM: RC ≅ 0.2 Ω) decreases the phase margin (see Graphs 2, 3).
V out
+
V0
CNF
AV and phase characteristics
measured between these points
– IN
–
VIN
FB
+ IN
R1
R2
+
VREF/2
Error amp
Figure 8 Measurement of DC/DC Capacitor AV and Phase (φ) Characteristics
DC/DC converter + 5 V output Gain and Phase vs. Frequency
Graph 2
60
Vcc = 10 V
RL = 25 Ω
40
20
0
180
90
0
Cp = 0.1 µF
Av
+
V0
φ
Aluminum electrolytic
capacitor
220 µF (16 V)
RC 1.0 Ω
+
−
62°
: fosc = 1 kHz
− 20
− 40
− 90
− 180
100 k
10
100
1 k
Frequency f (Hz)
10 k
Graph 3
DC/DC converter + 5 V output Gain and Phase vs. Frequency
Vcc = 10 V
60
Av
RL = 25 Ω
180
90
0
40
20
0
Cp = 0.1 µF
OS-CONTM
22 µF (16 V)
RC 0.2 Ω
+
−
φ
27°
: fosc = 1 kHz
− 90
− 20
− 40
− 180
100
1 k
10 k
100 k
10
Frequency f (Hz)
23
MB3782
■ NOTES ON USE
• Take account of common impedance when designing the earth line on a printed wiring board.
• Take measures against static electricity.
- For semiconductors, use antistatic or conductive containers.
- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.
- The work table, tools and measuring instruments must be grounded.
- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.
• Do not apply a negative voltage
- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in
malfunction.
■ ORDERING INFORMATION
Part number
MB3782PF-■■■
MB3782PF-■■■E1
Package
Remarks
20 pin plastic SOP
(FPT-20P-M01)
Conventional version
20 pin plastic SOP
(FPT-20P-M01)
Lead Free version
■ RoHS Compliance Information of Lead (Pb) Free version
The LSI products of Fujitsu Microelectronics with “E1” are compliant with RoHS Directive , and has observed
the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybro-
minated diphenyl ethers (PBDE) .
The product that conforms to this standard is added “E1” at the end of the part number.
■ MARKING FORMAT (Lead Free version)
MB3782
XXXX XXX
E1
SOP-20
INDEX
Lead Free version
24
MB3782
■ LABELING SAMPLE (Lead free version)
Lead free mark
JEITA logo JEDEC logo
MB123456P - 789 - GE1
(3N) 1MB123456P-789-GE1 1000
G
Pb
(3N)2 1561190005 107210
QC PASS
PCS
1,000
MB123456P - 789 - GE1
ASSEMBLED IN JAPAN
2006/03/01
MB123456P - 789 - GE1
1/1
1561190005
0605 - Z01A 1000
Lead Free version
25
MB3782
■ MB3782PF-■■■E1 RECOMMENDEDCONDITIONSOF MOISTURESENSITIVITYLEVEL
Item
Condition
IR (infrared reflow) , Manual soldering (partial heating method)
2 times
Mounting Method
Mounting times
Please use it within two years after
Before opening
Manufacture.
From opening to the 2nd
Less than 8 days
reflow
Storage period
When the storage period after
opening was exceeded
Please processes within 8 days
after baking (125 °C, 24H)
Storage conditions
5 °C to 30 °C, 70%RH or less (the lowest possible humidity)
[Temperature Profile for FJ Standard IR Reflow]
(1) IR (infrared reflow)
H rank : 260 °C Max
260 °C
255 °C
170 °C
to
190 °C
(b)
(c)
(d)
(e)
RT
(a)
(d')
(a) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s
(c) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(d) Actual heating
(d’)
: Temperature 260 °C Max; 255 °C or more, 10s or less
: Temperature 230 °C or more, 40s or less
or
Temperature 225 °C or more, 60s or less
or
Temperature 220 °C or more, 80s or less
(e) Cooling
: Natural cooling or forced cooling
Note : Temperature : the top of the package body
(2) Manual soldering (partial heating method)
Conditions : Temperature 400 °C Max
Times
: 5 s max/pin
26
MB3782
■ PACKAGE DIMENSION
20-pin plastic SOP
Lead pitch
1.27 mm
Package width
package length
×
5.3 × 12.7 mm
Gullwing
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
2.25 mm MAX
0.28 g
Code
(Reference)
P-SOP20-5.3×12.7-1.27
(FPT-20P-M01)
20-pin plastic SOP
(FPT-20P-M01)
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
0.17 +–00..0043
*112.70 +–00..2205 .500 –+..000180
.007 +–..000021
20
11
*2 5.30±0.30 7.80±0.40
(.209±.012) (.307±.016)
INDEX
Details of "A" part
2.00 +–00..1255
(Mounting height)
.079 +–..000160
0.25(.010)
"A"
1
10
1.27(.050)
0~8˚
0.47±0.08
(.019±.003)
M
0.13(.005)
0.50±0.20
(.020±.008)
0.10 +–00..0150
.004 +–..000024
0.60±0.15
(Stand off)
(.024±.006)
0.10(.004)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2002 FUJITSU LIMITED F20003S-c-7-7
27
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0722, Japan
Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
Asia Pacific
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
FUJITSU MICROELECTRONICS ASIA PTE LTD.
151 Lorong Chuan, #05-08 New Tech Park,
Singapore 556741
Tel: +65-6281-0770 Fax: +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/
Europe
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm.3102, Bund Center, No.222 Yan An Road(E),
Shanghai 200002, China
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen,
Germany
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://www.fmk.fujitsu.com/
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited Strategic Business Development Dept.
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