MB3782_1_技术文档

FUJITSU SEMICONDUCTOR

DATA SHEET

DS04-27205-5E

ASSP Power Supplies

BIPOLAR

Switching Regulator Controller

MB3782

■ DESCRIPTION

The FUJITSU MB3782 is a PWM-type switching regulator controller, designed with open-collector output for

connection to external drive transistors and coils, providing a selection of three types of output voltage: step-up,

step-down or inverting (inverting output is available on one circuit only).

The MB3782 features identical oscillator output waveforms to enable completely synchronous operation and

prevent the occurrence of low-frequency beat between channels.

Also, the MB3782 features low power dissipation (2.1 mA Typ) and a built-in standby mode (10 µA), making

possible the configuration of a wide variety of high-efficiency, stable power supplies, even with the use of battery

power. The MB3782 is an ideal power supply for high-performance portable devices such as video camcorders

and cameras.

■ FEATURES

• Wide voltage range (3.6 V to 18 V)

• Low power dissipation (operating mode: 2.1 mA (Typ), standby mode: 10 µA (Max)

• Wide range of oscillator frequencies, high-frequency capability (1 to 500 kHz)

• On-chip timer-latch type short detection circuit

• On-chip undervoltage lockout circuit

• On-chip 2.50 V reference voltage circuit (1.25 V output available at R^Tpin)

• Dead time adjustment over full duty cycle range

• On-chip standby mode (power on/off function)

■ PACKAGE

Plastic DIP, 20 pin

Plastic SOP, 20 pin

(FPT-20P-M01)

(DIP-20P-M01)

MB3782

■ PIN ASSIGNMENT

TOP VIEW

V^REF

CT

1

2

20

VCC

19

18

17

16

15

14

13

12

11

CTL

RT

3

– IN3

FB3

+ IN1

– IN1

FB1

4

5

DTC3

OUT3

SCP

– IN2

FB2

6

DTC1

PUT1

GND

OUT2

7

8

9

10

DTC2

(DIP-20P-M01)

(FPT-20P-M01)

■ PIN DESCRIPTION

Pin No.

Pin Name

I/O

Description

2.50 V (typ) voltage output: provides load current up to 3 mA,

for use as error amplifier reference input and for dead time

setting.

1

V^REF

O

Oscillator timing capacity connection: should be used in the

capacity range 150 to 15000 pF.

2

3

C^T

—

Oscillator timing resistor connection: should be used in the

resistance range 5.1 to 100 kΩ. This pin can also provide

output at voltage level V^REF/2, for use as error amplifier

reference input.

R^T

—

4

5

+IN1

–IN1

I

Error amplifier 1 non-inverting input pin.

Error amplifier 1 inverting input pin.

Error amplifier 1 output pin: connect resistor and capacitor

between this pin and the –IN1 pin to set gain and adjust

frequency characteristics.

6

7

FB1

O

I

OUT1 dead time setting pin: V^REFvoltage is divided by an

external resistor and applied to set dead time. Also, a capacitor

may be connected between this pin and the GND pin to perform

soft start operations.

DTC1*¹

(Continued)

2

MB3782

(Continued)

Pin No.

Pin Name

I/O

Description

Open collector type output pin with an emitter connected to

GND.

8

VOUT1

O

Output current may be up to 50 mA.

9

GND

—

O

Ground pin

Open collector type output pin with an emitter connected to

GND. Output current may be up to 50 mA.

10

OUT2

Used to set OUT2 pin dead time. V^REFvoltage is divided by an

external resistor and applied to set dead time. Also, a capacitor

may be connected between this pin and the GND pin to perform

soft start operations.

11

DTC2*¹

I

Error amplifier 2 output pin: connect resistor and capacitor

between this pin and the –IN2 pin to set gain and adjust

frequency characteristics.

12

13

FB2

O

I

–IN2

Error amplifier 2 inverting input pin.

Time constant setting capacitor connection for timer-latch

type short prevention circuit: a capacitor should be connected

between this pin and the GND pin. For details, see “■ Setting

the Time Constant for the Timer-Latch Type Short Prevention

Circuit.”

SCP*²

14

—

Open collector type output pin for emitter connected to GND.

Output current may be up to 50 mA.

15

16

OUT3

O

I

Used to set OUT3 pin dead time. V^REFvoltage is divided by an

external resistor and applied to set dead time. Also, a capacitor

may be connected between this pin and the GND pin to perform

soft start operations.

DTC3*¹

Error amplifier 3 output pin: connect resistor and capacitor

between this pin and the –IN3 pin to set gain and adjust

frequency characteristics.

17

18

19

20

FB3

–IN3

CTL

V^CC

O

I

Error amplifier 3 inverting input pin.

Power supply control pin: low level places the IC in standby

mode and reduces power consumption to 10 µA or lower. Input

level may be driven by TTL or CMOS.

I

—

Power supply pin: voltage range is 3.6 to 18 V.

*1: DTC = Dead Time Control

*2: SCP = Short Circuit Protection

3

MB3782

■ BLOCK DIAGRAM

RT

3

CT

2

VREF

1

VCC

20

CLT

19

1.25 V

2.5 V

Reference

Power on/off

control

Triangular wave

oscillator

9

GND

voltage

source

circuit

Error Amp.1

PWM Comp.

Ch.1

+

–

4

+ IN1

– IN1

8

OUT1

+

–

5

FB1

6

7

DTC1

Error Amp.2

PWM Comp.

Ch.2

–

+

13

– IN2

10

OUT2

+

–

1.25 V

12

11

FB2

DTC2

Error Amp.3

–

PWM Comp.

Ch.3

– IN3 ¹⁸

15

OUT3

+

–

+

1.25 V

17

FB3

16

DTC3

SCP Comp.

–

+

2.1 V

V^REF

1 µA

14

SCP

S

R

Latch

U.V.L.O.

4

MB3782

■ FUNCTIONAL DESCRIPTIONS

1. Reference Voltage Source

The reference voltage source uses the voltage provided at the power supply pin (pin 20) to generate a temper-

ature-compensated reference voltage ( 2.50 V), which is used as the operating power supply for the internal

circuits of the IC. The reference voltage source can be output through the V^REFpin (pin 1).

2. Triangular Wave Oscillator

By connecting a timing capacitor and resistor respectively to the C^Tpin (pin 2) and R^Tpin (pin 3), the oscillator

can provide a triangular waveform at any desired frequency.

The waveform has an amplitude of 1.3 V to 1.9 V, and can be connected to the non-inverting input of the on-

chip PWM comparator and also output through the C^Tpin.

3. Error Amps

The error amps are amplifiers that detect the output voltage of the switching regulator and send the PWM control

signal. The common-mode input voltage range is 1.05 V to 1.45 V, so that the voltage applied to the non-inverting

input pin as a reference voltage should be either the voltage obtained by dividing the IC reference voltage output

(recommended value: V^REF/2) or the voltage obtained from the R^Tpin (1.25 V). The non-inverting input for the

error amps 1 and 2 is internally connected to V^REF/2 voltage.

Also, a feedback transistor and capacitor can be connected between the error amp output pin and inverting input

pin to provide any desired level of loop gain, enabling stable phase compensation.

4. Timer Latch (S-R Latch) Type Short Prevention Circuit

The timer-latch type short prevention circuit detects the output levels from each of the error amps. Whenever

one or more error amps produces an output level of 2.1 V or higher, the timer circuit is activated starting the

charging of the external protection enabler capacitor.

If the error amp output voltage does not return to normal range before the voltage in this capacitor reaches the

transistor’s base-emitter junction voltage (V^BE( 0.65 V)), the latch circuit will operate to turn the output transistor

off and at the same time set the dead time to 100%.

Once the prevention circuit is activated, the power must be switched on again to resume normal operation.

5. Low Input Voltage Fault Prevention Circuit (Under Voltage Lock-Out (UVLO) function)

When power is switched on, excess power or momentary drops in power line current can cause operating faults

in the controller IC, which can in turn lead to damage or deterioration in systems.

The low input voltage fault prevention circuit detects the internal reference voltage level with respect to the power

supply voltage level and acts to reset the latch circuit, thereby turning the output transistor off and at the same

time setting the dead time to 100% and holding the SCP pin (pin 14) at “low.” Operation returns to normal when

the power supply voltage reaches or exceeds the UVLO threshold voltage level.

6. PWM Comparator

The PWM comparator is a voltage comparator with one inverting and two non-inverting inputs, which acts as a

voltage to pulse width converter controlling the on-time of the output pulse according to the input voltage level.

When the triangular waveform produced by the oscillator is lower than either the error amp output or the DTC

pin voltage, the output transistor is switched on.

It is also possible to use the DTC terminal to provide a soft start function.

7. Output Transistor

The output is open-collector type, with the emitter of the output transistor connected to the GND pin. The power

transistor for external switching can carry a base current of up to 50 mA.

8. Power Supply Control

Power supply on/off control is enabled through the CTL pin (pin 19). (In standby mode, power supply current is

10 µA or less.)

5

MB3782

■ SETTING THE TIME CONSTANT FOR THE TIMER-LATCH TYPE SHORT PREVENTION

CIRCUIT

Figure 1 shows the configuration of the protection latch circuit.

The output lines from the error amps are each connected to the inverting input lines of the short protection

comparator, which constantly compares them with the reference voltage of approximately 2.1 V connected to

the non-inverting input.

When load conditions in the switching regulator are stabilized, there is no variation in the output from the error

amps, and therefore the short prevention controls are held in equilibrium. In this situation, voltage at the SCP

pin (pin 14) is held at approximately 50 mV.

When load conditions change rapidly, as in the case of a load short, high potential signal (greater than 2.1V)

fromtheerrorampsisinputtotheinvertingsignalinputoftheshortprotectioncomparator, andtheshortprotection

comparator outputs a “low” level signal. The transistor Q1 is consequently switched off, so that short protection

capacitor C^PEexternally connected to the SCP pin voltage is then charged according to the following formulas.

V^PE= 50 mV + t^PE× 10^–6/C^PE

0.65 = 50 mV + t^PE× 10^–6/C^PE

C^PE= t^PE/0.6 (µF)

When the short protection capacitor is charged to a level of approximately 0.65 V, the SR latch is set and the

low input voltage fault prevention circuit is enabled, turning the output drive transistor off. At the same time, the

dead time is set to 100% and the SCP pin (pin 14) is held “low.” This closes the S-R latch input and then

discharges the capacitor C^PE

2.50 V

1 µA

S.C.P.Comp.

Out

14

PWM

Comp.

–

+

Error Amp.1

Error Amp.2

Error Amp.3

S

R

C^PE

U.V.L.O.

Latch

Q1

Q3

2.1 V

Figure 1 Protection Latch Circuit

6

MB3782

■ SETTING OUTPUT VOLTAGE

The following diagrams show the connections used to set the output voltage.

Because the power supply to the error amps is provided by the same reference voltage circuit used for the other

internal circuits, the common-mode input voltage range is set at 1.05 V to 1.45 V.

The reference voltage input to the +IN and -IN pins should be set at 1.25 V (V^REF/2). The method of connection

for channel 1 is different from channel 2 and channel 3. In addition, channel 1 is capable of picking up both

positive and negative voltages, while channel 2 and channel 3 can pick up only positive output voltages.

V^REF

VREF

+

+ =

V0

· (R1 + R2)

V0

2·R²

R

R¹

+

–

pin 6

R

R2

RNF

Figure 2 Error amp (channel 1) connection: Output voltage V^Opositive

V^REF

VREF

– = –

· (R1 + R2) + VREF

V0

2·R²

R

R¹

+

–

pin 6

R

R2

RNF

–

V0

Figure 3 Error amp (channel 1) connection: Output voltage V^Opositive

7

MB3782

1.25

R²

+

+ =

· (R1 + R2)

V0

R¹

+

–

pin 12,17

R2

RNF

1.25 V

Figure 4 Error amp (channel 2, channel 3) connection

The non-inverting input to the error amps on channel 2 and channel 3 is internally connected to V^REF/2, and

therefore cannot be configured for inverting output.

ch-1

●

ch-2

●

ch-3

●

Step up

Step down

Inverting

●

×

8

MB3782

■ USING THE RT PIN

The triangular waves, as shown in Figure 5, act to set the oscillator frequency by charging and discharging the

capacitor connected to the C^Tpin using the current value of the resistor connected to the R^Tpin.

In addition, when voltage level V^REF/2 is output to external circuits from the R^Tpin, care must be taken in making

the external circuit connections to adjust for the fact that I¹is increased by the value of the current I²to the

external circuits in determining the oscillator frequency (see Figure 6).

ICT = IRT

Triangular wave oscillator

VREF

=

2RT

V^REF

2

1

IRT

RT

ICT

CT

Figure 5 No V^REF/2 connection to external circuits from R^Tpin

ICT = IRT

Triangular wave generator

= I1 + I2

VREF

2RT

=

+ I2

V^REF

2

1

IRT

I1

ICT

To external circuits

IRT

CT

RT

Figure 6 V^REF/2 connection to external circuits from R^Tpin

9

MB3782

■ TREATMENT OF UNUSED ERROR AMPS

Any error amps that are not used should be handled as follows.

Note that failure to apply proper treatment to error amps will cause the SCP circuit to activate and disable the

switching regulator output.

1. Error Amp (channel 1) Not In Use

1

V^REF

3

R^T

4

5

+ IN1

– IN1

7

9

DTC1

GND

Note: Pin 6 and pin 8 shoud be left open.

2. Error Amp (channel 2) Not In Use

1

V^REF

13

11

– IN2

GND

DTC2

9

Note: Pin 10 and pin 12 shoud be left open.

3. Error Amp (channel 3) Not In Use

1

V^REF

– IN3

DTC3

18

16

9

GND

Note: Pin 15 and pin 17 shoud be left open.

10

MB3782

■ TREATMENT OF UNUSED SCP PIN

When the timer latch short protection circuit is not used, the SCP pin should be connected to the GND by the

shortest possible path.

SCP

14

11

MB3782

■ ABSOLUTE MAXIMUM RATINGS

(Ta = +25°C)

Rating

Parameter

Symbol

Condition

Unit

Min

—

Max

20

Power supply voltage

V^CC

V^IN

—

V

Error amp input voltage

Dead time control input voltage

Control input voltage

–0.3

—

+10

+2.8

+20

20

V^dt

V

V^CTL

V^OUT

I^OUT

V

Collector output voltage

Collector output current

V

—

75

mA

740*²

1110

+85

+125

SOP Version

DIP Version

—

Allowable loss

P^D*¹

Ta ≤ +25°C

mW

—

Operating temperature

Storage temperature

Top

—

–30

–55

°C

Tstg

*1: For operation in conditions where Ta > +25°C, the SOP version should be derated by 7.4 mW/°C, and the DIP

version should be derated by 11.1 mW/°C.

*2: When mounted on a 4 cm-square dual-sided epoxy board.

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

■ RECOMMENDED OPERATING CONDITIONS

Value

Parameter

Symbol

Condition

Unit

Min

3.6

1.05

0

Typ

6.0

—

Max

18.0

1.45

18

Power supply voltage

Error amp input voltage

Control input voltage

Collector output voltage

Collector output current

Reference voltage output current

Timing capacitance

V^CC

V^IN

—

V

V^CTL

V^OUT

I^OUT

I^REF

C^T

—

V

—

18

V

0.3

–3

—

50

mA

pF

kΩ

kHz

°C

–1

—

0

150

5.1

1

15000

100

500

85

Timing resistance

R^T

—

Oscillator frequency

f^OSC

Top

—

Operating temperature

–30

+25

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

FUJITSU representatives beforehand.

12

MB3782

■ ELECTRICAL CHARACTERISTICS

(VCC = 6 V, Ta = +25°C)

Value

Unit

Parameter

Output voltage

Symbol

Conditions

I^OR= –1 mA

Min

Typ

Max

V^REF

V^RTC

2.45

2.50

2.55

V

Output voltage

temperature variation

Ta = –30°C to +85°C

–2

±0.2

2

%

Input stability

Line

Load

I^OS

V^CC= 3.6 V to 18 V

I^OR= –0.1 mA to –1 mA

V^REF= 2 V

—

2

10

7.5

–3

—

mV

mA

V

Load stability

1

Short output current

–30

—

–10

2.72

2.60

120

V^tH

I^OR= –0.1 mA

Threshold voltage

Hysteresis width

V^tL

I^OR= –0.1 mA

—

V

V^HYS

I^OR= –0.1 mA

80

—

mV

Reset voltage (V^CC)

V^R

—

1.5

1.9

—

V

Input threshold voltage

Input standby voltage

Input latch voltage

V^tPC

V^STB

V^IN

—

No pull-up

—

0.60

—

0.65

50

0.70

100

–0.6

V

mV

µA

—

50

Input source current

I^bpc

–1.4

–1.0

Comparator threshold

voltage

V^tC

Pin 6, pin 12, pin 17

—

2.1

—

V

Oscillator frequency

f^OSC

f^dev

f^dV

C^T= 330 pF, RT = 15 kΩ

V^CC= 3.6 V to 18 V

160

—

200

±5

240

—

kHz

%

Frequency deviation

Frequency deviation (V^CC)

—

±1

—

%

Frequency deviation (Ta)

Input threshold voltage

f^dT

Ta = –30°C to +85°C

–4

—

+4

%

V^t0

V^t100

D^tr

Duty cycle = 0 %

Duty cycle = 100 %

V^dt= V^R/1.45 V

—

1.05

—

1.3

1.9

65

—

2.25

75

V

ON duty cycle

55

%

µA

V

Input bias current

Latch mode sink current

Latch input voltage

I^bdt

I^dt

—

0.2

500

—

1

V^dt= 2.5 V

150

—

V^dt

I^dt= 100 µA

0.3

(Continued)

13

MB3782

(Continued)

(VCC = 6 V, Ta = +25°C)

Value

Unit

Parameter

Symbol

Conditions

V^OUT= 1.6 V

Min

–6

Typ

Max

Input offset voltage

Input offset current

Input bias current

V^IO

I^IO

I^B

—

6

mV

nA

V^OUT= 1.6 V

–100

—

100

—

–500 –100

Common mode input

voltage range

V^ICR

V^CC= 3.6 V to 18 V

1.05

—

1.45

V

Voltage gain

Av

—

70

—

80

—

dB

Frequency bandwidth

BW

Av = 0 dB

0.8

MHz

Common mode rejection

ratio

CMRR

V^OM+

—

60

80

—

dB

V

V^REF

–0.3

Maximum output voltage

range

V^OM-

I^OM+

I^OM-

V^t0

—

V^OUT= 1.6 V

Duty cycle = 0 %

Duty cycle = 100 %

Pin 6, pin 12, pin 17

—

0.7

1.0

–60

1.3

1.9

1.0

–60

—

0.9

—

V

mA

µA

V

Output sink current

Output source current

—

1.05

—

Input threshold voltage

V^t100

I^IN+

2.25

—

V

Input sink current

—

mA

µA

V

Input source current

Input OFF conditions

Input ON conditions

Control pin current

Output leak current

I^IN-

—

V^OFF

V^ON

I^CTL

—

0.7

—

2.1

—

V

V^CTL= 10 V

200

—

400

10

µA

Leak

V^OUT= 18 V

—

Output saturation voltage

Standby current

V^SAT

I^CCS

I^CCa

I^OUT= 50 mA

—

1.1

—

1.4

10

V

V^CTL= 0 V

µA

mA

Average feed current

V^CTL= V^CC, no output load

2.1

3.2

Notes : • Voltage control on channel 1 may be positive or negative.

• The non-inverting input to the error amps on channel 2 and channel 3 is internally connected to V^REF/2,

and therefore voltage control is positive only.

• V^REF/2 output can be obtained from the R^Tpin.

14

MB3782

■ TEST CIRCUIT

OUTPUT

4.7 kΩ

OUTPUT

4.7 kΩ

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

V^CC

330 pF

CTL

150 kΩ

4.7 kΩ

TEST

INPUT

TEST

INPUT

OUTPUT

C^PF

TEST

INPUT

15

MB3782

■ TIMING CHART (INTERMAL WAVEFORMS)

16

MB3782

■ EXAMPLE OF APPLICATION

17

MB3782

■ TYPICAL CHARACTERISTICS CURVES

Power supply voltage vs.reference voltage

Power supply voltage vs.average feed current

Ta = +25˚C

5.0

3.0

Ta = +25˚C

2.5

1.5

0

4

8

12

16

20

4

8

12

16

20

Power supply voltage V^CC(V)

Ambient temperature vs.reference voltage

2.51

2.50

2.49

2.48

2.47

2.46

Timing capacity vs.triangular wave maximum amplitude voltage

2.2

V

CC = VCTL = 6 V

= -1 mA

I

OR

V

CC = 6 V

R = 15 kΩ

Ta = +25˚C

T

2.0

1.8

1.6

1.4

1.2

1.0

0.8

2.45

2

10

3

4

10

-

40

-

20

0

20

40

60

80

100

10

Timihg capacitance C

Ambient temperature Ta (˚C)

T

(pF)

Sink current vs.collector saturation voltage

2.0

VCC = 6 V

Ta = +25˚C

Frequency vs.error amp maximum output voltage amplitude

1.5

3.0

V

CC = 6 V

Ta = +25˚C

2.0

1.0

0

1.0

0.5

0

100

500 1 k

5 k 10 k

50 k 100 k

500 k

0

10

20

30

40

50

Fequency f (Hz)

Sink current I^OL(mA)

(Continued)

18

MB3782

Timing resistance vs.oscillator frequency

V

CC = 6 V

Ta = +25˚C

Power supply voltage vs. triangular wave period

100

10

V

CC = 6 V

T

R = 15 kΩ

Ta = +25˚C

1 M

100 k

10 k

C = 150 pF

T

CT

= 1500 pF

1

2

10

3

10

4

10

5

10

CT

= 15000 pF

Timing capacitance C

T

(pF)

1 k

5 k 10 k 50 k

100 k

500 k

Timing resistance R

T

( )

Ω

Ambient temperature vs.oscillator frequency

Oscillator frequency vs.duty cycle

10

100

VCC = 6 V

V

C

R

CC = 6 V

T

= 1330 pF

= 15 kΩ

C

T

= 330 pF

= 15 kΩ

80

RT

Ta = +25˚C

60

40

20

0

Ð 10

5 k 10 k

50 k 100 k

500 k 1 M

-

40

-

20

0

20

40

60

80 100 120

Oscillator frequency (Hz)

Ambient temperature Ta (˚C)

Control voltage vs.reference voltage

Control input current

V

C

CC = 6 V

V

C

CC = 6 V

5.0

500

250

T

= +25˚C

T

= +25˚C

2.5

0

4

8

12

16

20

0

1

2

3

4

5

Control voltage V^CTL(V)

(Continued)

19

MB3782

Frequenncy vs.gain and phase

CNF = open

Frequenncy vs.gain and phase

CNF = 0.047 pF

40

20

180

90

40

20

180

90

AV

0

φ

-20

-40

-90

-180

-20

-40

-90

-180

10

100

1 k

Frequenncy f (Hz)

Frequenncy vs.gain and phase

CNF = 470 pF

10 k

100 k

1 M

10

100

1 k

Frequenncy f (Hz)

Frequenncy vs.gain and phase

CNF = 4700 pF

10 k

100 k

1 M

40

180

90

40

20

180

90

AV

20

0

A^V

0

φ

-20

-40

-90

-180

-20

-40

-90

-180

10

100

1 k

10 k

100 k

1 M

10

100

1 k

10 k

100 k

1 M

Frequenncy f (Hz)

Test Circuit

Frequenncy f (Hz)

VREF

C^NF

4.7 kΩ 4.7 kΩ

240 kΩ

4

5

-

10 µF

-

OUT

6

+

IN

4.7 kΩ 4.7 kΩ

Error amp

(Continued)

20

MB3782

(Continued)

Ambient temperature vs.allowable loss

DIP version

1200

1110

1000

800

740

SOP version

600

400

200

0

-30 -20 -10

0

10 20 30 40 50 60 70 8085

Ambient temperature Ta (˚C)

21

MB3782

■ APPLICATIONS

• Concerning Equivalent Series Resistance and Stability of Smoothing Capacitors

In DC/DC converters, the equivalent series resistance value (ESR) of smoothing capacitors has a major influence

on loop phase characteristics.

The ESR is a means by which phase characteristics approximate phase relationships to ideal capacitors in high-

frequencybands(seeGraph1), thusimprovingsystemstability. Atthesametime, theuseofsmoothingcapacitors

with low ESR reduces system stability, so that care must be taken when using semiconductor electrolytic ca-

pacitors (OS capacitors) or tantalum capacitors with low ESR.

L

Tr

Rc

V^IN

D

R^L

C

Figure 7 Basic circuit for step-down voltage DC/DC converter

Frequency vs.phase

Frequency vs.Gain

0

20

0

2

– 90

– 20

– 40

– 60

2

: Rc = 0 Ω

1

2

1

: Rc = 0 Ω

1

: Rc = 31 mΩ

1

– 180

2 : Rc = 31 mΩ

10

100

1 k

Frequency f (Hz)

10 k

100 k

10

100

1 k

10 k

100 k

Frequency f (Hz)

Graph 1 Frequency vs. gain and phase

22

MB3782

• Reference data

Changing the smoothing capacitor from an aluminum electrolytic capacitor (RC 1.0Ω) to a lower-ESR semi-

conductor electrolytic capacitor (OS capacitor: RC 0.2 Ω) decreases the phase margin (see Graphs 2, 3).

V out

+

V⁰

CNF

A^Vand phase characteristics

measured between these points

– IN

–

VIN

FB

+ IN

R¹

R2

+

VREF/2

Error amp

Figure 8 Measurement of DC/DC Capacitor AV and Phase (Ψ) Characteristics

DC/DC converter + 5 V output frequency vs.gain and phase

Graph 2

60

Vcc = 10 v

R^L= 25 Ω

40

20

0

180

90

0

Cp = 0.1 µF

Av

+

V⁰

φ

Aluminum electrolytic

capacitor

220 µF (16 V)

R^C1.0 Ω

+

–

62°

: fosc = 1 kHz

– 20

– 40

– 90

– 180

100 k

10

100

1 k

Frequency f (Hz)

10 k

Graph 3

DC/DC converter + 5 V output frequency vs.gain and phase

Vcc = 10 v

60

Av

R^L= 25 Ω

180

90

0

40

20

0

Cp = 0.1 µF

OS capacitor

22 µF (16 V)

R^C0.2 Ω

+

–

φ

27°

: fosc = 1 kHz

– 90

– 20

– 40

– 180

100

1 k

10 k

100 k

10

Frequency f (Hz)

23

MB3782

■ NOTES ON USE

• Take account of common impedance when designing the earth line on a printed wiring board.

• Take measures against static electricity.

- For semiconductors, use antistatic or conductive containers.

- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.

- The work table, tools and measuring instruments must be grounded.

- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.

• Do not apply a negative voltage

- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in

malfunction.

■ ORDERING INFORMATION

Part number

Package

Remarks

Plastic DIP, 20 pin

(DIP-20P-M01)

MB3782P

Plastic SOP, 20 pin

(FPT-20P-M01)

MB3782PF

24

MB3782

■ PACKAGE DIMENSIONS

Plastic DIP, 20 pin

(DIP-20P-M01)

+0.20

–0.30

24.64

.970 ⁺^–.^.⁰⁰¹⁰²⁸

INDEX-1

INDEX-2

6.60±0.25

(.260±.010)

0.51(.020)MIN

4.36(.172)MAX

0.25±0.05

(.010±.002)

3.00(.118)MIN

0.46±0.08

(.018±.003)

+0.30

–0

+0.30

15°MAX

0.86

1.27

–0

7.62(.300)

TYP

.034 ⁺^–0^.012

.050 –⁺0^.012

1.27(.050)

MAX

2.54(.100)

TYP

C

1994 FUJITSU LIMITED D20005S-3C-3

Dimensions in mm (inches) .

Note : The values in parentheses are reference values.

(Continued)

25

MB3782

(Continued)

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3) Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

Plastic SOP 20 pin

(FPT-20P-M01)

*¹12.70 –⁺0⁰.^.2²0⁵.500 –⁺.^.0⁰0¹8⁰

0.17 –⁺0⁰.^.0⁰4³

.007 ⁺^–.^.⁰⁰⁰⁰²¹

20

11

*²5.30±0.30 7.80±0.40

(.209±.012) (.307±.016)

INDEX

Details of "A" part

2.00 ⁺^–0⁰^.^.¹²⁵⁵

(Mounting height)

.079 ⁺^–.^.⁰⁰⁰¹⁶⁰

0.25(.010)

0~8˚

"A"

1

10

1.27(.050)

0.47±0.08

(.019±.003)

M

0.13(.005)

0.50±0.20

(.020±.008)

0.10 ⁺^–0⁰^.^.⁰¹⁵⁰

.004 –⁺.^.0⁰0⁰2⁴

0.60±0.15

(Stand off)

(.024±.006)

0.10(.004)

C

2002 FUJITSU LIMITED F20003S-c-7-7

Dimensions in mm (inches) .

Note : The values in parentheses are reference values.

26

MB3782

FUJITSU LIMITED

The contents of this document are subject to change without notice.

Customers are advised to consult with FUJITSU sales

representatives before ordering.

The information, such as descriptions of function and application

circuit examples, in this document are presented solely for the

purpose of reference to show examples of operations and uses of

Fujitsu semiconductor device; Fujitsu does not warrant proper

operation of the device with respect to use based on such

information. When you develop equipment incorporating the

device based on such information, you must assume any

responsibility arising out of such use of the information. Fujitsu

assumes no liability for any damages whatsoever arising out of

the use of the information.

Any information in this document, including descriptions of

function and schematic diagrams, shall not be construed as license

of the use or exercise of any intellectual property right, such as

patent right or copyright, or any other right of Fujitsu or any third

party or does Fujitsu warrant non-infringement of any third-party’s

intellectual property right or other right by using such information.

Fujitsu assumes no liability for any infringement of the intellectual

property rights or other rights of third parties which would result

from the use of information contained herein.

The products described in this document are designed, developed

and manufactured as contemplated for general use, including

without limitation, ordinary industrial use, general office use,

personal use, and household use, but are not designed, developed

and manufactured as contemplated (1) for use accompanying fatal

risks or dangers that, unless extremely high safety is secured, could

have a serious effect to the public, and could lead directly to death,

personal injury, severe physical damage or other loss (i.e., nuclear

reaction control in nuclear facility, aircraft flight control, air traffic

control, mass transport control, medical life support system, missile

launch control in weapon system), or (2) for use requiring

extremely high reliability (i.e., submersible repeater and artificial

satellite).

Please note that Fujitsu will not be liable against you and/or any

third party for any claims or damages arising in connection with

above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You

must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and

equipment such as redundancy, fire protection, and prevention of

over-current levels and other abnormal operating conditions.

If any products described in this document represent goods or

technologies subject to certain restrictions on export under the

Foreign Exchange and Foreign Trade Law of Japan, the prior

authorization by Japanese government will be required for export

of those products from Japan.

F0309

FUJITSU LIMITED Printed in Japan


型号：	MB3782_1
厂家：	FUJITSU
描述：	ASSP Power Supplies BIPOLAR Switching Regulator Controller ASSP电源双极型开关稳压器控制器稳压器开关控制器
文件：	总27页 (文件大小：227K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MB3782_1 [FUJITSU]

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