MB3785A_03 [FUJITSU]

Switching Regulator Controller (4 Channels plus High-Precision, High-Frequency Capabilities); 开关稳压器控制器( 4通道和高精度,高频能力)
MB3785A_03
型号: MB3785A_03
厂家: FUJITSU    FUJITSU
描述:

Switching Regulator Controller (4 Channels plus High-Precision, High-Frequency Capabilities)
开关稳压器控制器( 4通道和高精度,高频能力)

稳压器 开关 控制器
文件: 总30页 (文件大小:277K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS04-27208-4E  
ASSP  
BIPOLAR  
Switching Regulator Controller  
(4 Channels plus High-Precision, High-Frequency Capabilities)  
MB3785A  
DESCRIPTION  
The MB3785A is a PWM-based 4-channel switching regulator controller featuring high-precision, high-frequency  
capabilities. All of the four channels of circuits allow their outputs to be set in three modes: step-down, step-up,  
and inverted. The third and fourth channels are suited for DC motor speed control.  
The triangular-wave oscillation circuit accepts a ceramic resonator, in addition to the standard method of oscillation  
using an RC network.  
FEATURES  
• Wide range of operating power supply voltages: 4.5 V to 18 V  
• Low current consumption: 6 mA [Typ] when operating10 µA or less during standby  
• Built-in high-precision reference voltage generator: 2.50 V±1%  
• Oscillation circuit  
- Capable of high-frequency oscillation: 100 kHz to 1 MHz  
- Also accepts a ceramic resonator.  
• Wide input range of error amplifier: –0.2 V to VCC–1.8 V  
• Built-in timer/latch-actuated short-circuiting detection circuit  
• Output circuit  
- The drive output for PNP transistors is the totem-pole type allowing the on-current and off-current values to  
be set independently.  
(Continued)  
PACKAGE  
48-pin, Plastic LQFP  
(FPT-48P-M05)  
MB3785A  
(Continued)  
• Adjustable dead time over the entire duty ratio range  
• Built-in standby and output control functions  
• High-density mounting possible: 48-pin LQFP package  
PIN ASSIGNMENT  
(TOP VIEW)  
Cb1  
OUT1  
OUT2  
GND  
OUT3  
OUT4  
VE4  
VE1  
VCC2  
VE2  
VE3  
Cb4  
48 47 46 45 44 43 42 41 40 39 38 37  
36  
Ca1  
Cb2  
1
2
Ca4  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
Cb3  
Ca2  
3
Ca3  
DTC1  
4
DTC4  
FB4  
FB1  
5
IN1 (E)  
+IN1 (E)  
IN1 (C)  
DTC2  
6
IN4 (E)  
+IN4 (E)  
IN4 (C)  
DTC3  
FB3  
7
8
9
FB2  
10  
11  
12  
IN2 (E)  
+IN2 (E)  
IN3 (E)  
+IN3 (E)  
13 14 15 16 17 18 19 20 21 22 23 24  
IN2(C) OSCOUT  
OSCIN RT  
CT  
VREF  
CTL2  
CTL1 CTL3  
SCP  
IN3 (C)  
VCC1  
(FPT-48P-M05)  
Note : The alphabetic characters in parenthesis indicate the following input pins.  
(C) : comparator  
(E) : error amp  
2
MB3785A  
PIN DESCRIPTION  
Pin No.  
Symbol  
I/O  
Description  
1
Ca1  
CH1 output transistor OFF-current setting terminal. Insert a capacitor be-  
tween the Ca1 and the Cb1 terminals, then set the output transistor OFF-cur-  
rent.  
48  
Cb1  
7
6
+IN1(E)  
–IN1(E)  
FB1  
I
I
CH1 error amp non-inverted input terminal.  
CH1 error amp inverted input terminal.  
CH1 error amp output terminal.  
CH1  
5
O
I
8
–IN1(C)  
DTC1  
VE1  
CH1 comparator inverted input terminal.  
CH1 dead time control terminal.  
4
I
47  
46  
3
I
CH1 output current setting terminal.  
CH1 totem-pole output terminal.  
OUT1  
Ca2  
O
CH2 output transistor OFF-current setting terminal. Insert a capacitor be-  
tween the Ca2 and the Cb2 terminals, then set the output transistor OFF-cur-  
rent.  
2
Cb2  
12  
11  
10  
13  
9
+IN2(E)  
–IN2(E)  
FB2  
I
I
CH2 error amp non-inverted input terminal.  
CH2 error amp inverted input terminal.  
CH2 error amp output terminal.  
CH2  
O
I
–IN2(C)  
DTC2  
VE2  
CH2 comparator inverted input terminal.  
CH2 dead time control terminal.  
I
43  
44  
34  
I
CH2 output current setting terminal.  
CH2 totem-pole output terminal.  
OUT2  
Ca3  
O
CH3 output transistor OFF-current setting terminal. Insert a capacitor be-  
tween the Ca3 and the Cb3 terminals, then set the output transistor OFF-cur-  
rent.  
35  
Cb3  
25  
26  
27  
24  
28  
41  
40  
36  
+IN3(E)  
–IN3(E)  
FB3  
I
I
CH3 error amp non-inverted input terminal.  
CH3 error amp inverted input terminal.  
CH3 error amp output terminal.  
CH3  
O
I
–IN3(C)  
DTC3  
VE3  
CH3 comparator inverted input terminal.  
CH3 dead time control terminal.  
I
I
CH3 output current setting terminal.  
CH3 totem-pole output terminal.  
OUT3  
Ca4  
O
CH4 output transistor OFF-current setting terminal. Insert a capacitor be-  
tween the Ca4 and the Cb4 terminals, then set the output transistor OFF-cur-  
rent.  
37  
Cb4  
30  
31  
32  
29  
+IN4(E)  
–IN4(E)  
FB4  
I
I
CH4 error amp non-inverted input terminal.  
CH4 error inverted input terminal.  
CH4  
O
I
CH4 error amp output terminal.  
–IN4(C)  
CH4 comparator inverted input terminal.  
(Continued)  
3
MB3785A  
(Continued)  
Pin No.  
33  
Symbol  
I/O  
I
Description  
CH4 dead time control terminal.  
DTC4  
VE4  
CH4  
38  
39  
I
CH4 output current setting terminal.  
CH4 totem-pole output terminal.  
OUT4  
O
14  
15  
16  
OSCIN  
OSCOUT  
RT  
This terminal connects a ceramic resonator.  
This terminal connects to a resistor for setting the triangular-wave frequency.  
This terminal connects to a capacitor for setting the triangular-wave frequen-  
cy.  
17  
CT  
18  
45  
42  
19  
23  
VCC1  
VCC2  
GND  
VREF  
O
Power supply terminal for the reference power supply control circuit.  
Power supply terminal for the output circuit.  
GND terminal.  
Reference voltage output terminal.  
SCP  
This terminal connects to a capacitor for the short-circuit protection circuit.  
Power supply circuit and CH1 control terminal.  
When this pin is High, the power supply circuit and first channel are in  
20  
21  
22  
CTL1  
CTL2  
CTL3  
I
I
I
active state.  
When this pin is Low, the power supply circuit and first channel are in  
standby state.  
CH2 control terminal.  
While the CTL1 terminal is High  
When this pin is High, the second channel is in active state.  
When this pin is Low, the second channel is in the inactive state.  
CH3 and CH4 control terminal.  
While the CTL1 terminal is High  
When this pin is High, the third and fourth channels are in active state.  
When this pin is Low, the third and fourth channels are in the inactive  
state.  
4
MB3785A  
BLOCK DIAGRAM  
Ca1  
1
CH 1  
Cb1  
48  
Error Amp 1  
PWM comparator 1  
VCC2  
45  
+
+IN1 (E)  
7
OFF Current  
Setting  
+
+
IN1 (E)  
6
5
FB1  
46  
OUT1  
V
REF  
V
REF  
Comparator 1  
+
DTC  
2 V  
Comparator 1  
8
4
IN1 (C)  
47  
2.5 V  
VE1  
DTC1  
3
2
CH 2  
Ca2  
Cb2  
Error Amp 2  
PWM comparator 2  
OFF Current  
Setting  
+
+IN2 (E) 12  
+
+
IN2 (E) 11  
FB2 10  
44 OUT2  
VREF  
Comparator 2  
V
REF  
+
2 V  
DTC  
13  
IN2 (C)  
Comparator 2  
43  
2.5 V  
VE2  
9
DTC2  
34  
CH 3  
Ca3  
Error Amp 3  
33  
PWM comparator 3  
Cb3  
+
25  
+IN3 (E)  
OFF Current  
Setting  
+
+
IN3 (E)  
26  
27  
FB3  
40  
OUT3  
Comparator 3  
100 Ω  
+
0.6 V  
CH 4  
24  
IN3 (C)  
41  
2.5 V  
VE3  
Ca4  
36  
DTC3 28  
Error Amp 4  
37  
PWM comparator 4  
Cb4  
+
+IN4 (E) 30  
OFF Current  
Setting  
+
+
IN4 (E)  
31  
FB4 32  
39  
OUT4  
Comparator 4  
100 Ω  
+
0.6 V  
29  
IN4 (C)  
38  
2.5 V  
33  
DTC4  
VE4  
SCP  
Comparator  
21  
CTL2  
+
22  
CTL3  
2.1 V  
+
1.9 V  
1.3 V  
DTC  
Comparator 3  
1 µA  
1.2 V  
SCP  
18  
VCC1  
23  
V
REF  
Under Voltage  
Lock-out  
Protection Circuit  
Ref.  
Power Supply  
S
R
Triangular-Wave  
Oscillator Circuit  
20  
CTL1  
Vol. Circuit & Channel  
Circuit  
SR Latch  
Control  
42  
2.5 V  
14  
15  
16  
17  
19  
OSCIN  
RT  
CT  
V
REF  
GND  
OSCOUT  
Ceramic Resonator  
5
MB3785A  
FUNCTIONAL DESCRIPTION  
1. Switching Regulator Function  
(1) Reference voltage circuit  
The reference voltage circuit generates a temperature-compensated reference voltage ( =: 2.50 V) using the  
voltage supplied from the power supply terminal (pin 18). This voltage is used as the operating power supply for  
the internal circuits of the IC. The reference voltage can also be supplied to an external device from the VREF  
terminal (pin 19).  
(2) Triangular-wave oscillator circuit  
By connecting a timing capacitor and a resistor to the CT (pin 17) and the RT (pin 16) terminals, it is possible to  
generate any desired triangular oscillation waveform. The oscillation can also be obtained by using a ceramic  
resonator connected to pins 14 and 15.  
This waveform has an amplitude of 1.3 V to 1.9 V and is input to the internal PWM comparator of the IC. At the  
same time, it can also be supplied to an external device from the CT terminal (pin 17).  
(3) Error amplifier  
This amplifier detects the output voltage of the switching regulator and outputs a PWM control signal accordingly.  
It has a wide common-mode input voltage range from –0.2 V to VCC –1.8 V and allows easy setting from an  
external power supply, making the system suitable for DC motor speed control.  
By connecting a feedback resistor and capacitor from the error amplifier output pin to the inverted input pin, you  
can form any desired loop gain, for stable phase compensation.  
(4) PWM comparator  
• CH1 & CH2  
The PWM comparators in these channels are a voltage comparator with two inverted input and one non-inverted  
input, that is, a voltage-pulse width converter to control the output pulse on-time according to the input voltage.  
It turns on the output transistor when the triangular wave from the oscillator is higher than both the error amplifier  
output and the DTC-pin voltages.  
• CH3 & CH4  
The PWM comparators in these channels are a voltage comparator with one inverted input and two non-inverted  
inputs, that is, a voltage-pulse width converter to control the output pulse on-time according to the input voltage.  
It turns on the output transistor when the triangular wave from the oscillator is lower than both the error amplifier  
output and the DTC-pin voltages.  
These four channels can be provided with a soft start function by using the DTC pin.  
(5) Output circuit  
The output circuit is comprised of a totem-pole configuration and can drive a PNP transistor (30 mA Max)  
6
MB3785A  
2. Channel Control Function  
The MB3785A allows the four channels of power supply circuits to be controlled independently. Set the voltage  
levels on the CTL1 (pin 20), CTL2 (pin 21), and CTL3 (pin 22) terminals to turn the circuit of each channel “ON”  
or “OFF”, as listed below.  
Table 1 Channel by Channel On/Off Setting Conditions.  
CTL pin voltage level  
On/Off state of channel  
Power supply  
circuit  
CTL1  
CTL2  
CTL3  
CH1  
CH2  
CH3 and CH4  
H
L
ON  
OFF  
ON  
H
ON  
H
L
ON  
H
L
L
OFF  
OFF  
X
Standby state*  
*: The power supply current value during standby is 10 µA or less.  
3. Protective Functions  
(1) Timer/latch-actuated short-circuiting protection circuit  
The SCP comparator checks the output voltage of each comparator which is used to detect the short-circuiting  
of output. When any of these comparators have an output voltage greater than or equal to 2.1 V, the timer circuit  
is activated and a protection enable capacitor externally fitted to the SCP terminal (pin 23) begins to charge.  
If the comparator’s output voltage is not restored to normal voltage level by the time the capacitor voltage has  
risen to the base-emitter junction voltage of the transistor, i.e., VBE (=: 0.65 V), the latch circuit is activated to turn  
off the output transistor while at the same time setting the duty (OFF) = 100 %.  
When actuated, this protection circuit can be reset by turning on the power supply again.  
(2) Under voltage lockout protection circuit  
A transient state at power-on or a momentary drop of the power supply voltage causes the control IC to mal-  
function, resulting in system breakdown or deterioration. By detecting the internal reference voltage with respect  
to the power supply voltage, this protection circuit resets the latch circuit to turn off the output transistor and set  
the duty (OFF) = 100 %, while at the same time holding the SCP terminal (pin 23) at the “L”. The reset is cleared  
when the power supply voltage becomes greater than or equal to the threshold voltage level of this protection  
circuit.  
7
MB3785A  
ABSOLUTE MAXIMUM RAGINGS (See WARNING)  
(Ta = +25°C)  
Rating  
Parameter  
Symbol  
Conditions  
Unit  
Min  
Max  
20  
Power supply voltage  
Control input voltage  
Power dissipation  
VCC  
VICTL  
PD  
V
V
20  
Ta +25°C  
550*  
85  
mW  
°C  
°C  
Operating ambient temperature  
Storage temperature  
TOP  
–30  
–55  
Tstg  
125  
*: The packages are mounted on the epoxy board (4 cm × 4 cm).  
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,  
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.  
RECOMMENDED OPERATING CONDITIONS  
(Ta = +25°C)  
Value  
Typ  
6.0  
Parameter  
Symbol  
Conditions  
Unit  
Min  
4.5  
Max  
18  
Power supply voltage*  
Error amp. input voltage  
Comparator input voltage  
Control input voltage  
Output current  
VCC  
VI  
V
V
–0.2  
–0.2  
–0.2  
3.0  
VCC –0.8  
VCC  
VI  
V
VICTL  
IO  
18  
V
30  
mA  
pF  
kΩ  
kHz  
Timing capacitance  
Timing resistance  
CT  
68  
1500  
100  
RT  
5.1  
Oscillation frequency  
fOSC  
100  
500  
1000  
Operating ambient tem-  
perature  
TOP  
–30  
25  
85  
°C  
*: The minimum value of the recommended supply voltage is 3.6 V except when the device operates with constant  
output sink current.  
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the  
semiconductor device. All of the device’s electrical characteristics are warranted when the device is  
operated within these ranges.  
Always use semiconductor devices within their recommended operating condition ranges. Operation  
outside these ranges may adversely affect reliability and could result in device failure.  
No warranty is made with respect to uses, operating conditions, or combinations not represented on  
the data sheet. Users considering application outside the listed conditions are advised to contact their  
FUJITSU representatives beforehand.  
8
MB3785A  
ELECTRICAL CHARACTERISTICS  
(VCC = +6 V, Ta = +25°C)  
Value  
Unit  
Parameter  
Symbol  
Conditions  
IOR = –1 mA  
Ta = –30°C to +85°C  
Min  
Typ  
Max  
Reference voltage  
VREF  
2.475 2.500 2.525  
V
Rate of changed in output  
voltage vs. Temperature  
VREF  
/VREF  
–2  
±0.2  
2
%
Input stability  
Line VCC = 3.6 V to 18 V  
–10  
–10  
–25  
–2  
–3  
10  
10  
–3  
mV  
mV  
mA  
V
Load stability  
Load IOR = –0.1 mA to –1 mA  
Sort-circuit output current  
IOS  
VtH  
VREF = 2 V  
–8  
2.72  
2.60  
120  
Threshold voltage  
Hysteresis width  
VtL  
V
VHYS  
80  
mV  
Reset voltage (VCC)  
VR  
1.5  
1.9  
V
Input threshold voltage  
Input bias current  
Vth  
2.45  
2.50  
2.55  
V
IIB  
VI = 0 V  
VI = 0 V  
–200  
–100  
nA  
Input voltage range  
VI  
–0.2  
VCC  
V
Input offset voltage  
Input bias current  
VIO  
IIB  
0.58  
0.65  
0.72  
V
–200  
–100  
nA  
Common mode input voltage  
range  
VICM  
–0.2  
VCC–0.8  
V
Threshold voltage  
Input standby voltage  
Input latch voltage  
VtPC  
VSTB  
VI  
0.60  
0.65  
50  
0.70  
100  
100  
V
mV  
mV  
50  
Input source current  
Ilbpc  
–1.4  
–1.0  
–0.6  
µA  
Oscillation frequency  
fOSC  
CT = 300 pF, RT = 6.2 k450  
500  
±1  
550  
kHz  
%
Frequency stability (VCC)  
f/fdv VCC = 3.6 V to 18 V  
Frequency stability (Ta)  
f/fdT Ta = –30°C to +85°C  
–4  
4
%
(Continued)  
9
MB3785A  
(Continued)  
(VCC = +6 V, Ta = +25°C)  
Value  
Unit  
Parameter  
Symbol  
Conditions  
VFB = 1.6 V  
Min  
–10  
Typ  
Max  
Input offset voltage  
Input bias current  
VIO  
10  
mV  
nA  
IIB  
VFB = 1.6 V  
–200  
–100  
Common mode input voltage  
range  
VICM  
–0.2  
VCC–0.8  
V
Voltage gain  
AV  
BW  
Vt0  
60  
100  
800  
1.9  
dB  
kHz  
V
Frequency bandwidth  
AV = 0 dB  
Duty cycle = 0 %  
Duty cycle = 100 %  
Vdt = 2.3 V  
2.25  
Input threshold voltage  
Vt100  
IIbdt  
IIdt  
1.05  
1.3  
V
Input bias current  
0.1  
0.5  
–80  
µA  
µA  
V
Latch mode source current  
Latch input voltage  
Vdt = 1.5 V  
–500  
2.4  
Idt = –40 µA  
Duty cycle = 0 %  
Duty cycle = 100 %  
Vdt = 2.3 V  
VREF–0.3  
1.05  
VIdt  
Vt0  
1.3  
V
Input threshold voltage  
Vt100  
IIbdt  
IIdt  
1.9  
2.25  
0.5  
V
Input bias current  
0.1  
µA  
µA  
V
Latch mode source current  
Latch input voltage  
Threshold voltage  
Vdt = 1.5 V  
80  
500  
0.2  
VIdt  
Vth  
Idt = +40 µA  
0.3  
2.1  
200  
0.7  
1.4  
V
IIH  
VCTL = 5 V  
100  
µA  
Input current  
IIL  
VCTL = 0 V  
–10  
10  
µA  
Source current  
Sink current  
IO  
IO  
–40  
30  
mA  
mA  
RE = 82 Ω  
18  
42  
Output leakage current  
Standby current  
ILO  
VO = 18 V  
0
20  
10  
µA  
µA  
ICC0  
Supply current when output  
off  
ICC  
6
8.6  
mA  
10  
MB3785A  
TYPICAL CHARACTERISTIC CURVES  
1. Supply current vs. Supply voltage  
2. Reference voltage vs. Supply voltage  
Ta = +25°C  
Ta=+25°C  
10  
8
5
4
3
2
1
0
CTL1 = 6 V  
6
CTL1, 2  
=
6 V, CTL1, 2, 3  
=
6 V  
4
2
0
0
4
8
12  
16  
20  
0
4
8
12  
Supply voltage VCC (V)  
4. Reference voltage vs. Ambient temperature  
16  
20  
Supply voltage VCC (V)  
3. Reference voltage and Output current setting  
pin voltage vs. Supply voltage  
2.56  
2.54  
2.52  
2.50  
2.48  
2.46  
2.44  
5
5
4
3
2
1
V
CC = 6 V  
Ta = +25°C  
V
CTL1, 2, 3 = 6 V  
I
OR = −1 mA  
4
V
REF  
3
2
1
0
VE  
0
1
2
3
4
5
60 40 20  
0
20  
40  
60  
80  
100  
Supply voltage VCC (V)  
Ambient temperature Ta (°C)  
5. Reference voltage vs. Control voltage  
6. Control current vs. Control voltage  
V
CC = 6V  
3.0  
2.8  
2.6  
2.4  
2.2  
2.0  
500  
400  
300  
200  
100  
0
V
CC = 6 V  
Ta = +25°C  
Ta = +25°C  
0
1
2
3
4
5
0
4
8
12  
16  
20  
Control voltage VCTL1 (V)  
Control voltage VCTL1 (V)  
(Continued)  
11  
MB3785A  
(Continued)  
8. Triangular wave frequency  
vs. Timing resistance  
7. Triangular wave maximum amplitude voltage  
vs. Timing capacitance  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
5 M  
V
CC = 6 V  
V
R
CC = 6 V  
= 10 kΩ  
Ta= +25°  
Ta = +25°  
C
T
C
1 M  
500 k  
100 k  
50 k  
CT = 68 pF  
C
T
T
= 150 pF  
= 300 pF  
10 k  
5 k  
C
50 102 5 × 102 103 5 × 103104 5 × 104 105  
Timing capacitance C (pF)  
CT = 1500 pF  
T
CT= 15000 pF  
1 k  
5 k 10k  
50 k 100 k  
500 k 1 M  
Timing resistance R  
T
()  
9. Triangular wave cycle vs. Timing capacitance  
100  
50  
V
R
CC = 6 V  
= 10 kΩ  
Ta = +25°C  
10. Duty vs. Triangular wave frequency  
T
100  
80  
60  
40  
20  
0
V
V
CC = 6 V  
DT = 1.6 V  
CH 1  
10  
5
Ta = +25°C  
1
0.5  
0.2  
10  
5 k  
10k  
50 k 100 k  
500 k 1 M  
102  
5 × 102 103  
5 × 103 104  
(pF)  
5 × 104  
Triangular wave frequency (Hz)  
Timing capacitance C  
T
12. Rate of change in triangular wave frequency vs.  
Ambient temperature  
11. Rate of change in triangular wave frequency vs.  
Ambient temperature  
(Using ceramic resonator)  
(Not using ceramic resonator)  
10  
5
10  
5
V
CC  
=
=
6 V  
V
f
CC = 6 V  
OSC = 460 kHz  
(R = 6.8 k, C = 280 pF)  
f
OSC  
450 kHz  
8.5 k, CT = 250 pF)  
(R  
T
=
T
T
0
0
5  
10  
5  
10  
40 20  
0
20  
40  
60  
80  
100  
40 20  
0
20  
40  
60  
80  
100  
Ambient temperature Ta (°C)  
Ambient temperature Ta (°C)  
(Continued)  
12  
MB3785A  
(Continued)  
13. Gain vs. Frequency and Phase vs. Frequency  
14. Error amp maximum output voltage vs. Frequency  
3.0  
Ta = +25°C  
180  
90  
40  
20  
VCC = 6V  
CH 1  
Ta = +25°C  
AV  
2.0  
1.0  
0
0
0
φ
90  
−−80  
20  
40  
100  
500 1 k  
5 k 10 k  
50 k 100 k  
500 k 1 M  
1 k  
10 k  
100 k  
Frequency f (Hz)  
1 M  
10 M  
Triangular wave frequency fOSC (Hz)  
[Measuring Circuit]  
2.5 V 2.5 V  
240 kΩ  
4.7 kΩ  
4.7 kΩ  
+
OUT  
10 µF  
+
IN  
Error amp  
4.7 kΩ  
4.7 kΩ  
15. Power dissipation vs. Ambient temperature  
1000  
800  
600  
550  
LQFP  
400  
200  
0
–30 –20  
0
20  
40  
60  
80  
100  
Ambient temperature Ta (°C)  
13  
MB3785A  
METHODS OF SETTING THE OUTPUT VOLTAGE  
1. Method of Connecting CH1 and CH2: When Output Voltage (VO) is Positive  
VREF  
+
VOUT  
VREF  
+
R
R
R1  
VO  
=
(R1 + R2)  
2 × R2  
+
R2  
RNF  
2. Method of Connecting CH1 and CH2: When Output Voltage (VO) is Negative  
VREF  
VREF  
2 × R1  
VO = –  
(R1 + R2) + VREF  
R
R
R1  
+
R2  
RNF  
VOUT  
14  
MB3785A  
3. Method of Connecting CH3 and CH4: When Output Voltage (VO) is Positive  
VREF  
VOUT  
VREF  
+
R
R
R1  
VO  
=
(R1 + R2)  
2 × R2  
+
R2  
RNF  
4. Method of Connecting CH3 and CH4: When Output Voltage (VO) is Negative  
VREF  
VREF  
VO = –  
(R1 + R2) + VREF  
2 × R1  
R
R
R1  
+
R2  
RNF  
VOUT  
15  
MB3785A  
METHOD OF SETTING THE OUTPUT CURRENT  
The output circuit is comprised of a totem-pole configuration. Its output current waveform is such that the ON-  
current value is set by constant current and the OFF-current value is set by a time constant as shown in Figure  
2. These output currents are set using the equations below.  
• ON-current = 2.5/RE [A]  
(Voltage on output current-setting pin VE =: 2.5 V)  
• OFF-current time constant=: proportional to the value of CB  
Figure 1. CH1 to CH4 Output Circuit  
Figure 2. Output Current Waveform  
Drive transistor  
CB  
ON-current  
OFF-current  
OFF-current  
setting block  
0
OFF-current  
ON-current  
t
RE  
VE  
Figure 3. Voltage and Current Waveforms  
on Output Pin (CH1)  
Figure 4. Measuring Circuit Diagram  
VCC = 10 V  
200 ns  
5 V  
VO [ V ] 10  
1000 pF  
VCC  
8 pin  
1
48  
0
22 µH  
(5 V)  
45  
IO [mA ] 40  
8.2  
k
10 µF  
IO  
VO  
20  
0
MB3785A  
2.7  
k
46570 pF  
47  
20  
7 pin  
82 Ω  
10 mV  
40  
0
0.4  
0.8  
1.2  
t [ µs ]  
1.6  
2.0  
16  
MB3785A  
METHOD OF SETTING TIME CONSTANT  
FOR TIMER/LATCH-ACTUATED SHORT-CIRCUTING PROTECTION CIRCUIT  
Figure 5 schematically shows the protection latch circuit.  
The outputs from the output-shorting detection comparators 1 to 4 are respectively connected to the inverted  
inputs of the SCP comparator. These inputs are always compared with the reference voltage of approximately  
2.1 V which is fed to the non-inverted input of the SCP comparator.  
While the switching regulator load conditions are stable, there are no changes in the outputs of the comparators  
1 to 4 so that short-circuit protection control keeps equilibrium state. At this time, the voltage on the SCP terminal  
(pin 23) is held at approximately 50 mV.  
When load conditions change rapidly due to a short-circuiting of load, for example, the output voltage of the  
comparator for the relevant channel goes “H” (2.1 V or more). Consequently, the SCP comparator outputs a “L”,  
causing the transistor Q1 to turn off, and the short-circuit protection capacitor CPE (externally fitted to the SCP  
terminal) begins to charge.  
VPE = 50 mV + tPE × 10–6/CPE  
0.65 = 50 mV + tPE × 10–6/CPE  
CPE = tPE/0.6 (s)  
When the external capacitor CPE is charged to approximately 0.65 V, the SR latch is set and the output drive  
transistor is turned off. Simultaneously, the dead time is extended to 100% and the output voltage on the SCP  
terminal (pin 23) is held “L”. As a result, the S-R latch input is closed and CPE is discharged.  
Figure 5. Protection Latch Circuit  
2.5 V  
1 µA  
23  
S
R
+
Comparator 1  
Comparator 2  
Comparator 3  
Comparator 4  
OUT  
PWM  
comparator  
Q2  
Latch  
U.V.L.O  
Q1  
CPE  
2.1 V  
17  
MB3785A  
TREATMENT WHEN NOT USING SCP  
When you do not use the timer/latch-actuated short-circuiting protection circuit, connect the SCP terminal (pin  
23) to GND with the shortest distance possible. Also, connect the comparator’s input terminal for each channel  
to the VCC1 terminal (pin 18).  
Figure 6. Treatment When Not Using SCP  
18  
VCC1  
–IN1 (C)  
8
13 –IN2 (C)  
–IN3 (C)  
24  
29 –IN4 (C)  
23  
OSCILLATOR FREQUENCY SETTING  
The oscillator frequency can be set by connecting a timing capacitor (CT) to the CT terminal (pin 17) and a timing  
resistor (RT) to the RT terminal (pin 16).  
Oscillator frequency: fosc  
930000  
fosc (kHz)  
RT(k)  
CT(pF)  
18  
MB3785A  
METHOD OF SETTING THE TRIANGULAR-WAVE OSCILLATOR CIRCUIT  
1. When Not Using Ceramic Resonator  
Connect the OSCIN terminal (pin 14) to GND and leave the OSCOUT terminal (pin 15) open. This makes it possible  
to set the oscillation frequency with only CT and RT.  
Figure 7. When Not Using Ceramic Resonator  
OSCIN  
14  
OSCOUT  
RT  
CT  
15  
16  
17  
CT  
RT  
Open  
2. When Using Ceramic Resonator  
By connecting a ceramic resonator between OSCIN and OSCOUT as shown below, you can set the oscillation  
frequency. In this case, too, CT and RT are required. Determine the values of CT and RT so that the oscillation  
frequency of this RC network is about 5% to 10% lower than that of the ceramic resonator.  
Figure 8. When Using Ceramic Resonator  
OSCIN OSCOUT  
RT  
CT  
14  
15  
16  
17  
Ceramic resonator  
CT  
RT  
C1  
C2  
19  
MB3785A  
<Precautions>  
When the oscillation rise time at power switch-on is compared between a ceramic and a crystal resonator, it is  
known that the crystal resonator is about 10 to 100 times slower to rise than the ceramic resonator. Therefore,  
when a crystal resonator is used, system operation as a switching regulator at power switch-on becomes  
unstable. To avoid this problem, it is recommended that you use a ceramic oscillator because it has a short rise  
time and, hence, ensures stable operation.  
• Crystal Resonator Turn-on Characteristic  
2.0  
1.5  
1.0  
0
1
2
3
4
5
t (ms)  
• Ceramic Resonator Turn-on Characteristic  
2.0  
1.5  
1.0  
0
1
2
3
4
5
t (ms)  
20  
MB3785A  
METHOD OF SETTING THE DEAD TIME  
When the device is set for step-up inverted output based on the flyback method, the output transistor is fixed to  
a full-on state (ON-duty = 100 %) at power switch-on. To prevent this problem, you may determine the voltages  
on the DTC terminals (pins 4, 9, 28, and 33) from the VREF voltage so you can easily set the output transistor’s  
dead time (maximum ON-duty) independently for each channel as shown below.  
(1) CH1 and CH2 Channels  
When the voltage on the DTC terminals (pins 4 and 9) is higher than the triangular-wave output voltage from  
the oscillator, the output transistor turns off. The dead time calculation formula assuming that triangular-wave  
amplitude =: 0.6 V and triangular-wave minimum voltage=: 1.3 V is given below.  
Vdt – 1.3  
0.6  
R2  
=:  
Duty (OFF)  
× 100 [%], Vdt =  
× VREF  
R1 + R2  
When you do not use these DTC terminals, connect them to GND.  
Figure 9. When Using DTC to Set Dead Time  
Figure 10. When Not Using DTC  
19  
VREF  
R1  
R2  
DTC1  
(DTC2)  
DTC1  
(DTC2)  
Vdt  
(2) CH3 and CH4 Channels  
When the voltage on the DTC terminals (pins 28 and 33) is lower than the triangular-wave output voltage from  
the oscillator, the output transistor turns off. The dead time calculation formula assuming that triangular-wave  
amplitude=: 0.6 V and triangular-wave maximum voltage=: 1.9 V is given below.  
1.9 –Vdt  
0.6  
R2  
=:  
Duty (OFF)  
× 100 [%], Vdt =  
× VREF  
R1 + R2  
When you do not use these DTC terminals, connect them to VREF.  
21  
MB3785A  
Figure 11. When Using DTC to Set Dead  
Time  
Figure 12. When Not Using DTC  
19  
VREF  
19  
VREF  
R1  
R2  
DTC3  
(DTC4)  
DTC3  
(DTC4)  
Vdt  
<Precautions>  
When you use a ceramic resonator, pay attention when setting the dead time because the triangular-wave  
amplitude is determined by the values of CT and RT.  
22  
MB3785A  
METHODS OF SETTING THE SOFT START TIME  
To prevent surge currents when the IC is turned on, you can set a soft start using the DTC terminal (pin 4, 9, 28  
and 33).  
When power is switched on, channels 1 and 2 begin discharging the capacitor (Cdt) connected the DTC1 (DTC2)  
terminal, channels 3 and 4 begin charging the capacitor (Cdt) connected the DTC3 (DTC4) terminal. The soft  
start process operates by comparing the soft start setting voltage, which is proportional to the DTC terminal  
voltage, with the triangular waveform, and varying the ON-duty of the OUT terminal (pin 46, 44, 40 and 39).  
The soft start time until the ON duty reaches 50 % is determined by the following equation:  
For figure 13  
Soft start time (time until output ON duty = 50%)  
1.6  
2.5  
)
0.446 × Cdt (F) × Rdt ()  
ts (s) = Cdt (F) × Rdt () × ln (  
For figure 14  
Soft start time (time until output ON duty = 50%)  
1.6  
2.5  
)
1.022 × Cdt (F) × Rdt ()  
ts (s) = Cdt (F) × Rdt () × ln (1 −  
Figure 13. Setting Soft Start for CH1 and  
CH2  
Figure 14. Setting Soft Start for CH3 and  
CH4  
VREF  
19  
19  
VREF  
Rdt  
Cdt  
Cdt  
Rdt  
DTC3  
(DTC4)  
DTC1  
(DTC2)  
23  
MB3785A  
It is also possible to set soft start simultaneously with the dead time by configuring the DTC terminals as shown  
below.  
For figure 15  
Soft start time (time until output ON duty = 50%)  
Cdt (F) × R1 () × R2 ()  
R1 () + R2 ()  
0.36R2 ()  
R1 ()  
)
× ln (0.64 −  
ts (s) = −  
For figure 16  
Soft start time (time until output ON duty = 50%)  
Cdt (F) × R1 () × R2 ()  
R1 () + R2 ()  
1.6 (R1 () + R2 ())  
2.5R2 ()  
× ln (1 −  
)
ts (s) = −  
Figure 15. Setting Dead Time and Soft Start  
for CH1 and CH2  
Figure 16. Setting Dead Time and Soft Start  
for CH3 and CH4  
19  
VREF  
VREF  
19  
R1  
R2  
Cdt  
R1  
R2  
DTC3  
(DTC4)  
DTC1  
(DTC2)  
Cdt  
24  
MB3785A  
APPLICATION  
1. Equivalent series resistor and stability of smoothing capacitor  
The equivalent series resistor (ESR) of the smoothing capacitor in the DC/DC converter greatly affects the loop  
phase characteristic.  
The stability of the system is improved so that the phase characteristic may advance the phase to the ideal  
capacitor by ESR in the high frequency region (see “Gain vs. Frequency” and “Phase vs. Frequency”).  
A smoothing capacitor with a low ESR reduces system stability. Use care when using low ESR electrolytic  
capacitors (OS-CONTM) and tantalum capacitors.  
Note: OS-CON is the trademark of Sanyo Electnic Co., Ltd.  
DC/DC Converter Basic Circuit  
L
Tr  
RC  
VIN  
D
RL  
C
Gain vs. Frequency  
Phase vs. Frequency  
0
20  
0
(2)  
(1)  
90  
20  
40  
60  
(2)  
(1) : RC = 0 Ω  
(2) : RC = 31 mΩ  
(1) : RC = 0 Ω  
(2) : RC = 31 mΩ  
(1)  
180  
10  
100  
1 k  
Frequency f (Hz)  
10 k  
100 k  
10  
100  
1 k  
Frequency f (Hz)  
10 k  
100 k  
25  
MB3785A  
Reference data  
If an aluminum electrolytic smoothing capacitor (RC=: 1.0 ) is replaced with a low ESR electrolytic capacitor  
(OS-CONTM : RC=: 0.2 ), the phase margin is reduced by half (see Fig. 17 and 18).  
DC/DC Converter AV vs. φ characteristic Test Circuit  
VOUT  
+
VO  
CNF  
AV vs. φ characteristic  
Between these points  
IN  
+IN  
+
VIN  
FB  
R2  
R1  
VREF/2  
Error Amp.  
Figure 17 DC/DC Converter +5 V output Gain vs. Phase  
60  
40  
VCC = 10 V  
RL = 25 Ω  
CP = 0.1 µF  
180  
AV  
+
VO  
φ
20  
90  
AI Capacitor  
220 µF (16 V)  
RC 1.0 : fOSC = 1 kHz  
+
62 °  
0
0
20  
40  
90  
180  
GND  
10  
100  
1 k  
10 k  
100 k  
Figure 18 DC/DC Converter +5 V output Gain vs. Phase  
60  
40  
VCC = 10 V  
RL = 25 Ω  
CP = 0.1 µF  
AV  
180  
90  
+
VO  
20  
OS-CONTM  
22 µF (16 V)  
RC 0.2 : fOSC = 1 kHz  
+
φ
0
0
27 °  
20  
40  
90  
180  
GND  
10  
100  
1 k  
10 k  
100 k  
Frequency f (Hz)  
26  
MB3785A  
EXAMPLE OF APPLICATION CIRCUIT  
33 µF  
V
CC  
10 µH  
33 µF  
1000 pF  
1
B
48  
45  
22 µH  
10 µF  
5 V  
V
CC  
A
+IN  
7
8.2 kΩ  
4.7 kΩ  
–IN  
FB  
6
5
CH1  
2.7 kΩ  
OUT  
46  
47  
150 kΩ  
4.7 kΩ  
RFB  
1000 pF  
10 mA  
B
A
8
4
33 kΩ  
DTC  
250 Ω  
1000 pF  
3
2
24 V  
27 kΩ  
1 µF  
C
+IN  
12  
4.7 kΩ  
D 15 V  
–IN  
FB  
11  
10  
CH2  
OUT  
150 kΩ  
4.7 kRFB  
44  
43  
20 kΩ  
15  
µF  
1000 pF  
10 mA  
1.8 kΩ  
D
13  
9
C
27 kΩ  
DTC  
250 Ω  
1000 pF  
34  
35  
F
Motor  
Control  
Signal  
33 kΩ  
DC motor  
1 µF  
22 µH  
10 µF  
+IN  
25  
8.2 kΩ  
2.7 kΩ  
E
–IN  
FB  
26  
27  
CH3  
OUT  
150 kΩ  
40  
41  
RFB  
1000 pF  
10 mA  
F
E
24  
28  
DTC  
250 Ω  
1000 pF  
10 kΩ  
H
36  
37  
Motor  
Control  
Signal  
DC motor  
22 µH  
10 µF  
+IN  
30  
8.2 kΩ  
2.7 kΩ  
G
–IN  
FB  
31  
32  
OUT  
150 kΩ  
39  
38  
CH4  
RFB  
1000 pF  
10 mA  
H
G
29  
33  
DTC  
250 Ω  
10 kΩ  
V
CC  
18  
42  
V
REF  
19  
23  
GND  
SCP  
14  
15  
16  
20  
21  
22  
17  
0.1 µF  
CT  
6.2 kΩ  
300 pF  
CTL1 CTL2 CTL3  
RT  
Ceramic Resonator  
Output Control Signals  
27  
MB3785A  
NOTES ON USE  
Take account of common impedance when designing the earth line on a printed wiring board.  
Take measures against static electricity.  
- For semiconductors, use antistatic or conductive containers.  
- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.  
- The work table, tools and measuring instruments must be grounded.  
- The worker must put on a grounding device containing 250 kto 1 Mresistors in series.  
• Do not apply a negative voltage  
- Applying a negative voltage of 0.3 V or less to an LSI may generate a parasitic transistor, resulting in  
malfunction.  
ORDERING INFORMATION  
Part number  
MB3785APFV  
Package  
Remarks  
48-pin plastic LQFP  
(FPT-48P-M05)  
28  
MB3785A  
PACKAGE DIMENSION  
Note 1) * : These dimensions include resin protrusion.  
Note 2) Pins width and pins thickness include plating thickness.  
Note 3) Pins width do not include tie bar cutting remainder.  
48-pin Plastic LQFP  
(FPT-48P-M05)  
9.00±0.20(.354±.008)SQ  
+0.40  
–0.10  
+.016  
)SQ  
–.004  
*7.00  
(.276  
0.145±0.055  
(.006±.002)  
36  
25  
37  
24  
Details of "A" part  
0.08(.003)  
1.50 +00..1200  
(Mounting height)  
.059 +..000048  
INDEX  
48  
13  
0.10±0.10  
(.004±.004)  
(Stand off)  
"A"  
0˚~8˚  
1
12  
LEAD No.  
0.50(.020)  
0.25(.010)  
0.20±0.05  
0.50±0.20  
(.020±.008)  
M
0.08(.003)  
(.008±.002)  
0.60±0.15  
(.024±.006)  
C
2002 FUJITSU LIMITED F48013S-c-6-10  
Dimensions in mm (inches)  
Note : The values in parentheses are reference values.  
29  
MB3785A  
FUJITSU LIMITED  
All Rights Reserved.  
The contents of this document are subject to change without notice.  
Customers are advised to consult with FUJITSU sales  
representatives before ordering.  
The information, such as descriptions of function and application  
circuit examples, in this document are presented solely for the  
purpose of reference to show examples of operations and uses of  
Fujitsu semiconductor device; Fujitsu does not warrant proper  
operation of the device with respect to use based on such  
information. When you develop equipment incorporating the  
device based on such information, you must assume any  
responsibility arising out of such use of the information. Fujitsu  
assumes no liability for any damages whatsoever arising out of  
the use of the information.  
Any information in this document, including descriptions of  
function and schematic diagrams, shall not be construed as license  
of the use or exercise of any intellectual property right, such as  
patent right or copyright, or any other right of Fujitsu or any third  
party or does Fujitsu warrant non-infringement of any third-party’s  
intellectual property right or other right by using such information.  
Fujitsu assumes no liability for any infringement of the intellectual  
property rights or other rights of third parties which would result  
from the use of information contained herein.  
The products described in this document are designed, developed  
and manufactured as contemplated for general use, including  
without limitation, ordinary industrial use, general office use,  
personal use, and household use, but are not designed, developed  
and manufactured as contemplated (1) for use accompanying fatal  
risks or dangers that, unless extremely high safety is secured, could  
have a serious effect to the public, and could lead directly to death,  
personal injury, severe physical damage or other loss (i.e., nuclear  
reaction control in nuclear facility, aircraft flight control, air traffic  
control, mass transport control, medical life support system, missile  
launch control in weapon system), or (2) for use requiring  
extremely high reliability (i.e., submersible repeater and artificial  
satellite).  
Please note that Fujitsu will not be liable against you and/or any  
third party for any claims or damages arising in connection with  
above-mentioned uses of the products.  
Any semiconductor devices have an inherent chance of failure. You  
must protect against injury, damage or loss from such failures by  
incorporating safety design measures into your facility and  
equipment such as redundancy, fire protection, and prevention of  
over-current levels and other abnormal operating conditions.  
If any products described in this document represent goods or  
technologies subject to certain restrictions on export under the  
Foreign Exchange and Foreign Trade Law of Japan, the prior  
authorization by Japanese government will be required for export  
of those products from Japan.  
F0308  
FUJITSU LIMITED Printed in Japan  

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