AT73C239 [ATMEL]
Power Management for Mobiles (PM); 电源管理对于移动台（PM）的
| 型号： | AT73C239 |
| 厂家： | 
ATMEL |
| 描述： | Power Management for Mobiles (PM) |
| 文件： | 总4页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Main Supply 3.0V to 3.6V
• Independent 2.5V to 3.6V Auxiliary Supply for Backup Section
• Internal State Machine for Startup
• 25 mA/1.8V-2.75V Linear Low Drop Out Regulator with High PSRR and Low Noise
(LDO1)
• 30 mA/1.5V-1.8V Linear Low Drop Out Regulator with High PSRR and Low Noise
(LDO2)
• 60 mA/1.23V-1.5V-1.8V Linear Low Drop Out Regulator with High PSRR (LDO3)
• 2 mA/1.2V-1.5V-1.8V Linear Low Drop Out Regulator with Very Low Quiescent Current
(LDO4)
• HPBG Economic High Performance Voltage Reference for LDO Supply to RF Sections
• LPBG Low Power Voltage Reference to LDO4 During Backup Battery Operation
• Internal Oscillator Generates Internal Master Clock
• Internal Reset Generator for Main Supply
Power
Management for
Mobiles (PM)
• Additional External Reset Input
• Two Wire Interface (TWI) for Independent Activation and Output Voltage Programming
for Each LDO
• Available in 3 x 3 x 0.9 mm 16-pin QFN Package
• Applications: GPS Modules, WLAN Devices, Wireless Modules
AT73C239
4-channel Power
Management for
Wireless
1. Description
The AT73C239 is a 4-channel Power Supply Power Management Unit (PMU) avail-
able in a QFN 3 x 3 mm package. It is a fully integrated, low cost, combined Power
Management device for wireless modules, GPS and WLAN devices. It integrates four
Linear Low Drop Out (LDO) Regulators, three of which provide high-accuracy RF per-
formance and one (LDO4) with very low quiescent current that is supplied by an
external backup battery. A Low Power Bandgap (LPBG) requiring no external capaci-
tor for decoupling, is used as reference voltage for LDO4 and starts when VBAT is
present. LDO4 regulates output voltage with extremely low quiescent current, maxi-
mizing the lifetime of the backup battery. An Internal State Machine manages the
startup of the other LDOs in the order of LDO3 then LDO1 then LDO2. An economic
High Power Bandgap (HPBG) provides highly accurate, low noise voltage reference
to LDOs 1, 2, 3. HPBG operates in switching mode thereby decreasing its current con-
sumption and becomes inactive when not directly supplied by VIN current. When the
RF LDOs are in idle mode, quiescent current is decreased to a minimum.
Modules
Summary
The AT73C239 features a Two-wire Interface (TWI) to increase the efficiency of the
system by disabling LDOs when not needed.
6201AS–PMAAC–24-Oct-05
2. Block Diagram
Figure 2-1. AT73C239 Functional Block Diagram
VDD1
LDO1
VBG
VDD
3.0V-3.6V
HPBG
VOUT
1.8V or 2.75V
GNDA/AVSS
VO1
ILOAD 25 mA
Internal Oscillator
XRESIN
VDD2
LDO2
XRESO
Reset Generator
VDD
3.0V-3.6V
TWCK
TWI
TWD
State Machine
VOUT
1.5V or 1.8V
GNDD
VO2
ILOAD 30 mA
Fuse2
Fuse1
VZAP
VMON
POR1
POR1
LDO3
VDD3
VBAT
LDO4
VDD
VDD
2.5V-3.6V
3.0V-3.6V
VOUT
VOUT
1.2V or 1.5V or 1.8V
1.23V or 1.5V or 1.8V
VO3
VO4
ILOAD 2 mA
LPBG
ILOAD 60 mA
2
AT73C239 Summary
6201AS–PMAAC–24-Oct-05
AT73C239 Summary
Revision History
Doc. Rev
Date
Comments
Change Request Ref.
6201AS
01-Sep-05
First issue
3
6201AS–PMAAC–24-Oct-05
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6201AS–PMAAC–24-Oct-05
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