AOD402_08 [AOS]
N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
| 型号： | AOD402_08 |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 文件： | 总5页 (文件大小：250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOD402
N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
TheꢀAOD402ꢀusesꢀadvancedꢀtrenchꢀtechnologyꢀand
designꢀtoꢀprovideꢀexcellentꢀRDS(ON)ꢀwithꢀlowꢀgate
charge.ꢀThisꢀdeviceꢀisꢀsuitableꢀforꢀuseꢀinꢀPWM,ꢀlaod
switchingꢀandꢀgeneralꢀpurposeꢀapplications.
VDSꢀ(V)ꢀ=ꢀ30V
IDꢀ=ꢀ18ꢀAꢀꢀ(VGSꢀ=ꢀ20V)
RDS(ON)ꢀ<ꢀ15ꢀmΩꢀ(VGSꢀ=ꢀ20V)
RDS(ON)ꢀ<ꢀ18ꢀmΩꢀ(VGSꢀ=ꢀ10V)
RDS(ON)ꢀ<ꢀ44ꢀmΩꢀ(VGSꢀ=ꢀ4.5V)
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 100% UIS Tested!
ꢀꢀꢀꢀꢀꢁRoHSꢀCompliant
ꢀꢀꢀꢀꢀꢁHalogenꢀFree*
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
100% Rg Tested!
TO-252
D-PAK
Bottom View
Top View
D
D
G
S
G
S
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Maximum
Units
DrainꢁSourceꢀVoltage
GateꢁSourceꢀVoltage
VDS
30
±25
18
V
V
VGS
TC=25°C
ContinuousꢀDrain
CurrentꢀG
TC=100°C
ID
12
A
PulsedꢀDrainꢀCurrentꢀC
AvalancheꢀCurrentꢀC
RepetitiveꢀavalancheꢀenergyꢀL=0.1mHꢀC
IDM
IAR
EAR
40
18
A
40
mJ
TC=25°C
PowerꢀDissipationꢀB
TC=100°C
60
PD
W
30
TA=25°C
2.5
PDSM
W
PowerꢀDissipationꢀA
1.6
TA=70°C
JunctionꢀandꢀStorageꢀTemperatureꢀRange
TJ,ꢀTSTG
ꢁ55ꢀtoꢀ175
°C
Thermal Characteristics
Parameter
Symbol
Typ
16.7
40
Max
25
50
Units
°C/W
°C/W
°C/W
MaximumꢀJunctionꢁtoꢁAmbientꢀA
tꢀꢀ≤ꢀ10s
SteadyꢁState
SteadyꢁState
RθJA
MaximumꢀJunctionꢁtoꢁAmbientꢀA
MaximumꢀJunctionꢁtoꢁCaseꢀB
RθJC
1.9
2.5
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD402
Electrical Characteristics (T=25°C unless otherwise noted)
J
Parameter
Conditions
Symbol
Min
Typ
Max Units
STATIC PARAMETERS
ID=250µA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
30
V
VDS=24V, VGS=0V
1
IDSS
Zero Gate Voltage Drain Current
µA
5
TJ=55°C
V
DS=0V, VGS=±25V
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
100
3
nA
V
VDS=VGS, ID=250µA
VGS=10V, VDS=5V
VGS=20V, ID=18A
VGS(th)
ID(ON)
1
2.4
40
A
12
17.4
15
15
21
18
44
mΩ
TJ=125°C
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=18A
VGS=4.5V, ID=6A
VDS=5V, ID=18A
IS=18A, VGS=0V
36
mΩ
S
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
24
0.8
1
V
Maximum Body-Diode Continuous Current
18
A
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
769
185
131
0.7
pF
pF
pF
Ω
VGS=0V, VDS=15V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=10V, ID=18A
SWITCHING PARAMETERS
Qg(10V)
Qgs
Qgd
tD(on)
tr
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
15.9
2.44
4.92
6.2
nC
nC
nC
ns
ns
ns
ns
VGS=10V, VDS=15V, ID=18A,
10.9
16
RL=0.82Ω, RGEN=3Ω
tD(off)
tf
4.8
IF=18A, dI/dt=100A/µs
IF=18A, dI/dt=100A/µs
trr
18
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
ns
Qrr
8.1
nC
A: The value of RθJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any a given application
depends on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev4: Oct 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD402
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
40
30
10V
6V
7V
35
30
25
20
15
10
5
25
20
15
10
5
VDS=5V
5V
125°C
4.5V
VGS=4V
25°C
4.5
3.5V
0
0
2
2.5
3
3.5
4
5
5.5
0
1
2
3
4
5
VGS(Volts)
V
DS (Volts)
Figure 2: Transfer Characteristics
Fig 1: On-Region Characteristics
60
1.8
50
40
30
20
10
0
1.6
1.4
1.2
1
VGS=10V, 18A
VGS=4.5V
VGS=20V,18A
VGS=10V
VGS=20V
0
5
10
15
20
25
30
0.8
0
25
50
75
100
125
150
175
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
60
1.0E+02
1.0E+01
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
50
40
30
20
10
0
ID=18A
125°C
125°C
25°C
25°C
4
8
12
16
20
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
VSD (Volts)
Figure 6: Body-Diode Characteristics
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD402
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1200
10
8
VDS=15V
ID=18A
1000
800
600
400
200
0
Ciss
6
Coss
4
2
Crss
0
0
4
8
12
16
20
0
5
10
15
DS (Volts)
20
25
30
Qg (nC)
V
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
100.0
10.0
1.0
60
50
40
30
20
10
0
TJ(Max)=150°C, TA=25°C
TJ(Max)=150°C
TA=25°C
RDS(ON)
limited
1ms
10ms
0.1s
100µs
1s
10s
DC
10
0.1
0.001
0.01
0.1
1
10
100
1000
0.1
1
100
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.Rθ
JA
RθJA=50°C/W
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD402
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
+
DUT
Vdd
Vgs
VDC
Rg
-
10%
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
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