AOD404_08 [AOS]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
AOD404_08
型号: AOD404_08
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管
文件: 总6页 (文件大小:200K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOD404  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOD404 uses advanced trench technology to  
provide excellent RDS(ON), low gate chargeand low  
gate resistance. This device is ideally suited for use  
as a high side switch in CPU core power conversion.  
VDS (V) = 30V  
ID = 85A (VGS = 10V)  
RDS(ON) < 7m(VGS = 10V)  
RDS(ON) < 8m(VGS = 4.5V)  
-RoHS Compliant  
-Halogen Free*  
UIS TESTED!  
Rg,Ciss,Coss,Crss Tested  
TO-252  
D-PAK  
Bottom View  
Top View  
D
D
G
S
G
S
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
VDS  
30  
V
Gate-Source Voltage  
VGS  
±12  
85  
V
A
TC=25°C G  
TC=100°C B  
Continuous Drain  
Current B,G  
ID  
65  
Pulsed Drain Current  
Avalanche Current C  
Repetitive avalanche energy L=0.1mH C  
IDM  
IAR  
EAR  
200  
30  
A
120  
100  
50  
mJ  
TC=25°C  
PD  
W
Power Dissipation B  
TC=100°C  
TA=25°C  
2.5  
PDSM  
W
Power Dissipation A  
1.6  
TA=70°C  
Junction and Storage Temperature Range TJ, TSTG  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
14.2  
39  
Max  
20  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t ≤ 10s  
RθJA  
Maximum Junction-to-Ambient A  
Steady-State  
Maximum Junction-to-Case C  
50  
Steady-State  
RθJL  
0.8  
1.5  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD404  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
30  
V
V
DS=30V, VGS=0V  
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
5
TJ=55°C  
V
DS=0V, VGS= ±12V  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
100  
2
nA  
V
VDS=VGS ID=250µA  
VGS(th)  
ID(ON)  
1
1.6  
VGS=10V, VDS=5V  
85  
A
V
GS=10V, ID=20A  
5.4  
8.4  
6.6  
90  
7
10.5  
8
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
V
GS=4.5V, ID=20A  
mΩ  
S
VDS=5V, ID=20A  
IS=1A,VGS=0V  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
0.74  
1
V
Maximum Body-Diode Continuous Current  
85  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
2100 2520  
536  
pF  
pF  
pF  
V
GS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
165  
231  
1.2  
VGS=0V, VDS=0V, f=1MHz  
VGS=4.5V, VDS=15V, ID=20A  
0.5  
0.95  
SWITCHING PARAMETERS  
Qg(4.5V) Total Gate Charge  
19.7  
3.6  
7.9  
5.9  
11  
24  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
10  
17  
55  
18  
42  
50  
V
GS=10V, VDS=15V, RL=0.75,  
RGEN=3Ω  
tD(off)  
tf  
36.2  
12  
trr  
IF=20A, dI/dt=100A/µs  
IF=20A, dI/dt=100A/µs  
35  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Qrr  
33  
nC  
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The  
Power dissipation PDSM is based on steady-state R θJA and the maximum allowed junction temperature of 150°C. The value in any a given  
application depends on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB or heatsink allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package  
limit.  
C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA  
curve provides a single pulse rating.  
G. The maximum current rating is limited by the package current capability.  
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).  
Rev 8: Sep 2008  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD404  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
60  
50  
40  
30  
20  
10  
0
60  
50  
40  
30  
20  
10  
0
10V  
3.5V  
VDS=5V  
3V  
125°C  
25°C  
VGS=2.5V  
0
1
2
V
3
4
5
1
1.5  
2
2.5  
3
3.5  
DS (Volts)  
VGS(Volts)  
Fig 1: On-Region Characteristics  
Figure 2: Transfer Characteristics  
7.5  
7
1.8  
1.6  
1.4  
1.2  
1
ID=20A  
VGS=4.5V  
VGS=10V  
6.5  
6
VGS=4.5V  
VGS=10V  
5.5  
5
4.5  
0.8  
0
10  
20  
30  
40  
50  
60  
0
25  
50  
75  
100  
125  
150  
175  
ID (A)  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction  
Temperature  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
20  
16  
12  
8
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
125°C  
ID=20A  
25°C  
125°C  
25°C  
4
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
2
4
6
8
10  
V
SD (Volts)  
VGS (Volts)  
Figure 6: Body-Diode Characteristics  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD404  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
3500  
5
4
3
2
1
0
VDS=15V  
ID=20A  
3000  
2500  
2000  
1500  
1000  
500  
Ciss  
Coss  
Crss  
0
0
5
10  
15  
20  
25  
0
5
10  
15  
VDS (Volts)  
20  
25  
30  
Qg (nC)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000  
100  
10  
100  
80  
60  
40  
20  
0
TJ(Max)=150°C  
TA=25°C  
RDS(ON)  
limited  
10µs  
100µs  
1ms  
10ms  
0.1s  
1s  
10s  
TJ(Max)=150°C  
TA=25°C  
1
DC  
0.1  
0.01  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Ambient (Note F)  
VDS (Volts)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
D=Ton/T  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
TJ,PK=TA+PDM.ZθJA.RθJA  
RθJA=50°C/W  
0.1  
PD  
0.01  
Ton  
10  
T
Single Pulse  
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
100  
1000  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD404  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
120  
100  
80  
60  
40  
20  
0
120  
100  
80  
60  
40  
20  
0
TA=25°C  
L ID  
tA  
=
BV VDD  
0.00001  
0.0001  
Time in avalanche, tA (s)  
Figure 12: Single Pulse Avalanche capability  
0.001  
0.01  
0
25  
50  
75  
TCASE (°C)  
Figure 13: Power De-rating (Note B)  
100  
125  
150  
175  
100  
80  
60  
40  
20  
0
0
25  
50  
75  
TCASE (°C)  
Figure 14: Current De-rating (Note B)  
100  
125  
150  
175  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD404  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
g  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
9
1
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BV  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
V
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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