AOD402L [AOS]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
AOD402L
型号: AOD402L
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管
文件: 总4页 (文件大小:110K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOD402  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOD402 uses advanced trench technology and  
design to provide excellent RDS(ON) with low gate  
charge. This device is suitable for use in PWM, laod  
switching and general purpose applications.  
Standard Product AOD402 is Pb-free (meets ROHS  
& Sony 259 specifications). AOD402L is a Green  
Product ordering option. AOD402 and AOD402L are  
electrically identical.  
VDS (V) = 30V  
ID = 18 A (VGS = 20V)  
RDS(ON) < 15 m(VGS = 20V)  
RDS(ON) < 18 m(VGS = 10V)  
RDS(ON) < 44 m(VGS = 4.5V)  
TO-252  
D-PAK  
D
Top View  
Drain Connected to  
Tab  
G
S
G
D
S
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
30  
V
VGS  
Gate-Source Voltage  
Continuous Drain  
Current G  
±25  
18  
V
A
TC=25°C  
TC=100°C  
ID  
12  
Pulsed Drain Current C  
Avalanche Current C  
Repetitive avalanche energy L=0.1mH C  
IDM  
IAR  
EAR  
40  
18  
A
40  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
60  
PD  
W
30  
TA=25°C  
2.5  
PDSM  
W
Power Dissipation A  
TA=70°C  
1.6  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
16.7  
40  
Max  
25  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t 10s  
RθJA  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
50  
Steady-State  
Steady-State  
RθJC  
1.9  
2.5  
Alpha & Omega Semiconductor, Ltd.  
AOD402  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=250µA, VGS=0V  
30  
V
VDS=24V, VGS=0V  
1
5
IDSS  
Zero Gate Voltage Drain Current  
µA  
TJ=55°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
V
DS=0V, VGS=±25V  
100  
3
nA  
V
VGS(th)  
ID(ON)  
VDS=VGS, ID=250µA  
1
2.4  
VGS=10V, VDS=5V  
40  
A
V
GS=20V, ID=18A  
12  
17.4  
15  
15  
21  
18  
44  
mΩ  
TJ=125°C  
RDS(ON)  
Static Drain-Source On-Resistance  
VGS=10V, ID=18A  
GS=4.5V, ID=6A  
mΩ  
V
36  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
VDS=5V, ID=18A  
IS=18A, VGS=0V  
24  
S
V
A
0.8  
1
Maximum Body-Diode Continuous Current  
18  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
769  
185  
131  
0.7  
pF  
pF  
pF  
VGS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
SWITCHING PARAMETERS  
Qg(10V)  
Qgs  
Qgd  
tD(on)  
tr  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
15.9  
2.44  
4.92  
6.2  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
V
GS=10V, VDS=10V, ID=18A  
VGS=10V, VDS=15V, ID=18A,  
10.9  
16  
RL=0.82, RGEN=3Ω  
tD(off)  
tf  
4.8  
trr  
IF=18A, dI/dt=100A/µs  
IF=18A, dI/dt=100A/µs  
18  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Qrr  
8.1  
nC  
A: The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depend  
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation P is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
D
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.  
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA  
curve provides a single pulse rating.  
G. The maximum current rating is limited by bond-wires. Rev3: August 2005  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
AOD402  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
40  
30  
10V  
6V  
7V  
35  
30  
25  
20  
15  
10  
5
25  
20  
15  
10  
5
VDS=5V  
5V  
125°C  
4.5V  
VGS=4V  
25°C  
3.5V  
0
0
2
2.5  
3
3.5  
4
4.5  
5
5.5  
0
1
2
3
4
5
V
GS(Volts)  
VDS (Volts)  
Figure 2: Transfer Characteristics  
Fig 1: On-Region Characteristics  
60  
1.8  
50  
40  
30  
20  
10  
0
1.6  
1.4  
1.2  
1
VGS=10V, 18A  
VGS=4.5V  
VGS=20V,18A  
VGS=10V  
VGS=20V  
0
5
10  
15  
20  
25  
30  
0.8  
0
25  
50  
75  
100  
125  
150  
175  
ID (A)  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction  
Temperature  
60  
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
50  
40  
30  
20  
10  
0
ID=18A  
125°C  
125°C  
25°C  
25°C  
4
8
12  
16  
20  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
VGS (Volts)  
VSD (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Figure 6: Body-Diode Characteristics  
Alpha & Omega Semiconductor, Ltd.  
AOD402  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
1200  
1000  
10  
VDS=15V  
ID=18A  
8
Ciss  
800  
6
600  
Coss  
4
400  
2
200  
Crss  
0
0
0
4
8
12  
16  
20  
0
5
10  
15  
VDS (Volts)  
20  
25  
30  
Qg (nC)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
100.0  
10.0  
1.0  
60  
50  
40  
30  
20  
10  
0
TJ(Max)=150°C, TA=25°C  
TJ(Max)=150°C  
TA=25°C  
RDS(ON)  
limited  
1ms  
10ms  
0.1s  
100µs  
1s  
10s  
DC  
0.1  
0.001  
0.01  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Ambient (Note F)  
V
DS (Volts)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
J,PK=TA+PDM.ZθJA.RθJA  
RθJA=50°C/W  
T
0.1  
0.01  
PD  
Single Pulse  
Ton  
T
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Alpha & Omega Semiconductor, Ltd.  

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