LM833DR [TI]
DUAL HIGH-SPEED AUDIO OPERATIONAL AMPLIFIER; 双高速音频运算放大器
| 型号： | LM833DR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL HIGH-SPEED AUDIO OPERATIONAL AMPLIFIER |
| 文件： | 总26页 (文件大小：954K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM833
www.ti.com
SLOS481A –JULY 2010–REVISED AUGUST 2010
DUAL HIGH-SPEED AUDIO OPERATIONAL AMPLIFIER
Check for Samples: LM833
1
FEATURES
APPLICATIONS
•
•
•
•
•
HiFi Audio System Equipment
Preamplification and Filtering
Set Top Box
Microphone PreAmplifier Circuit
General-Purpose Amplifier Applications
•
•
•
•
•
•
•
•
•
•
Dual-Supply Operation: ±5 V to ±18 V
Low Noise Voltage: 4.5 nV/√Hz
Low Input Offset Voltage: 0.15 mV
Low Total Harmonic Distortion: 0.002%
High Slew Rate: 7 V/ms
High-Gain Bandwidth Product: 16 MHz
High Open-Loop AC Gain: 800 at 20 kHz
Large Output-Voltage Swing: 14.1 V to –14.6 V
Excellent Gain and Phase Margins
Available in 8-Pin MSOP Package (3mm x
4.9mm x 0.65mm)
D (SOIC), DGK (MSOP), OR P (PDIP) PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
OUT1
IN1–
IN1+
VCC–
VCC+
OUT2
IN2–
IN2+
DESCRIPTION
The LM833 is a dual operational amplifier with high-performance specifications for use in quality audio and
data-signal applications. This device operates over a wide range of single- and dual-supply voltage with low
noise, high-gain bandwidth, and high slew rate. Additional features include low total harmonic distortion, excellent
phase and gain margins, large output voltage swing with no deadband crossover distortions, and symmetrical
sink/source performance.
The dual amplifiers are utilized widely in circuit of audio optimized for all preamp and high level stages in PCM
and HiFi systems. LM833 is pin-for-pin compatible with industry-standard dual operation amplifiers' pin
assignments. With addition of a preamplifier, the gain of the power stage can be greatly reduced to improve
performance.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM833
SLOS481A –JULY 2010–REVISED AUGUST 2010
www.ti.com
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
LM833P
PDIP – P
SOIC – D
Tube of 50
Tube of 75
Reel of 2500
Reel of 2500
Reel of 250
LM833P
LM833D
LM833
RS_
–40°C to 85°C
LM833DR
LM833DGKR
LM833DGKT
VSSOP/MSOP – DGK
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DGK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
Symbol (Each Amplifier)
IN+
IN−
+
−
OUT
Typical Design Example Audio Pre-Amplifier
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SLOS481A –JULY 2010–REVISED AUGUST 2010
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC+
Supply voltage(2)
Supply voltage(2)
18
V
V
VCC–
–18
36
VCC+ – VCC–
Supply voltage
V
Input voltage, either input(2) (3)
Input current(4)
VCC+ or VCC–
±10
V
mA
Duration of output short circuit(5)
Unlimited
97
D package
DGK package
P package
qJA
Package thermal impedance, junction to free air(6) (7)
172 °C/W
85
TJ
Operating virtual junction temperature
Storage temperature range
150
150
°C
°C
Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–
(3) The magnitude of the input voltage must never exceed the magnitude of the supply voltage.
.
(4) Excessive input current will flow if a differential input voltage in excess of approximately 0.6 V is applied between the inputs, unless
some limiting resistance is used.
(5) The output may be shorted to ground or either power supply. Temperature and/or supply voltages must be limited to ensure the
maximum dissipation rating is not exceeded.
(6) Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(7) The package thermal impedance is calculated in accordance with JESD 51-7.
ELECTROSTATIC DISCHARGE RATINGS
MIN
MAX UNIT
Human-Body Model (HBM)
2.5
kV
ESD
Charged-Device Model (CDM)
1.5
RECOMMENDED OPERATING CONDITIONS
MIN
–5
MAX UNIT
VCC–
–18
V
Supply voltage
VCC+
5
18
TA
Operating free-air temperature range
–40
85
°C
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ELECTRICAL CHARACTERISTICS
VCC– = –15 V, VCC+ = 15 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TA = 25°C
0.15
2
3
VIO
aVIO
IIB
Input offset voltage
VO = 0, RS = 10 Ω, VCM = 0
VO = 0, RS = 10 Ω, VCM = 0
VO = 0, VCM = 0
mV
TA = –40°C to 85°C
Input offset voltage
temperature coefficient
TA = –40°C to 85°C
2
mV/°C
TA = 25°C
300
750
800
150
175
Input bias current
Input offset current
nA
TA = –40°C to 85°C
TA = 25°C
25
IIO
VO = 0, VCM = 0
nA
V
TA = –40°C to 85°C
Common-mode input voltage
range
VICR
AVD
ΔVIO = 5 mV, VO = 0
RL ≥ 2 kΩ, VO = ±10 V
±13
±14
110
TA = 25°C
TA = –40°C to 85°C
VOM+
90
85
Large-signal differential
voltage amplification
dB
10.7
–11.9
13.8
RL = 600 Ω
VOM–
VOM+
13.2
VOM
Maximum output voltage swing VID = ±1 V
Common-mode rejection ratio VIN = ±13 V
RL = 2k Ω
V
VOM–
–13.2 –13.7
13.5 14.1
–14 –14.6
VOM+
RL = 10k Ω
VOM–
CMMR
80
80
100
105
29
dB
dB
(1)
kSVR
Supply-voltage rejection ratio
VCC+ = 5 V to 15 V, VCC– = –5 V to –15 V
Source current
15
IOS
Output short-circuit current
|VID| = 1 V, Output to GND
VO = 0
mA
mA
Sink current
–20
–37
2.05
TA = 25°C
2.5
ICC
Supply current (per channel)
TA = –40°C to 85°C
2.75
(1) Measured with VCC± differentially varied at the same time
OPERATING CHARACTERISTICS
VCC– = –15 V, VCC+ = 15 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
5
TYP
7
MAX
UNIT
V/ms
MHz
MHz
SR
Slew rate at unity gain
AVD = 1, VIN = –10 V to 10 V, RL = 2 kΩ, CL = 100 pF
GBW Gain bandwidth product
f = 100 kHz
Open loop
10
16
B1
Unity gain frequency
9
CL = 0 pF
–11
–6
Gm
Gain margin
RL = 2 kΩ
dB
CL = 100 pF
CL = 0 pF
55
Φm
Phase margin
RL = 2 kΩ
deg
CL = 100 pF
40
Amp-to-amp isolation
f = 20 Hz to 20 kHz
–120
120
0.002
37
dB
kHz
%
Power bandwidth
VO = 27 V(PP), RL = 2 kΩ, THD ≤ 1%
THD
zo
Total harmonic distortion
Open-loop output impedance
Differential input resistance
Differential input capacitance
Equivalent input noise voltage
Equivalent input noise current
VO = 3 Vrms, AVD = 1, RL = 2 kΩ, f = 20 Hz to 20 kHz
VO = 0, f = 9 MHz
VCM = 0
Ω
rid
175
12
kΩ
Cid
Vn
In
VCM = 0
pF
f = 1 kHz, RS = 100 Ω
f = 1 kHz
4.5
0.5
nV/√Hz
pA/√Hz
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SLOS481A –JULY 2010–REVISED AUGUST 2010
0.1 µF
100 kΩ
10 Ω
2.0 kΩ
4.7 µF
22 µF
4.3 kΩ
+
1/2
LM833
−
D.U.T.
Scope
x 1
= 1.0 MΩ
R
IN
100 kΩ
Voltage Gain = 50,000
2.2 µF
24.3 kΩ
110 kΩ
0.1 µF
NOTE: All capacitors are non-polarized.
Figure 1. Voltage Noise Test Circuit (0.1 Hz to 10 Hz)
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TYPICAL CHARACTERISTICS
INPUT BIAS CURRENT
INPUT BIAS CURRENT
vs
vs
COMMON-MODE VOLTAGE
SUPPLY VOLTAGE
600
500
400
300
200
100
0
600
500
400
300
200
100
0
VCM = 0 V
TA = 25°C
VCC+ = 15 V
VCC– = –15 V
TA = 25°C
5
6
7
8
9
10 11 12 13 14 15 16 17 18
-15
-10
-5
0
5
10
15
VCC+/–VCC– – Supply Voltage – V
VCM – Common Mode Voltage – V
INPUT BIAS CURRENT
vs
INPUT OFFSET VOLTAGE
vs
TEMPERATURE
TEMPERATURE
1000
900
800
700
600
500
400
300
200
100
0
2
VCC+ = 15 V
VCC+ = 15 V
VCC– = –15 V
VCM = 0 V
VCC– = –15 V
VCM = 0 V
1.5
1
0.5
0
-0.5
-1
-1.5
-2
-55 -35 -15
5
25 45 65 85 105 125
-55 -35 -15
5
25 45 65 85 105 125
TA – Temperature – °C
TA – Temperature – °C
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SLOS481A –JULY 2010–REVISED AUGUST 2010
TYPICAL CHARACTERISTICS (continued)
INPUT COMMON-MODE VOLTAGE
LOW PROXIMITY TO VCC–
vs
INPUT COMMON-MODE VOLTAGE
HIGH PROXIMITY TO VCC+
vs
TEMPERATURE
TEMPERATURE
1.4
0
-0.2
-0.4
-0.6
-0.8
-1
VCC+ = 3 V to 15 V
VCC– = -3 V to -15 V
1.2
1
D
VIO = 5 mV
VO = 0 V
0.8
0.6
0.4
0.2
0
VCC+ = 3 V to 15 V
VCC– = -3 V to -15 V
D
VIO = 5 mV
-1.2
-1.4
VO = 0 V
-55
-25
5
35
65
95
125
-55
-25
5
35
65
95
125
TA – Temperature – °C
TA – Temperature – °C
OUTPUT SATURATION VOLTAGE PROXIMITY TO VCC+
OUTPUT SATURATION VOLTAGE PROXIMITY TO VCC–
vs
vs
LOAD RESISTANCE
LOAD RESISTANCE
10
9
0
-1
TA = 125°C
8
-2
TA = 25°C
7
-3
TA = –55°C
-4
-5
6
5
TA = 125°C
-6
4
TA = 25°C
-7
3
TA = –55°C
-8
2
1
0
-9
-10
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0
0.5
1
1.5
2
2.5
3
3.5
kW
4
4.5
kW
RL – Load Resistance –
RL – Load Resistance –
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TYPICAL CHARACTERISTICS (continued)
OUTPUT SHORT-CIRCUIT CURRENT
SUPPLY CURRENT
vs
vs
TEMPERATURE
TEMPERATURE
70
60
50
40
30
20
10
10
9
8
7
6
5
4
3
2
1
0
VCC+ = 15 V
VCC– = –15 V
VID = 1 V
VCM = 0 V
RL = High Impedance
VO = 0 V
VCC± = ±15 V
Source
Sink
VCC± = ±10 V
VCC± = ±5 V
-55 -35 -15
5
25
45
65
85 105 125
-55 -35 -15
5
25 45 65 85 105 125
TA – Temperature – °C
TA – Temperature – °C
CMRR
vs
PSSR
vs
FREQUENCY
FREQUENCY
120
110
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VCC+ = 15 V
VCC+ = 15 V
VCC– = –15 V
VCM = 0 V
VCC– = –15 V
TA = 25°C
DVCM = ±1.5 V
TA = 25°C
T3P
T3N
100
1k
10k
100k
1M
10M
100
1k 1M
10k 100k 10M
f – Frequency – Hz
f – Frequency – Hz
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SLOS481A –JULY 2010–REVISED AUGUST 2010
TYPICAL CHARACTERISTICS (continued)
GAIN BANDWIDTH PRODUCT
GAIN BANDWIDTH PRODUCT
vs
vs
SUPPLY VOLTAGE
TEMPERATURE
30
25
20
15
10
5
30
25
20
15
10
5
0
0
-55 -35 -15
5
25
45
65
85 105 125
5
6
7
8
9 10 11 12 13 14 15 16 17 18
TA – Temperature – °C
VCC+/–VCC– – Supply Voltage – V
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
FREQUENCY
20
15
10
5
30
25
20
15
10
5
VCC+ = 15 V
VCC– = –15 V
RL = 2 kW
AV = 1
RL = 10 kW
RL = 2 kW
THD < 1%
TA = 25°C
0
-5
RL = 10 kW
RL = 2 kW
-10
-15
-20
0
10
100
1k
10k
100k
1M
10M
5
6
7
8
9
10 11 12 13 14 15 16 17 18
VCC+/–VCC– – Supply Voltage – V
f – Frequency – Hz
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TYPICAL CHARACTERISTICS (continued)
OPEN-LOOP GAIN
OPEN-LOOP GAIN
vs
vs
SUPPLY VOLTAGE
TEMPERATURE
120
115
110
105
100
95
110
105
100
95
RL = 2 kW
f < 10 Hz
DVO = 2/3(VCC+ – VCC–
)
TA = 25°C
90
90
RL = 2 kW
f < 10 Hz
DVO = 2/3(VCC+ – VCC–
85
)
85
TA = 25°C
80
80
5
6
7
8
9 10 11 12 13 14 15 16 17 18
-55 -35 -15
5
25 45 65 85 105 125
VCC+/–VCC– – Supply Voltage – V
TA – Temperature – °C
OUTPUT IMPEDANCE
vs
CROSSTALK REJECTION
vs
FREQUENCY
FREQUENCY
200
190
180
170
160
150
140
130
120
110
100
50
45
40
35
30
25
20
15
10
5
Drive Channel
VCC+ = 15 V
VCC– = –15 V
VO = 1 Vrms
TA = 25°C
VCC+ = 15 V
VCC– = –15 V
RL = 2 kW
VO = 20 VPP
TA = 25°C
AV = 1000
AV = 10
AV = 1
AV = 100
0
10
100
1k
10k
100k
1k
10k
100k
1M
10M
f – Frequency – Hz
f – Frequency – Hz
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TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION
vs
vs
FREQUENCY
OUTPUT VOLTAGE
1
1
VCC+ = 15 V
VCC– = –15 V
VO = 1 Vrms
AV = 1
AV = 1000
0.1
RL = 2 kW
TA = 25°C
0.1
AV = 100
0.01
0.001
0.01
AV = 10
0.001
0.0001
VCC+ = 15 V
VCC– = –15 V
f = 2 kHz
AV = 1
RL = 2 kW
TA = 25°C
0.0001
10
100
1k
10k
100k
0
1
2
3
4
5
6
7
8
9
f – Frequency – Hz
VO – Output Voltage – Vrms
SLEW RATE
vs
SLEW RATE
vs
SUPPLY VOLTAGE
TEMPERATURE
10
9
10
9
8
Falling Edge
8
Falling Edge
7
7
6
5
4
3
2
Rising Edge
Rising Edge
6
5
VCC+ = 15 V
4
DVIN = 2/3(VCC+ – VCC–
)
VCC– = –15 V
DVIN = 20 V
AV = 1
AV = 1
3
RL = 2 kW
TA = 25°C
RL = 2 kW
2
5
6
7
8
9
10 11 12 13 14 15 16 17 18
-55 -35 -15
5
25
45
65
85 105 125
VCC+/–VCC– – Supply Voltage – V
TA – Temperature – °C
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TYPICAL CHARACTERISTICS (continued)
GAIN AND PHASE
GAIN AND PHASE MARGIN
vs
vs
FREQUENCY
OUTPUT LOAD CAPACITANCE
12
9
0
80
70
60
50
40
30
20
10
0
0
VCC+ = 15 V
Phase
Gain,TA = 125°C
VCC– = –15 V
VO = 0 V
10
20
30
40
50
60
70
80
Gain,TA = 25°C
Gain,TA = –55°C
-45
-90
-135
-180
Gain
6
Phase,TA = 125°C
3
Phase,TA = 25°C
Phase,TA = –55°C
VCC+ = 15 V
VCC– = –15 V
RL = 2 kW
TA = 25°C
0
1
10
100
1000
1k
10k
100k
1M
10M
Cout – Output Load Capacitance – pF
f – Frequency – Hz
OVERSHOOT
vs
INPUT VOLTAGE AND CURRENT NOISE
vs
OUTPUT LOAD CAPACITANCE
FREQUENCY
100
10
1
10
100
VCC+ = 15 V
VCC– = –15 V
VCC+ = 15 V
VCC– = –15 V
TA = 25°C
90
80
70
60
50
40
30
20
10
0
VIN = 100 mVPP
1
Input Voltage Noise
Input Current Noise
TA = 125°C
TA = 25°C
TA = –55°C
0.1
10
100
Cout – Output Load Capacitance – pF
1000
10
100
1k
10k
100k
f – Frequency – Hz
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TYPICAL CHARACTERISTICS (continued)
INPUT REFERRED NOISE VOLTAGE
GAIN AND PHASE MARGIN
vs
vs
SOURCE RESISTANCE
DIFFERENTIAL SOURCE RESISTANCE
16
14
12
10
8
64
60
56
52
48
44
40
36
32
28
24
20
16
12
8
1000
VCC+ = 15 V
VCC– = –15 V
f = 1 Hz
TA = 25°C
Phase Margin
100
10
1
Gain Margin
6
VCC+ = 15 V
VCC– = –15 V
AV = 100
4
VO = 0 V
2
TA = 25°C
4
0
0
10
100
1k
10k
100k
1M
0
1
10
100
1k
10k 100k
W
RS – Source Resistance –
W
RSD – Differential Source Resistance –
LARGE SIGNAL TRANSIENT RESPONSE
(AV = 1)
LARGE SIGNAL TRANSIENT RESPONSE
(AV = –1)
Input
Input
55
10
55
45
35
25
15
5
10
45
35
25
15
5
0
0
-10
-20
-30
-40
-50
-60
-10
VCC+ = 15 V
VCC+ = 15 V
VCC– = –15 V
AV = 1
VCC– = –15 V
AV = –1
-20
-30
-40
-50
-60
RL = 2 kW
CL = 100 pF
TA = 25°C
RL = 2 kW
CL = 100 pF
TA = 25°C
Output
Output
-5
-5
-15
-15
-2
2
6
10
14
18
22
-2
2
6
10
14
18
22
Time – µs
Time – µs
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TYPICAL CHARACTERISTICS (continued)
SMALL SIGNAL TRANSIENT RESPONSE
LOW_FREQUENCY NOISE
0.6
0.5
0.4
0.3
0.2
0.1
0
0.2
400
300
200
100
0
0.1
0.0
Input
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
VCC+ = 15 V
VCC– = –15 V
AV = 1
-100
-200
-300
-400
-500
RL = 2 kW
CL = 100 pF
TA = 25°C
T3
VCC+ = 15 V
VCC– = –15 V
Output
BW = 0.1 Hz to 10 Hz
TA = 25°C
-0.1
-0.2
-5 -4 -3 -2 -1
0
1
2
3
4
5
-0.5
0.0
0.5
1.0
1.5
Time – s
Time – µs
14
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Product Folder Link(s): LM833
LM833
www.ti.com
SLOS481A –JULY 2010–REVISED AUGUST 2010
APPLICATION INFORMATION
Output Characteristics
All operating characteristics are specified with 100-pF load capacitance. The LM833 can drive higher capacitance
loads. However, as the load capacitance increases, the resulting response pole occurs at lower frequencies,
causing ringing, peaking, or oscillation. The value of the load capacitance at which oscillation occurs varies from
lot to lot. If an application appears to be sensitive to oscillation due to load capacitance, adding a small
resistance in series with the load should alleviate the problem (see Figure 2).
PULSE RESPONSE
PULSE RESPONSE
PULSE RESPONSE
(RL = 600 Ω, CL = 380 pF)
(RL = 2 kΩ, CL = 560 pF)
(RL = 10 kΩ, CL = 590 pF)
Maximum capacitance
before oscillation = 380 pF
Maximum capacitance
before oscillation = 590 pF
Maximum capacitance
before oscillation = 560 pF
250 ns per Division
250 ns per Division
250 ns per Division
PULSE RESPONSE
PULSE RESPONSE
PULSE RESPONSE
(RO = 0 Ω, CO = 1000 pF, RL = 2 kΩ)
(RO = 4 Ω, CO = 1000 pF, RL = 2 kΩ)
(RO = 35 Ω, CO = 1000 pF, RL = 2 kΩ)
250 ns per Division
250 ns per Division
250 ns per Division
15 V
RO
VO
5 V
–5 V
–15 V
CL
RL = 2 kΩ
Figure 2. Output Characteristics
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LM833
SLOS481A –JULY 2010–REVISED AUGUST 2010
www.ti.com
REVISION HISTORY
Changes from Original (July 2010) to Revision A
Page
•
Changed Datasheet status from Product Preview to Production Data. ................................................................................ 1
16
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Product Folder Link(s): LM833
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jul-2013
PACKAGING INFORMATION
Orderable Device
LM833D
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
ACTIVE
SOIC
VSSOP
VSSOP
SOIC
D
8
8
8
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
LM833
LM833DGKR
LM833DGKT
LM833DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DGK
DGK
D
2500
250
2500
50
Green (RoHS
& no Sb/Br)
-40 to 85
RSU
Green (RoHS
& no Sb/Br)
-40 to 85
RSU
Green (RoHS
& no Sb/Br)
-40 to 85
LM833
LM833P
LM833P
PDIP
P
Pb-Free
(RoHS)
-40 to 85
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jul-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM833DGKR
LM833DGKT
LM833DR
VSSOP
VSSOP
SOIC
DGK
DGK
D
8
8
8
8
2500
250
330.0
180.0
330.0
330.0
12.4
12.4
12.4
12.4
5.3
5.3
6.4
6.4
3.3
3.3
5.2
5.2
1.3
1.3
2.1
2.1
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
2500
2500
LM833DR
SOIC
D
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM833DGKR
LM833DGKT
LM833DR
VSSOP
VSSOP
SOIC
DGK
DGK
D
8
8
8
8
2500
250
346.0
203.0
367.0
340.5
346.0
203.0
367.0
338.1
35.0
35.0
35.0
20.6
2500
2500
LM833DR
SOIC
D
Pack Materials-Page 2
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