M6MGB641S8AKT [RENESAS]
M6MGB641S8AKT;型号: | M6MGB641S8AKT |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | M6MGB641S8AKT |
文件: | 总3页 (文件大小:115K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Renesas LSIs
M6MGB/T641S8AKT
67,108,864-BIT (4,194,304-WORD BY 16-BIT / 8,388,608-WORD BY 8-BIT) CMOS
FLASH MEMORY &
8,388,608-BIT (524,288-WORD BY 16-BIT / 1,048,576-WORD BY 8BIT) CMOS SRAM
Stacked- mMCP (micro Multi Chip Package)
DESCRIPTION
The M6MGB/T641S8AKT is a Stacked micro Multi Chip
Package (S- m MCP) that contents 64M-bit Flash memory
and 8M-bit Static RAM and are available in a 52-pin TSOP
for lead free use.
The M6MGB/T641S8AKT is suitable for a high performance
cellular phone and a mobile PC that are required to be small
mounting area, weight and small power dissipation.
FEATURES
64M-bit Flash memory is a 4,194,304 words / 8,388,608
bytes single power supply and high performance non-
volatile memory fabricated by CMOS technology for the
peripheral circuit and DINOR IV (Divided bit-line NOR IV)
architecture for the memory cell. All memory blocks are
Access time
Flash
SRAM
70ns (Max.)
85ns (Max.)
Supply voltage
VCC = 2.7 ~ 3.0V
locked and can not be programmed or erased, when F-WP# Ambient temperature
is Low. Using Software Lock Release function, program or
erase operation can be executed.
Ta=-40 ~ 85 °C
Package
52pin TSOP(Type-II), Lead pitch 0.4mm
Outer-lead finishing : Sn-Cu
8M-bit SRAM is a 524,288 words / 1,048576 bytes
asynchronous SRAM fabricated by CMOS technology for
the peripheral circuit and CMOS type transistor for the
memory cell.
APPLICATION
Mobile communication products
PIN CONFIGURATION (TOP VIEW)
A15
A14
A13
A12
A11
A10
A9
A16
1
2
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
BYTE#
S-UB#
GND
S-LB#
DQ15/A-1
DQ7
3
4
5
6
7
A8
DQ14
DQ6
8
A19
9
DQ13
DQ5
S-CE1#
WE#
F-RP#
F-WP#
S-VCC
S-CE2
A21
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
DQ12
DQ4
M6MGB/T641S8AKT
F-VCC
DQ11
DQ3
DQ10
DQ2
A20
A18
DQ9
A17
DQ1
A7
DQ8
A6
DQ0
A5
A4
OE#
GND
F-CE#
A0
A3
A2
A1
10.49 mm
Outline 52PTJ-A
F-VCC
S-VCC
GND
A-1-A18
A19-A21
DQ0-DQ15
F-CE#
S-CE#,S-CE2
OE#
:Vcc for Flash
:Vcc for SRAM
WE#
:Flash/SRAM Write Enable
:Flash Write Protect
:Flash Reset Power Down
:Flash/SRAM Byte Enable
:SRAM Lower Byte
F-WP#
F-RP#
BYTE#
S-LB#
S-UB#
:GND for Flash/SRAM
:Flash/SRAM common Address
:Address for Flash
:Data I/O
:Flash Chip Enable
:SRAM Chip Enable
:Flash/SRAM Output Enable
:SRAM Upper Byte
Rev.1.0_48a_bebz
1
Renesas LSIs
M6MGB/T641S8AKT
67,108,864-BIT (4,194,304-WORD BY 16-BIT / 8,388,608-WORD BY 8-BIT) CMOS
FLASH MEMORY &
8,388,608-BIT (524,288-WORD BY 16-BIT / 1,048,576-WORD BY 8BIT) CMOS SRAM
Stacked-
m
MCP (micro Multi Chip Package)
MCP Block Diagram
F-Vcc
GND
1)
A0 to A21
1)
A0 to A21
F-CE#
F-WP#
F-RP#
BYTE#
64Mbit DINOR
Flash Memory
1)
S-Vcc
DQ0 to DQ15
1)
A0 to A18
WE#
8Mbit
SRAM
OE#
S-UB#
S-LB#
S-CE1#
S-CE2
Note 1): In case of x8 organization, A-1 is added, and only Lower Byte data(DQ0 to DQ7) are assigned to I/O and
Upper Byte data(DQ8 to DQ15) are High-Z.
Note 2): In the data sheet there are “VCC”s which mean “F-VCC” or "S-VCC". In the SRAM part there are “UB#” and
“LB#” which mean “S-UB#” and “S-UB#”, respectively.
Capacitance
Limits
Typ.
Symbol
Parameter
Conditions
Unit
Min.
Max.
18
Input
capacitance
CIN
Ta=25°C,
f=1MHz,
Vin=Vout=0V
pF
pF
A21-A0, OE#, WE#, F-CE#, BYTE#, F-RP#,
F-WP#, S-CE1#, S-CE2, S-UB#, S-LB#
Output
Capacitance
COUT
DQ15-DQ0
22
Rev.1.0_48a_bebz
2
Renesas LSIs
M6MGB/T641S8AKT
67,108,864-BIT (4,194,304-WORD BY 16-BIT / 8,388,608-WORD BY 8-BIT) CMOS
FLASH MEMORY &
8,388,608-BIT (524,288-WORD BY 16-BIT / 1,048,576-WORD BY 8BIT) CMOS SRAM
Stacked- mMCP (micro Multi Chip Package)
Nippon Bldg.,6-2,Otemachi 2-chome,Chiyoda-ku,Tokyo,100-0004 Japan
Keep safety first in your circuit designs!
·
Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to
personal injury, fire or property damage.Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable
material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
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·
These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual
property rights, or any other rights, belonging to Renesas Technology Corporation or a third party.
Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application
examples contained in these materials.
All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by
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Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology
Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular,
medical, aerospace, nuclear, or undersea repeater use.
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The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials.
If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved
destination.
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Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.
REJ03C0052
© 2003 Renesas Technology Corp.
New publication, effective April 2003.
Rev.1.0_48a_bebz
3
Specifications subject to change without notice
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