M6MGD13TW34DWG [RENESAS]

134,217,728-BIT (8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY & 33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS MOBILE RAM; 134217728位（ 8,388,608 - WORD 16位） CMOS FLASH MEMORY和33554432位（ 2,097,152 - WORD 16位） CMOS RAM中移动


型号：	M6MGD13TW34DWG
厂家：	RENESAS TECHNOLOGY CORP
描述：	134,217,728-BIT (8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY & 33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS MOBILE RAM 134217728位（ 8,388,608 - WORD 16位） CMOS FLASH MEMORY和33554432位（ 2,097,152 - WORD 16位） CMOS RAM中移动
文件：	总3页 (文件大小：126K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

RENESAS LSIs

M6MGD13TW34DWG

134,217,728-BIT (8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY &

33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS MOBILE RAM

Stacked-CSP ( Chip Scale Package)

Description

The M6MGD13TW34DWG is suitable for a high performance

cellular phone and a mobile PC that are required to be small

mounting area, weight and small power dissipation.

The M6MGD13TW34DWG is a Stacked Chip Scale Package

(S-CSP) that contents 128M-bit Flash memory and 32M-bit

Mobile RAM in a 72-pin Stacked CSP for lead free use.

128M-bit Flash memory is a 8,388,608 words, single power

supply and high performance non-volatile memory fabricated

by CMOS technology for the peripheral circuit and DINOR IV

(Divided bit-line NOR IV) architecture for the memory cell. All

memory blocks are locked and can not be programmed or

erased, when F-WP# is Low. Using Software Lock Release

function, program or erase operation can be executed.

Features

Access Time

Flash

70ns (Max.)

Mobile RAM

80ns (Max.)

Supply Voltage

FM-VCC=2.7 ~ 3.0V

Ta= -40 ~ 85 degree

72pin S-CSP,

Ambient Temperature

Package

32M-bit Mobile RAM is a 2,097,152 words high density RAM

fabricated by CMOS technology for the peripheral circuit and

DRAM cell for the memory array. The interface is compatible

to an asynchronous SRAM.

Ball pitch 0.80mm

Outer-ball:Sn-Ag-Cu

The cells are automatically refreshed and the refresh control

is not required for system. The device also has the partial

block refresh scheme and the power down mode by writing

the command.

Application

Mobile communication products

PIN CONFIGURATION (TOP VIEW)

INDEX(Laser Marking)

F-

WE#

M-

F-

GND

A16 A20

A18

A17

LB#

WP#

F-

RP#

F-

RY/BY#

M-

UB#

A19

DQ11

A11

A15

A14

A13

A12

M-

OE#

F-

A21

A10

DQ9

DQ8

DQ0

DQ1

F-

CE1#

DQ12 DQ13 DQ15

DQ10

DQ2

M-

WE#

GND

DQ6

F-

OE#

DQ4

DQ5

DQ14 GND

FM-

VCC

F-

CE2#

M-

CE#

DQ3

DQ7

(Top View)

8.5 mm

FM-VCC

GND

: VCC for Flash / Mobile RAM

: GND for Flash / Mobile RAM

F-RP#

F-WP#

: Reset power down for Flash

: Write protect for Flash

A0-A20

F-A21

: Common address for Flash/Mobile RAM

: Address for Flash

F-RY/BY# : Flash Memory Ready /Busy

M-CE#

: Mobile RAM chip enable

DQ0-DQ15 : Data I/O

M-OE#

M-WE#

M-LB#

M-UB#

: Output enable for Mobile RAM

: Write enable for Mobile RAM

: Lower byte control for Mobile RAM

: Upper byte control for Mobile RAM

: Non Connection

F-CE1#

F-CE2#

F-OE#

: Flash chip enable 1

: Flash chip enable 2

: Output enable for Flash Memory

: Write enable for Flash Memory

F-WE#

: Don’t Use

Rev.1.0.48a_bezc

RENESAS LSIs

M6MGD13TW34DWG

134,217,728-BIT (8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY &

33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS MOBILE RAM

Stacked-CSP ( Chip Scale Package)

MCP Block Diagram

FM-Vcc GND

F-RY/BY#

A0 to F-A21

128Mbit DINOR IV

Flash Memory

F-CE1#

F-CE2#

F-WP#

F-RP#

F-WE#

F-OE#

DQ0 to DQ15

A0 to A20

M-WE#

M-OE#

M-UB#

M-LB#

M-CE#

32Mbit

Mobile RAM

Note: In the 128M-bit DINOR(IV) Flash Memory lower 64Mbit is selected by F-CE1#=“L” and upper 64Mbit is done

by F-CE2#=“L”. Never select each chip at the same time.

In the data sheet there are “VCC”s which mean “FM-VCC” (Common Vcc for Flash / Mobile RAM).

In the Flash Memory part they mean A21, OE# and WE# are F-A21, F-OE# and F-WE#.

In the Mobile RAM part UB# , LB#, OE# and WE# are M-UB# , M-LB#, M-OE# and M-WE#, respectively.

Capacitance

Limits

Typ.

Symbol

Parameter

Conditions

Unit

Min.

Max.

F-A21-A0, F-OE#, F-WE#, F-CE1#,

F-CE2#, F-WP#, F-RP#, M-OE#,

M-WE#, M-CE#, M-LB#, M-UB#

Input

capacitance

CIN

Ta=25°C, f=1MHz,

Vin=Vout=0V

Output

Capacitance

COUT

DQ15-DQ0, F-RY/BY#

Rev.1.0.48a_bezc

RENESAS LSIs

M6MGD13TW34DWG

134,217,728-BIT (8,388,608-WORD BY 16-BIT) CMOS FLASH MEMORY &

33,554,432-BIT (2,097,152-WORD BY 16-BIT) CMOS MOBILE RAM

Stacked-CSP ( Chip Scale Package)

Nippon Bldg.,6-2,Otemachi 2-chome,Chiyoda-ku,Tokyo,100-0004 Japan

Keep safety first in your circuit designs!

Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to

personal injury, fire or property damage.Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable

material or (iii) prevention against any malfunction or mishap.

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property rights, or any other rights, belonging to Renesas Technology Corporation or a third party.

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Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.

REJ03C0123

c 2003 Renesas Technology Corp.

New publication, effective Sep.2003.

Specifications subject to change without notice

Rev.1.0.48a_bezc

M6MGD13TW34DWG [RENESAS]

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