M6MGB64BS8BWG-P [RENESAS]

SPECIALTY MEMORY CIRCUIT, PBGA67, 0.80 MM PITCH, STACKED, CSP-67;


型号：	M6MGB64BS8BWG-P
厂家：	RENESAS TECHNOLOGY CORP
描述：	SPECIALTY MEMORY CIRCUIT, PBGA67, 0.80 MM PITCH, STACKED, CSP-67 静态存储器内存集成电路
文件：	总3页 (文件大小：45K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Renesas LSIs

Preliminary

Notice: This is not a final specification.

Some parametric limits are subject to change.

M6MGB/T64BS8BWG-P

67,108,864-BIT (4,194,304-WORD BY 16-BIT) CMOS FLASH MEMORY

8,388,608-BIT (524,288-WORD BY 16-BIT) CMOS SRAM

Stacked-CSP (Chip Scale Package)

Description

The M6MGB/T64BS8BWG-P is suitable for a high

performance cellular phone and a mobile PC that are

required to be small mounting area, weight and small power

dissipation.

The M6MGB/T64BS8BWG-P is a Stacked Chip Scale

Package (S-CSP) that contents 64M-bit Flash memory and

8M-bit SRAM in a 67-pin Stacked CSP with leaded solder

ball.

64M-bit Flash memory is a 4,194,304 words, single power

supply and high performance non-volatile memory fabricated

by CMOS technology for the peripheral circuit and DINOR IV

(Divided bit-line NOR IV) architecture for the memory cell. All

memory blocks are locked and can not be programmed or

erased, when F-WP# is Low. Using Software Lock Release

function, program or erase operation can be executed.

Features

Access Time

Flash

SRAM

70ns (Max.)

85ns (Max.)

F-VCC =S-VCC=2.7 ~ 3.0V

Ta= -40 ~ 85 degree

67pin S-CSP,

Supply Voltage

Ambient Temperature

Package

Ball pitch 0.80mm

Outer-ball: Sn - Pb

8M-bit SRAM is a 524,288 words asynchronous SRAM

fabricated by CMOS technology for the peripheral circuit and

TFT type transistor for the memory cell.

Application

Mobile communication products

PIN CONFIGURATION (TOP VIEW)

INDEX(Laser Marking)

S-

LB#

F-

WP#

S-

GND

F-

WE#

A16

A20

A11

A18

A17

F-

RY/BY#

S-

UB#

F-

RP#

A19

S-

OE#

A10

A15

A14

A21

DQ11

F-

CE#

DQ13 DQ15

DQ9

DQ8

DQ0

DQ12

A13

A12

S-

CE2

S-

WE#

F-

GND

DQ10

DQ2

DQ6

F-

OE#

F-

GND

S-

VCC

DQ4

DQ5

DQ14

DQ7

S-

CE1#

F-

VCC

DQ1

DQ3

(Top View)

8.5 mm

F-VCC

: VCC for Flash Memory

: VCC for SRAM

F-OE#

:Output enable for Flash

:Output enable for SRAM

:Write enable for Flash

:Write enable for SRAM

:Write protect for Flash

:Reset power down for Flash

:Flash Ready/Busy

:Lower byte control for SRAM

:Upper byte control for SRAM

:Non Connection

S-VCC

F-GND

S-GND

A0-A18

A19-A21

DQ0-DQ15

F-CE#

S-OE#

F-WE#

S-WE#

F-WP#

F-RP#

F-RY/BY#

S-LB#

S-UB#

: GND for Flash Memory

: GND for SRAM

: Common address for Flash/SRAM

: Address for Flash

: Data I/O

: Flash chip enable

: SRAM chip enable1

: SRAM chip enable2

S-CE1#

S-CE2

Rev.0.1.48a_bebz

Renesas LSIs

Preliminary

Notice: This is not a final specification.

Some parametric limits are subject to change.

M6MGB/T64BS8BWG-P

67,108,864-BIT (4,194,304-WORD BY 16-BIT) CMOS FLASH MEMORY

8,388,608-BIT (524,288-WORD BY 16-BIT) CMOS SRAM

Stacked-CSP (Chip Scale Package)

MCP Block Diagram

F-Vcc

F-GND

F-RY/BY#

A0 to A21

64Mbit DINOR IV

Flash Memory

F-CE#

F-WP#

F-RP#

F-WE#

F-OE#

S-Vcc

S-GND

DQ0 to DQ15

A0 to A18

S-WE#

S-OE#

S-UB#

S-LB#

S-CE1#

S-CE2

8Mbit

SRAM

Note: In the Flash memory part there are “Vcc”, “GND”, “OE#” and “WE#” which mean “F-Vcc”, “F-GND”, “F-OE#” and

“F-WE#”, respectively. In the SRAM part there are “GND”, “UB#”, “LB#”, “OE#” and “WE#” which mean “S-GND”, “S-

UB#”, “S-LB#”, “S-OE#” and “S-WE#”, respectively.

Capacitance

Limits

Typ.

Symbol

Parameter

Conditions

Unit

Min.

Max.

A21-A0, F-OE#, F-WE#, F-CE#, F-WP#, F-

RP#, S-CE1#, S-CE2, S-OE#, S-WE#, S-

LB#, S-UB#

Input

capacitance

CIN

Ta=25°C, f=1MHz,

Vin=Vout=0V

Output

Capacitance

COUT

DQ15-DQ0, F-RY/BY#

Rev.0.1.48a_bebz

Renesas LSIs

Preliminary

Notice: This is not a final specification.

Some parametric limits are subject to change.

M6MGB/T64BS8BWG-P

67,108,864-BIT (4,194,304-WORD BY 16-BIT) CMOS FLASH MEMORY

8,388,608-BIT (524,288-WORD BY 16-BIT) CMOS SRAM

Stacked-CSP (Chip Scale Package)

Nippon Bldg.,6-2,Otemachi 2-chome,Chiyoda-ku,Tokyo,100-0004 Japan

Keep safety first in your circuit designs!

Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to

personal injury, fire or property damage.Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable

material or (iii) prevention against any malfunction or mishap.

Notes regarding these materials

These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual

property rights, or any other rights, belonging to Renesas Technology Corporation or a third party.

Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application

examples contained in these materials.

All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by

Renesas Technology Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology

Corporation product distributor for the latest product information before purchasing a product listed herein.

The information described here may contain technical inaccuracies or typographical errors.

Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.

Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com).

When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision

on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein.

Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology

Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular,

medical, aerospace, nuclear, or undersea repeater use.

The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials.

If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved

destination.

Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.

Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.

REJ03C0218

New publication, effective April 2003.

Specifications subject to change without notice

Rev.0.1.48a_bebz

M6MGB64BS8BWG-P [RENESAS]

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