MSM9202-01GS-BK [OKI]
Fluorescent Display Controller, 16 X 35 Dots, CMOS, PQFP64, 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64;
| 型号： | MSM9202-01GS-BK |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | Fluorescent Display Controller, 16 X 35 Dots, CMOS, PQFP64, 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 驱动器 显示控制器 |
| 文件： | 总33页 (文件大小：343K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FEDL9202-04
This version: Sep. 2000
Previous version: Feb. 1999
¡ Semiconductor
MSM9202-01
5 ¥ 7 Dot Character ¥ 16-Digit Display Controller/Driver with Character RAM
GENERAL DESCRIPTION
The MSM9202-01 is a dot matrix vacuum fluorescent display tube controller driver IC which
displays characters, numerics and symbols.
Dot matrix vacuum fluorescent display tube drive signals are generated by serial data sent from
a micro-controller. A display system is easily realized by internal ROM and RAM for character
display.
FEATURES
• Logic power supply and vacuum fluorescent display tube drive power supply (V
)
DD
: 3.3 V±10% or 5.0 V±10%
• Fluorescent display tube drive power supply (V
• VFD driver output current
)
FL
: –20 to –60 V
(VFD driver output can be connected directly to the fluorescent display tube. No pull-down
resistor is required.)
- Segment driver (SEG1 to SEG35)
- Segment driver (AD1 and AD2)
- Grid driver (COM1 to COM16)
• General output port output current
- Output driver (P1 and P2)
: –6 mA
: –15 mA
: –30 mA
(V =–60V)
FL
(V =–60V)
FL
(V =–60V)
FL
: ±1 mA (V =3.3V±10%)
DD
±2 mA (V =5.0V±10%)
DD
• Content of display
- CGROM
- CGRAM
- ADRAM
- DCRAM
- General output port
• Display control function
- Display digit
5¥7 dots
: 248 types (character data)
: 8 types (character data)
5¥7 dots
16 (display digit) ¥2 bits (symbol data)
16 (display digit) ¥8 bits (register for character data display)
2 bits (static operation)
: 9 to 16 digits
- Display duty (contrast adjustment)
- All lights ON/OFF
: 8 stages
• 3 interfaces with microcontroller
• 1-byte instruction execution (excluding data write to RAM)
: DA, CS, CP (4 interfaces when RESET is added)
• Built-in oscillation circuit (external R and C)
• Package options:
64-pin plastic QFP (QFP64-P-1414-0.80-BK) (Product name : MSM9202-01GS-BK)
64-pin plastic SSOP (SSOP64-P-525-0.80-K) (Product name : MSM9202-01GS-K)
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FEDL9202-04
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¡ Semiconductor
BLOCK DIAGRAM
VDD
GND
VFL
SEG1
DCRAM
16w 8b
CGROM
248w¥35b
¥
Segment
Driver
CGRAM
RESET
8w¥35b
SEG35
AD1
DA
CP
CS
8bit
ADRAM
16w¥2b
Shift
AD
Driver
Register
AD2
Address
Selector
Command
Decoder
Write
Address
Counter
Read
Address
Counter
P1
Port
Driver
Control
Circuit
P2
COM1
Digit
Control
Grid
Driver
Duty
Control
COM16
Timing
Timing
Generator 1
Generator 2
OSC0
OSC1
Oscillator
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¡ Semiconductor
INPUT AND OUTPUT CONFIGURATION
Schematic Diagrams of Logic Portion Input and Output Circuits
Input Pin
VDD
VDD
INPUT
GND
GND
Output Pin
VDD
VDD
OUTPUT
GND
GND
Schematic Diagram of Driver Output Circuit
VDD
VDD
OUTPUT
VFL
VFL
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¡ Semiconductor
PIN CONFIGURATION (TOP VIEW)
SEG5
SEG6
1
2
3
4
5
6
7
8
9
48 VFL
47 COM16
46 COM15
45 COM14
44 COM13
43 COM12
42 COM11
41 COM10
40 COM9
39 COM8
38 COM7
37 COM6
36 COM5
35 COM4
34 COM3
33 COM2
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14 10
SEG15 11
SEG16 12
SEG17 13
SEG18 14
SEG19 15
SEG20 16
NC: No connection
64-Pin Plastic QFP
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¡ Semiconductor
P1
1
2
3
4
5
6
7
8
9
64 VDD
P2
AD2
63 DA
62 CP
61 CS
60 RESET
59 OSC1
58 OSC0
57 GND
AD1
SEG1
SEG2
SEG3
SEG4
SEG5
56 VFL
SEG6 10
SEG7 11
SEG8 12
SEG9 13
SEG10 14
SEG11 15
SEG12 16
SEG13 17
SEG14 18
SEG15 19
SEG16 20
SEG17 21
55 COM16
54 COM15
53 COM14
52 COM13
51 COM12
50 COM11
49 COM10
48 COM9
47 COM8
46 COM7
45 COM6
44 COM5
22
23
24
43
42
41
SEG18
SEG19
SEG20
COM4
COM3
COM2
SEG21 25
SEG22 26
SEG23 27
SEG24 28
SEG25 29
SEG26 30
SEG27 31
40 COM1
39 SEG35
38 SEG34
37 SEG33
36 SEG32
35 SEG31
34 SEG30
SEG28
SEG29
32
33
64-Pin Plastic SSOP
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¡ Semiconductor
PIN DESCRIPTION
Pin
Symbol Type Connects to
Description
QFP SSOP
Fluorescent Fluorescent display tube anode electrode drive output.
tube anode Directly connected to fluorescent display tube and a pull-down
1 to 31,
61 to 64
5 to 39 SEG1 to 35
O
O
O
O
electrode
resistor is not necessary. IOH>–6 mA
Fluorescent Fluorescent display tube grid electrode drive output.
32 to 47 40 to 55 COM1 to 16
tube grid
electrode
Directly connected to fluorescent display tube and a pull-down
resistor is not necessary. IOH>–30 mA
Fluorescent Fluorescent display tube anode electrode drive output.
tube anode Directly connected to fluorescent display tube and a pull-down
59, 60 3, 4 AD1, AD2
electrode
resistor is not necessary. IOH>–15 mA
LED drive
control
pins
General port output.
Output of these pins in static operation, so these pins can drive
the LED.
57, 58 1, 2
P1, P2
56
49
48
64
57
56
VDD
GND
VFL
V
V
DD-GND are power supplies for internal logic.
DD-VFL are power supplies for driving fluorescent tubes.
Power
supply
—
Apply VFL after VDD is applied.
Micro-
controller
Serial data input (positive logic).
Input from LSB.
55
54
53
63
62
61
DA
CP
CS
I
I
I
Micro-
controller
Shift clock input.
Serial data is shifted on the rising edge of CP.
Micro-
controller
Chip select input.
Serial data transfer is disabled when CS pin is "H" level.
Reset input.
"Low" initializes all the functions.
Initial status is as follows.
• Address of each RAM
• Data of each RAM
• Display digit
• Contrast adjusment
• All lights ON or OFF
• All outputs
address "00"H
Content is undefined
16 digits
8/16
OFF mode
Micro-
controller
or
52
60
RESET
I
C2, R2
"Low" level
RESET
(Circuit when R and C are
connected externally)
See Application Circuit.
C2
R2
External RC pin for RC oscillation.
Connect R and C externally. The RC time constant depends on the
VDD voltage used. Set the target oscillation frequency to 2 MHz.
50
51
58
59
OSC0
OSC1
I
C1, R1
OSC0
OSC1
(RC oscillation circuit)
See Application Circuit.
R1
C1
O
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¡ Semiconductor
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage (1)
Supply Voltage (2)
Input Voltage
Symbol
VDD
Condition
Rating
–0.3 to 6.5
–80 to VDD+0.3
–0.3 to VDD+0.3
541
Unit
—
—
—
V
V
V
VFL
VIN
QFP
Power Dissipation
PD
Ta≥25°C
mW
°C
SSOP
590
Storage Temperature
TSTG
IO1
—
–55 to 150
–40 to 0.0
–20 to 0.0
–10 to 0.0
–4.0 to 4.0
COM1 to COM16
AD1, AD2
IO2
Output Current
mA
IO3
SEG1 to SEG35
P1, P2
IO4
RECOMMENDED OPERATING CONDITIONS-1
When the power supply voltage is 5V (typ.)
Parameter
Supply Voltage (1)
Supply Voltage (2)
High Level Input Voltage
Low Level Input Voltage
CP Frequency
Symbol
VDD
VFL
Condition
Min.
4.5
Typ.
5.0
—
Max.
5.5
Unit
V
—
—
–60
–20
—
V
VIH
All input pins excluding OSC0 pin 0.7VDD
—
V
VIL
All input pins excluding OSC0 pin
—
—
—
—
0.3VDD
2.0
V
fC
—
MHz
MHz
Hz
°C
Oscillation Frequency
Frame Frequency
fOSC
fFR
R1=3.3kW, C1=47pF
1.5
183
–40
2.0
244
—
2.5
DIGIT=1 to 16, R =3.3kW, C =47pF
305
85
1
1
Operating Temperature
Top
—
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¡ Semiconductor
RECOMMENDED OPERATING CONDITIONS-2
When the power supply voltage is 3.3V (typ.)
Parameter
Supply Voltage (1)
Supply Voltage (2)
High Level Input Voltage
Low Level Input Voltage
CP Frequency
Symbol
VDD
VFL
Condition
Min.
3.0
Typ.
3.3
—
Max.
3.6
Unit
V
—
—
–60
–20
—
V
VIH
All input pins excluding OSC0 pin 0.8VDD
—
V
VIL
All input pins excluding OSC0 pin
—
—
—
0.2VDD
2.0
V
fC
—
R1=3.3kW, C1=39pF
DIGIT=1 to 16, R1=3.3kW, C1=39pF
—
—
MHz
MHz
Hz
°C
Oscillation Frequency
Frame Frequency
fOSC
fFR
1.5
183
–40
2.0
244
—
2.5
305
85
Operating Temperature
Top
ELECTRICAL CHARACTERISTICS
DC Characteristics-1
(VDD=5.0V 10ꢀ, VFL=–60V, Ta=–40 to +85°C, unless otherwise specified)
Parameter
Symbol
Applied pin
CS, CP, DA,
RESET
Condition
Min.
Max.
Unit
High Level Input Voltage
—
0.7VDD
—
V
VIH
CS, CP, DA,
RESET
Low Level Input Voltage
High Level Input Current
Low Level Input Current
—
—
0.3VDD
1.0
V
VIL
IIH
IIL
CS, CP, DA,
RESET
VIH=VDD
VIL=0.0V
–1.0
–1.0
µA
µA
CS, CP, DA,
RESET
1.0
VOH1
VOH2
VOH3
VOH4
COM1 to 16
AD1, AD2
SEG1 to 35
P1, P2
IOH1=–30mA
IOH2=–15mA
IOH3=–6mA
IOH4=–2mA
VDD–1.5
VDD–1.5
VDD–1.5
VDD–1.0
—
—
—
—
V
V
V
V
High Level Output
Voltage
COM1 to 16
AD1, AD2
SEG1 to 35
P1, P2
Low Level Output
Voltage
VOL1
VOL2
IDD1
—
—
—
—
VFL+1.0
V
V
I
OL1=2mA
1.0
4
Duty=15/16
Digit=1 to 16
All output lights ON
Duty=8/16
mA
fOSC
=
2MHz,
VDD
Current Consumption
no load
Digit=1 to 9
IDD2
—
3
mA
All output lights OFF
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¡ Semiconductor
DC Characteristics-2
(VDD=3.3V 10ꢀ, VFL=–60V, Ta=–40 to +85°C, unless otherwise specified)
Parameter
Symbol
Applied pin
CS, CP, DA,
RESET
Condition
Min.
Max.
Unit
High Level Input Voltage
—
0.8VDD
—
V
VIH
VIL
IIH
IIL
CS, CP, DA,
RESET
Low Level Input Voltage
High Level Input Current
Low Level Input Current
—
—
0.2VDD
1.0
V
CS, CP, DA,
RESET
VIH=VDD
VIL=0.0V
–1.0
–1.0
µA
µA
CS, CP, DA,
RESET
1.0
VOH1
VOH2
VOH3
VOH4
COM1 to 16
AD1, AD2
SEG1 to 35
P1, P2
IOH1=–30mA
IOH2=–15mA
IOH3=–6mA
IOH4=–1mA
VDD–1.5
VDD–1.5
VDD–1.5
VDD–1.0
—
—
—
—
V
V
V
V
High Level Output
Voltage
COM1 to 16
AD1, AD2
SEG1 to 35
P1, P2
Low Level Output
Voltage
VOL1
VOL2
IDD1
—
—
—
—
VFL+1.0
V
V
I
OL1=1mA
1.0
3
Duty=15/16
Digit=1 to 16
All output lights ON
Duty=8/16
mA
fOSC
=
2MHz,
VDD
Current Consumption
no load
Digit=1 to 9
IDD2
—
2
mA
All output lights OFF
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MSM9202-01
¡ Semiconductor
AC Characteristics-1
(VDD=5.0V 10ꢀ, VFL=–60V, Ta=–40 to +85°C, unless otherwise specified)
Parameter
CP Frequency
Symbol
fC
Condition
Min.
—
Max.
2.0
—
Unit
MHz
ns
—
CP Pulse Width
DA Setup Time
DA Hold Time
tCW
—
250
250
250
250
16
tDS
—
—
ns
tDH
—
—
ns
CS Setup Time
CS Hold Time
tCSS
tCSH
tCSW
tDOFF
—
—
ns
R1=3.3kW, C1=47pF
—
—
ms
CS Wait Time
250
8
—
ns
Data Processing Time
R1=3.3kW, C1=47pF
—
ms
When RESET signal is input from
RESET Pulse Width
tWRES
250
250
—
—
ns
ns
microcontroller etc. externally
When RESET signal is input from
microcontroller etc. externally
RESET Time
tRSON
R2=1.0kW, C2=0.1mF
—
250
—
200
—
ms
ns
DA Wait Time
tRSOFF
tR
—
2.0
2.0
100
—
ms
ms
ms
ms
tR=20ꢀ to 80ꢀ
Cl=100pF
All Output Slew Rate
tF
—
tF=80ꢀ to 20ꢀ
VDD Rise Time
VDD Off Time
tPRZ
tPOF
When mounted in the unit
—
When mounted in the unit, VDD=0.0V
5.0
AC Characteristics-2
(VDD=3.3V 10ꢀ, VFL=–60V, Ta=–40 to +85°C, unless otherwise specified)
Parameter
CP Frequency
Symbol
fC
Condition
Min.
—
Max.
2.0
—
Unit
MHz
ns
—
CP Pulse Width
DA Setup Time
DA Hold Time
tCW
—
250
250
250
250
16
tDS
—
—
ns
tDH
—
—
ns
CS Setup Time
CS Hold Time
tCSS
tCSH
tCSW
tDOFF
—
—
ns
R1=3.3kW, C1=39pF
—
—
ms
CS Wait Time
250
8
—
ns
Data Processing Time
R1=3.3kW, C1=39pF
—
ms
When RESET signal is input from
RESET Pulse Width
tWRES
250
250
—
—
ns
ns
microcontroller etc. externally
When RESET signal is input from
microcontroller etc. externally
RESET Time
tRSON
R2=1.0kW, C2=0.1mF
—
250
—
200
—
ms
ns
DA Wait Time
tRSOFF
tR
—
2.0
2.0
100
—
ms
ms
ms
ms
tR=20ꢀ to 80ꢀ
Cl=100pF
All Output Slew Rate
tF
—
tF=80ꢀ to 20ꢀ
VDD Rise Time
VDD Off Time
tPRZ
tPOF
When mounted in the unit
—
When mounted in the unit, VDD=0.0V
5.0
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¡ Semiconductor
TIMING DIAGRAM
Symbol
VDD=3.3V±±10
0.8 VDD
VDD=5.1V±±10
0.7 VDD
VIH
VIL
0.2 VDD
0.3 VDD
• Data Timing
tCSS
tCSW
VIH
VIL
CS
CP
DA
tCSH
fC
tCW tCW
VIH
VIL
tDOFF
tDH
tDS
VIH
VIL
VALID VALID
VALID VALID
• Reset Timing
0.8 VDD
0.0 V
tPRZ
tRSON
VDD
When input externally
tWRES
tPOF
VIH
0.5 VDD
VIL
tRSOFF
tRSOFF
RESET
DA
When external
R and C are
connected
VIH
VIL
• Output Timing
tR
tF
0.8 VDD
0.2 VFL
All outputs
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¡ Semiconductor
• Digit Output Timing (for 16-digit display, at a duty of 15/16)
T=8/ fOSC
Frame cycle
Display timing
Blank timing
t1=1024T (t1=4.096 ms when fosc=2.0 MHz)
t2=60T (t2=240 ms when fosc=2.0 MHz)
VDD
VFL
t3=4T
(t3=16 ms when fosc=2.0 MHz)
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
VDD
VFL
AD1, 2
SEG1-35
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¡ Semiconductor
FUNCTIONAL DESCRIPTION
Commands List
1st byte
2nd byte
LSB
MSB LSB
MSB
Command
B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4 B5 B6 B7
1
2
DCRAM data write
X0 X1 X2 X3
1
0
0
0
C0 C1 C2 C3 C4 C5 C6 C7
C0 C5 C10 C15 C20 C25 C30
2nd byte
3rd byte
4th byte
5th byte
6th byte
*
*
*
*
*
*
C1 C6 C11 C16 C21 C26 C31
CGRAM data write
X0 X1 X2
*
0
1
0
0
C2 C7 C12 C17 C22 C27 C32
C3 C8 C13 C18 C23 C28 C33
C4 C9 C14 C19 C24 C29 C34
3
4
5
6
7
ADRAM data write
General output port set
Display duty set
Number of digits set
All lights ON/OFF
Test mode
X0 X1 X2 X3
1
0
1
0
1
1
0
0
1
1
0
1
1
1
1
0
0
0
0
0
C0 C1
*
*
*
*
*
P1 P2
*
*
*
*
: Don't care
Xn : Address specification for each RAM
*
D0 D1 D2
K0 K1 K2
Cn : Character code specification for each RAM
Pn : General output port status specification
Dn : Display duty specification
L
H
*
*
Kn : Number of digits specification
H
L
: All lights ON instruction
: All lights OFF instruction
When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously,
addresses are internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data
for the 2nd and later bytes.
Note: The test mode is used for inspection before shipment.
It is not a user function.
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¡ Semiconductor
Positional Relationship Between SEGn and ADn (one digit)
C0 AD1
C1 AD2
ADRAM written data.
Corresponds to 2nd byte
C0
C1
C2
C3
C4
SEG1 SEG2 SEG3 SEG4 SEG5
C5 C6 C7 C8 C9
SEG6 SEG7 SEG8 SEG9 SEG10
C10
C11
C12
C13
C14
SEG11 SEG12
SEG13
SEG14
SEG15
C15
C16
C17
C18
C19
SEG16
SEG17
SEG18
SEG19
SEG20
C20
C21
C22
C23
C24
SEG21 SEG22 SEG23 SEG24 SEG25
C25
C26
C27
C28
C29
SEG26
SEG27
SEG28
SEG29
SEG30
C30
C31
C32
C33
C34
SEG31 SEG32 SEG33 SEG34 SEG35
CGRAM written data. Corresponds to 2nd byte
CGRAM written data. Corresponds to 3rd byte
CGRAM written data. Corresponds to 4th byte
CGRAM written data. Corresponds to 6th byte
CGRAM written data. Corresponds to 5th byte
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¡ Semiconductor
Data Transfer Method and Command Write Method
Display control command and data are written by an 8-bit serial transfer.
Write timing is shown in the figure below.
Setting the CS pin to "Low" level enables a data transfer.
Data is 8 bits and is sequentially input into the DA pin from LSB (LSB first).
As shown in the figure below, data is read by the shift register at the rising edge of the shift clock,
which is input into the CP pin. If 8-bit data is input, internal load signals are automatically
generated and data is written to each register and RAM.
Therefore it is not necessary to input load signals from the outside.
Setting the CS pin to "High" disables data transfer. Data input from the point when the CS pin
changes from "High" to "Low" is recognized in 8-bit units.
tDOFF
tCSH
CS
CP
B0 B1 B2 B3 B4 B5 B6 B7
LSB MSB
B0 B1 B2 B3 B4 B5 B6 B7
LSB MSB
B0 B1 B2 B3 B4 B5 B6 B7
LSB MSB
DA
1st byte
2nd byte
2nd byte
Character code data of the
next address
When data is written to DCRAM* Command and address data
Character code data
*
When data is written to RAM (DCRAM, ADRAM, CGRAM) continuously, addresses are
internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later
bytes.
Reset Function
Reset is executed when the RESET pin is set to "L", (when turning power on, for example) and
initializes all functions.
Initial status is as follows.
• Address of each RAM .................. address "00"H
• Data of each RAM ........................ All contents are undefined
• General output port ..................... All general output ports go "Low"
• Display digit.................................. 16 digits
• Contrast adjustment..................... 8/16
• All display lights ON or OFF ..... OFF mode
• Segment output ............................ All segment outputs go "Low"
• AD output ..................................... All AD outputs go "Low"
Please set again according to "Setting Flowchart" after reset.
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¡ Semiconductor
Description of Commands and Functions
1. DCRAM data write
(Specifies the address of DCRAM and writes the character code of CGROM and CGRAM.)
DCRAM (Data Control RAM) has a 4-bit address to store character code of CGROM and
CGRAM.
The character code specified by DCRAM is converted to a 5¥7 dot matrix character pattern via
CGROM or CGRAM.
(The DCRAM can store 16 characters.)
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
X0 X1 X2 X3
1
0
0
0
: selects DCRAM data write mode and specifies DCRAM
address
(Ex: Specifies DCRAM address 0H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C1 C2 C3 C4 C5 C6 C7
2nd byte
(2nd)
: specifies character code of CGROM and CGRAM
(written into DCRAM address 0H)
To specify the character code of CGROM and CGRAM continuously to the next address, specify
only character code as follows.
The addresses of DCRAM are automatically incremented. Specification of an address is
unnecessary.
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LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(3rd)
C0 C1 C2 C3 C4 C5 C6 C7 : specifies character code of CGROM and CGRAM
(written into DCRAM address 1H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C1 C2 C3 C4 C5 C6 C7
2nd byte
(4th)
: specifies character code of CGROM and CGRAM
(written into DCRAM address 2H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(17th)
C0 C1 C2 C3 C4 C5 C6 C7 : specifies character code of CGROM and CGRAM
(written into DCRAM address FH)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C1 C2 C3 C4 C5 C6 C7
2nd byte
(18th)
: specifies character code of CGROM and CGRAM
(DCRAM address 0H is rewritten)
X0 (LSB) to X3 (MSB): DCRAM addresses (4 bits: 16 characters)
C0 (LSB) to C7 (MSB): Character code of CGROM and CGRAM (8 bits: 256 characters)
[COM positions and set DCRAM addresses]
COM
HEX X1 X± X2 X3
position
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
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2. CGRAM data write
(Specifies the addresses of CGRAM and writes character pattern data.)
CGRAM (Character Generator RAM) has a 3-bit address to store 5¥7 dot matrix character
patterns.
A character pattern stored in CGRAM can be displayed by specifying the character code
(address) by DCRAM.
The address of CGRAM is assigned to 00H to 07H. (All the other addresses are the CGROM
addresses.)
(The CGRAM can store 8 types of character patterns.)
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
: selects CGRAM data write mode and specifies
CGRAM address.
X0 X1 X2
*
0
1
0
0
(Ex: specifies CGRAM address 00H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
: specifies 1st column data
(rewritten into CGRAM address 00H)
C0 C5 C10 C15 C20 C25 C30
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
3rd byte
(3rd)
: specifies 2nd column data
(rewritten into CGRAM address 00H)
C1 C6 C11 C16 C21 C26 C31
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
4th byte
(4th)
: specifies 3rd column data
(rewritten into CGRAM address 00H)
C2 C7 C12 C17 C22 C27 C32
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
5th byte
(5th)
: specifies 4th column data
(rewritten into CGRAM address 00H)
C3 C8 C13 C18 C23 C28 C33
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
6th byte
(6th)
: specifies 5th column data
(rewritten into CGRAM address 00H)
C4 C9 C14 C19 C24 C29 C34
*
Tospecifycharacterpatterndatacontinuouslytothenextaddress, specifyonlycharacterpattern
data as follows.
The addresses of CGRAM are automatically incremented. Specification of an address is
therefore unnecessary.
The 2nd to 6th byte (character pattern data) are regarded as one data item, so 300 ns is sufficient
for t
time between bytes.
DOFF
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LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(7th)
:
:
specifies 1st column data
(rewritten into CGRAM address 01H)
C0 C5 C10 C15 C20 C25 C30
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
6th byte
(11th)
specifies 5th column data
(rewritten into CGRAM address 01H)
C4 C9 C14 C19 C24 C29 C34
*
X0 (LSB) to X2 (MSB): CGRAM addresses (3 bits: 8 characters)
C0 (LSB) to C34 (MSB): Character pattern data (35 bits: 35 outputs per digit)
* : Don't care
[CGROM addresses and set CGRAM addresses]
Refer to ROMCODE table
CGROM
HEX X1 X± X2
address
00
01
02
03
04
05
06
07
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
RAM00(00000000B)
RAM01(00000001B)
RAM02(00000010B)
RAM03(00000011B)
RAM04(00000100B)
RAM05(00000101B)
RAM06(00000110B)
RAM07(00000111B)
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Positional relationship between the output area of CGROM and that of CGRAM
C0
C5
C1
C6
C2
C7
C3
C8
C4
C9
C10 C11 C12 C13 C14
C15 C16 C17 C18 C19
C20 C21 C22 C23 C24
C25 C26 C27 C28 C29
C30 C31 C32 C33 C34
area that corresponds to 2nd byte (1st column)
area that corresponds to 3rd byte (2nd column)
area that corresponds to 6th byte (5th column)
area that corresponds to 5th byte (4th column)
area that corresponds to 4th byte (3rd column)
Note: CGROM (Character Generator ROM) has an 8-bit address to generate 5¥7 dot matrix
character patterns.
CGRAM can store 248 types of character patterns.
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3. ADRAM data write
(specifies address of ADRAM and writes symbol data)
ADRAM (Additional Data RAM) has a 2-bit address to store symbol data.
Symbol data specified by ADRAM is directly output without CGROM and CGRAM.
(The ADRAM can store 2 types of symbol patterns for each digit.)
The terminal to which the contents of ADRAM are output can be used as a cursor.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
: selects ADRAM data write mode and specifies ADRAM
address
X0 X1 X2 X3
1
1
0
0
(Ex: specifies ADRAM address 0H)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C1
2nd byte
(2nd)
: sets symbol data
(written into ADRAM address 0H)
*
*
*
*
*
*
To specify symbol data continuously to the next address, specify only symbol data as follows.
The address of ADRAM is automatically incremented. Specification of addresses is therefore
unnecessary.
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(3rd)
: sets symbol data
(written into ADRAM address 1H)
C0 C1
*
*
*
*
*
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(4th)
: sets symbol data
(written into ADRAM address 2H)
C0 C1
*
*
*
*
*
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(17th)
: sets symbol data
(written into ADRAM address FH)
C0 C1
*
*
*
*
*
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
C0 C1
2nd byte
(18th)
: sets symbol data
(ADRAM address 0H is rewritten.)
*
*
*
*
*
*
X0 (LSB) to X3 (MSB): ADRAM addresses (4 bits: 16 characters)
C0 (LSB) to C1 (MSB): Symbol data (2 bits: 2-symbol data per digit)
* : Don't care
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[COM positions and ADRAM addresses]
COM
position
COM1
HEX X1 X± X2 X3
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
4. General output port set
(specifies the general output port status)
The general output port is an output for 2-bit static operation.
It is used to control other I/O devices and turn on LED. (static operation)
When at the "High" level, this output becomes the V voltage, and when at the "Low" level,
DD
it becomes the ground potential. Therefore, the fluorescent display tube cannot be driven.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
P1 P2
1st byte
: selects a general output port and specifies
the output status
*
*
0
0
1
0
P1, P2 : general output port
* : don't care
[Set data and set state of general output port]
P1
0
P2
0
Display state of general output port
Sets P1 and P2 to low
(The state when power is applied or when RESET is input.)
1
0
Sets P1 to high and P2 to low
Sets P1 to low and P2 to high
Sets P1 and P2 to high
0
1
1
1
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5. Display duty set
(writes display duty value to duty cycle register)
Display duty adjusts contrast in 8 stages using 3-bit data.
When power is turned on or when the RESET signal is input, the duty cycle register value is
"0". Always execute this instruction before turning the display on, then set a desired duty
value.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
D0 D1 D2
1st byte
: selects display duty set mode and sets duty value
*
1
0
1
0
D0 (LSB) to D2 (MSB) : display duty data (3 bits: 8 stages)
* : don't care
[Relation between setup data and controlled COM duty]
HEX
0
D0 D1 D2
COM duty
8/16
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
¨(The state when power is turned on or when RESET
signal is input.)
1
9/16
2
10/16
11/16
12/16
13/16
14/16
15/16
3
4
5
6
7
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6. Number of digits set
(writes the number of display digits to the display digit register)
The number of digits set can display 9 to 16 digits using 3-bit data.
When power is turned on or when a RESET signal is input, the number of digit register value
is "0". Always execute this instruction to change the number of digits before turning the
dispaly on.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
K0 K1 K2
1st byte
: selects the number of digit set mode and specifies
the number of digit value
*
0
1
1
0
K0 (LSB) to K2 (MSB) : number of digit data (3 bits: 8 digits)
* : don't care
[Relation between setup data and controlled COM]
Number of digits
HEX K1 K± K2
of COM
0
1
2
3
4
5
6
7
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
COM1-16
COM1-9
¨(The state when power is turned on or when RESET
signal is input.)
COM1-10
COM1-11
COM1-12
COM1-13
COM1-14
COM1-15
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7. All display lights ON/OFF set
(turns all dispaly lights ON or OFF)
All display lights ON is used primarily for display testing.
All display lights OFF is primarily used for display blink and to prevent malfunction when
power is turned on.
This command cannot control the general output port.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
: selects all display lights ON or OFF mode
L
H
1
1
1
0
* *
L: sets all lights OFF
H: sets all lights ON
*: Don't care
[Set data and display state of SEG and AD]
L
0
1
0
1
H
0
0
1
1
Display state of SEG and AD
Normal display
Sets all outputs to Low
Sets all outputs to High
Sets all outputs to High
(The state when power is applied or when RESET is input.)
(All lights ON mode has priority.)
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Setting Flowchart
(Power applying included)
Apply VDD
Apply VFL
All display lights OFF
General output port setting
Number of digits setting
Display duty setting
Status of all outputs by RESET
signal input
Select a RAM to be used
DCRAM
CGRAM
ADRAM
Data write mode
(with address setting)
Data write mode
Data write mode
(with address setting)
(with address setting)
Address is automatically
incremented
Address is automatically
incremented
Address is automatically
incremented
DCRAM
CGRAM
ADRAM
Character code
Character code
Character code
DCRAM
Is character code
write ended?
CGRAM
Is character code
write ended?
ADRAM
Is character code
write ended?
NO
NO
NO
YES
YES
YES
YES
Another RAM to
be set?
NO
Releases all display lights
OFF mode
Display operation mode
End
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Power-off Flowchart
Display operation mode
Turn off VFL
Turn off VDD
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APPLICATION CIRCUIT
Heater Transformer
5¥7-dot matrix fluorescent display tube
ANODE
ANODE
GRID
(SEGMENT) (SEGMENT) (DIGIT)
VDD
VDD
2
35
16
R2
C2
VDD
VDD AD1, 2
SEG1-35 COM1-16
RESET
R4
Micro-
controller
LED
VDD
C3
MSM9202-01
CS
CP
DA
2
Output Port
GND
P1, 2
NPN Tr
GND VFL
OSC0 OSC1
R1
GND
C1
R3
GND
VFL
C4
GND
ZD
Notes: 1. The V
value depends on the power supply voltage of the microcontroller used.
DD
Adjust the values of the constants R , R , R , C , and C to the power supply voltage
1
2
4
1
2
used.
2. The V value depends on the fluorescent display tube used. Adjust the values of the
FL
constants R and ZD to the power supply voltage used.
3
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Reference data
The figure below shows the relationship between the V voltage and the output current of each
FL
driver.
Take care that the total power consumption to be used does not exceed the power dissipation.
VFL Voltage-Output Current of Each Driver
(mA)
–30
COM1 to COM16
(Condition: VOH=VDD–1.5 V)
–25
–20
–15
–10
–5
AD1 and AD2
(Condition: VOH=VDD–1.5 V)
SEG1 to SEG35
(Condition: VOH=VDD–1.5 V)
0
–10
–20
–30
–40
–50
–60 (V)
VFL Voltage (VDD-n
)
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MSM9202-01 ROM Code
00000000B (00H) to 00000111B (07H) are the CGRAM addresses.
MSB
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
LSB
0000 RAM0
0001 RAM1
0010 RAM2
0011 RAM3
0100 RAM4
0101 RAM5
0110 RAM6
0111 RAM7
1000
1001
1010
1011
1100
1101
1110
1111
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PACKAGE DIMENSIONS
QFP64-P-1414-0.80-BK
(Unit : mm)
Package material
Lead frame material
Pin treatment
Package weight (g)
Rev. No./Last Revised
Epoxy resin
42 alloy
Solder plating (≥5 mm)
0.87 TYP.
5/Sep. 21, 1999
Oki Electric Industry Co., Ltd.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
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(Unit : mm)
SSOP64-P-525-0.80-K
Mirror finish
6
Package material
Lead frame material
Pin treatment
Package weight (g)
Rev. No./Last Revised
Epoxy resin
42 alloy
Solder plating (≥5 mm)
1.34 TYP.
3/Dec. 5, 1996
Oki Electric Industry Co., Ltd.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
32/33
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¡ Semiconductor
NOTICE
1.
The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.
2.
The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.
3.
4.
When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.
Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.
5.
6.
Neither indemnity against nor license of a third party’s industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party’s right which may result from the use thereof.
The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.
7.
Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
thelegalityofexportoftheseproductsandwilltakeappropriateandnecessarystepsattheir
own expense for these.
8.
9.
No part of the contents contained herein may be reprinted or reproduced without our prior
permission.
MS-DOS is a registered trademark of Microsoft Corporation.
Copyright 2000 Oki Electric Industry Co., Ltd.
Printed in Japan
33/33
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