TEA1211HN [NXP]
High efficiency auto-up/down DC/DC converter; 高效率的自动上/下DC / DC变换器
| 型号： | TEA1211HN |
| 厂家： | 
NXP |
| 描述： | High efficiency auto-up/down DC/DC converter |
| 文件： | 总23页 (文件大小：125K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TEA1211HN
High efficiency auto-up/down
DC/DC converter
Preliminary specification
2003 Oct 13
Supersedes data of 2003 Aug 06
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
CONTENTS
8
LIMITING VALUES
9
THERMAL CHARACTERISTICS
CHARACTERISTICS
1
2
3
4
5
6
7
FEATURES
10
11
11.1
APPLICATIONS
APPLICATION INFORMATION
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
Typical Li-Ion, 2- or 3-cell application with
I2C-bus programming
Component selection
Inductor
Capacitors
Schottky diodes
11.2
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
FUNCTIONAL DESCRIPTION
7.1
7.2
7.2.1
7.2.2
7.2.3
7.3
7.4
7.5
7.6
7.7
Introduction
Control mechanism
PWM
Feedback resistors
Current Limiter
12
PACKAGE OUTLINE
SOLDERING
PFM
13
Switching sequence
Adjustable output voltage
Start-up
Under voltage lockout
Shut-down
Power switches
Synchronous rectification
PWM-only mode
External synchronisation
Current limiter
I2C-bus serial interface
Characteristics of the I2C-bus
START and STOP conditions
Bit transfer
13.1
Introduction to soldering surface mount
packages
Reflow soldering
Wave soldering
Manual soldering
13.2
13.3
13.4
13.5
7.8
7.9
Suitability of surface mount IC packages for
wave and reflow soldering methods
7.10
7.11
7.12
7.12.1
7.12.2
7.12.3
7.12.4
7.13
7.13.1
7.13.2
7.13.3
14
15
16
17
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
PURCHASE OF PHILIPS I2C COMPONENTS
Acknowledge
I2C-bus protocol
Addressing
Data
Write Cycle
2003 Oct 13
2
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
1
FEATURES
• I2C-bus programmable output voltage range of
1.5 V to 5.5 V
• Single inductor topology
• High efficiency up to 94 % over wide load range
• Wide input range; functional from 2.55 V up to 5.5 V
• 1.7 A maximum input and output current
• Low quiescent power consumption
3
GENERAL DESCRIPTION
The TEA1211HN is a fully integrated auto-up/down
DC/DC converter circuit with I2C-bus interface. Efficient,
compact and dynamic power conversion is achieved using
a digitally controlled pulse width and frequency modulation
like control concept, four integrated low RDS(on) power
switches with low parasitic capacitances and fully
synchronous rectification.
• 600 kHz switching frequency
• Four integrated very low RDS(on) power MOSFETs
• Synchronizable to external clock
• Externally adjustable current limit for protection and
efficient battery use in case of dynamic loads
The combination of auto-up/down DC/DC conversion, high
efficiency and low switching noise makes the TEA1211HN
well suited to supply a power amplifier in a cellular phone.
• Under voltage lockout
• PWM-only option
• Shut-down current less than 1 µA
• 32-pin small body HVQFN package.
The output voltage can be I2C-bus programmed to the
exact voltage needed to achieve a certain output power
level with optimal system efficiency, thus enlarging battery
lifetime.
2
APPLICATIONS
• Stable output voltage from Lithium-Ion batteries
The TEA1211HN operates at 600 kHz switching frequency
which enables the use of small size external components.
The switching frequency can be locked to an external high
frequency clock. Deadlock is prevented by an on-chip
under voltage lockout circuit. An adjustable current limit
enables efficient battery use even at high dynamic loads.
Optionally, the device can be kept in pulse width
• Variable voltage source for PAs (Power Amplifiers) in
cellular phones
• Wireless handsets
• Hand-held instruments
• Portable computers.
modulation mode regardless of the load applied.
4
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TEA1211HN
HVQFN32
plastic thermal enhanced very thin quad flat package; no leads;
SOT617-3
32 terminals; body 5 × 5 × 0.85 mm
2003 Oct 13
3
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
5
BLOCK DIAGRAM
LXA
LXB
n.c.
6, 8, 17, 19
1, 3, 4,
10, 11
14, 15, 21, 22, 24
P-type power FET
P-type power FET
P-down
TEA1211HN
P-up
2, 31, 32
23, 25, 26
IN
OUT
INTERNAL
SUPPLY
sense FET
N-down
N-up
N-type
power FETs
TEMPERATURE
PROTECTION
DIGITAL
CONTROLLER
27
FB
13 MHz
OSCILLATOR
Window
comparator
CLOCK
SELECTOR
2
I C-BUS INTERFACE
Current limit
comparator
BANDGAP
REFERENCE
5, 7, 9, 16, 18, 20
29
28
SHDWN
12
SCL
13
SDA
30
ILIM
MDB001
SYNC/PWM
GND
Fig.1 Block diagram.
6
PINNING
SYMBOL
SYMBOL
PIN
DESCRIPTION
not connected
PIN
DESCRIPTION
inductor connection 1
input voltage
n.c.
17
18
19
20
21
22
23
24
25
26
27
28
29
LXA
1
2
GND
n.c.
ground
IN
not connected
ground
LXA
LXA
GND
n.c.
3
inductor connection 1
inductor connection 1
ground
GND
LXB
4
inductor connection 2
inductor connection 2
output voltage
inductor connection 2
output voltage
output voltage
feedback input
shut-down input
5
LXB
6
not connected
OUT
LXB
GND
n.c.
7
ground
8
not connected
OUT
OUT
FB
GND
LXA
LXA
SCL
SDA
9
ground
10
11
12
13
inductor connection 1
inductor connection 1
serial clock input line I2C-bus
SHDWN
SYNC/PWM
synchronization clock input,
PWM-only input
serial data input/output line
I2C-bus
ILIM
IN
30
31
32
current limit resistor connection
input voltage
LXB
LXB
GND
14
15
16
inductor connection 2
inductor connection 2
ground
IN
input voltage
2003 Oct 13
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Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
handbook, halfpage
8
7
6
5
4
3
2
1
17
18
19
20
21
22
n.c.
GND
n.c.
n.c.
GND
n.c.
TEA1211HN
GND
LXA
LXA
IN
GND
LXB
LXB
23 OUT
LXB
24
LXA
MDB002
This diagram is a bottom side view.
Pin 1 is indicated with a dot on the top side of the package.
For mechanical details of HVQFN32 package, see Chapter 12.
Fig.2 Pin configuration.
7
FUNCTIONAL DESCRIPTION
Introduction
7.1
The TEA1211HN is able to operate in Pulse Frequency
Modulation (PFM) or discontinuous conduction mode as
well as in Pulse Width Modulation (PWM) or continuous
conduction mode. All switching actions are completely
determined by a digital control circuit which uses the
output voltage level as control input. This digital approach
enables the use of a new pulse width and frequency
modulation scheme, which ensures optimum power
efficiency over the complete range of operation of the
converter.
handbook, halfpage
I
coil
PWM
PFM
0
7.2
Control mechanism
V
> V
V
= V
V
< V
OUT
IN
OUT
IN
OUT
IN
up mode
down mode
stationary mode
Depending on load current Iload and VIN to VOUT ratio, the
controller chooses a mode of operation. When high output
power is requested, the device will operate in PWM
(continuous conduction) mode, which is a 2-phase cycle in
up- as well as in down mode. For small load currents the
controller will switch over to PFM (discontinuous mode),
which is either a 3- or 4-phase cycle depending on the
input to output ratio, see Fig.3.
MDB003
Fig.3 Waveform of coil current as function of Iload
and VIN to VOUT ratio.
2003 Oct 13
5
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
7.2.1
PWM
normal PWM control can continue. The output voltage
(including ESR effect) is again within the predefined
window.
PWM results in minimum AC currents in the circuit
components and hence optimum efficiency, cost and
EMC. In this mode the output voltage is allowed to vary
between two predefined voltage levels. When the output
voltage stays within this so called window, switching
continues in a fixed pattern. When the output voltage
reaches one of the window borders, the digital controller
immediately reacts by adjusting the duty cycle and
inserting a current step in such a way that the output
voltage stays within the window with higher or lower
current capability. This approach enables very fast
reaction to load variations.
Figure 5 depicts the spread of the output voltage window.
The absolute value is most dependent on spread, while the
actual window size is not affected. For one specific device,
the output voltage will not vary more than 2 % typically.
7.2.2
PFM
In low output power situations, TEA1211HN will switch
over to PFM mode operation in case PWM-only mode is
not activated. In this mode charge is transferred from
battery to output in single pulses with a wait phase in
between. Regulation information from earlier PWM mode
operation is used. This results in optimum inductor peak
current levels in PFM mode, which are slightly larger than
the inductor ripple current in PWM mode. As a result, the
transition between PFM and PWM mode is optimal under
all circumstances. In PFM mode, the TEA1211HN
regulates the output voltage to the limits shown in Fig.5.
Depending on the VIN to VOUT ratio the TEA1211HN
decides for a 3- or 4-phase cycle, where the last phase is
the wait phase. When the input voltage almost equals the
output voltage, one of the slopes of a 3-phase cycle
becomes weak. Then the charge, or the integral of its
pulse, is near to zero and no charge is transferred. In this
region the 4-phase cycle is used, (see Fig.3).
Figure 4 shows the TEA1211HN’s response to a sudden
load increase in case of up conversion. The upper trace
shows the output voltage. The ripple on top of the DC level
is a result of the current in the output capacitor, which
changes in sign twice per cycle, multiplied by the
capacitor’s internal Equivalent Series Resistance (ESR).
After each ramp-down of the inductor current, or when the
ESR effect increases the output voltage, the TEA1211HN
determines what to do in the next cycle. As soon as more
load current is taken from the output the output voltage
starts to decay. When the output voltage becomes lower
than the low limit of the window, corrective action is taken
by a ramp-up of the inductor current during a much longer
time. As a result, the DC current level is increased and
load increase
start corrective action
V
OUT
high window limit
low window limit
time
I
load
MDB004
time
Fig.4 Response to load increase in up-mode.
2003 Oct 13
6
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
maximum positive spread of V
FB
V
h
upper specification limit
2%
V
l
+4%
V
h
V
(typ.)
OUT
typical situation
2%
V
l
−4%
V
h
2%
lower specification limit
V
l
maximum negative spread of V
MDB005
FB
Vh = High window limit
Vl = Low window limit
Fig.5 Spread of location of output voltage window.
7.2.3
SWITCHING SEQUENCE
7.4
Start-up
Refer to Figures 1 and 3. In up-mode the cycle starts by
making P-down and N-up conducting in the first phase.
The second phase N-up opens and P-up starts
conducting. In down-mode the cycle starts with in the first
phase P-up and P-down conducting. The second phase
P-down opens and N-down starts conducting. In PFM
these two phases are followed by a third or wait phase that
opens all switches except for N-down, which is closed to
prevent the coil from floating.
If the input voltage exceeds the start voltage, the
TEA1211HN starts ramping up the voltage at the output
capacitor. Ramping stops when the target level, set by the
external resistors, is reached.
7.5
Under voltage lockout
As a result of too high load or disconnection of the input
power source, the input voltage can drop too low to
guarantee normal regulation. In that case, the device
switches to a shut-down mode stopping the switching
completely. Start-up is possible by crossing the start-up
level again.
The stationary mode or 4-phase cycle, which only occurs
in PFM, starts with in the first phase P-down and N-up
conducting. In the second phase P-down and P-up
conduct forming a short-cut from battery to output
capacitor. In the third phase P-up and N-down conduct.
The fourth or wait-phase again opens all switches except
for N-down which is closed to prevent the coil from floating.
7.6
Shut-down
When pin SHDWN is made HIGH, the converter disables
all switches except for N-down (see Fig.1) and power
consumption is reduced to a few µA. N-down is kept
conducting to prevent the coil from floating.
7.3
Adjustable output voltage
The output voltage of the TEA1211HN can be set to a fixed
value by means of an external resistive divider. After
start-up through this divider, dynamic control of the output
voltage is made possible by use of an I2C-bus. The output
voltage can be programmed from 1.5 V to 5.5 V in
40 steps of 0.1 V each. In case of Power Amplifiers (PAs)
for example the output voltage of the TEA1211HN can be
adjusted to the output power to be transmitted by the PA,
in order to obtain maximum system efficiency.
7.7
Power switches
The power switches in the IC are two N-type and two
P-type MOSFETs, having a typical pin-to-pin resistance of
85 mΩ. The maximum continuous input/output current in
the switches is 1.7 A at 70 °C ambient temperature.
2003 Oct 13
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Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
7.8
Synchronous rectification
current limitation protects the IC against overload
conditions, inductor saturation, etc. The current limit level
is user defined by the external resistor which must be
connected between pin ILIM and pin GND.
For optimal efficiency over the whole load range,
synchronous rectifiers inside the TEA1211HN ensure that
in PFM mode during the phase where the coil current is
decreasing, all inductor current will flow through the low
ohmic power MOSFETs. Special circuitry is included
which detects that the inductor current reaches zero.
Following this detection, the digital controller switches off
the power MOSFET and proceeds regulation. Negative
currents are thus prevented.
7.12 I2C-bus serial interface
The serial interface of the TEA1211HN is the I2C-bus.
A detailed description of the I2C-bus specification,
including applications, is given in the brochure: “The
I2C-bus and how to use it”, order no. 9398 393 40011.
7.12.1 CHARACTERISTICS OF THE I2C-BUS
7.9
PWM-only mode
The I2C-bus is for bidirectional, two-line communication
between different ICs or modules. The two lines are a
Serial Data line (SDA) and a Serial Clock Line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor (for best efficiency it is advised to use the input
voltage of the convertor). Data transfer may be initiated
only when the bus is not busy. In bus configurations with
ICs on different supply voltages, the pull-up resistors shall
be connected to the highest supply voltage. The I2C-bus
supports incremental addressing. This enables the system
controller to read or write multiple registers in only one
I2C-bus action. The TEA1211HN supports the I2C-bus up
to 400 kbit/s.
When pin SYNC/PWM is HIGH, the TEA1211HN will use
PWM regulation independent of the load applied. As a
result, the switching frequency does not vary over the
whole load range.
7.10 External synchronisation
If a high frequency clock is applied to pin SYNC/PWM, the
switching frequency in PWM mode will be exactly that
frequency divided by 22. PFM mode is not possible if an
external clock is applied. The quiescent current of the
device increases when an external clock is applied.
In case no external synchronisation is necessary and the
PWM-only option is not used, pin SYNC/PWM must be
connected to ground.
The I2C-bus system configuration is shown in Fig.6.
A device generating a message is a transmitter, a device
receiving a message is a receiver. The device that controls
the message is the master and the devices which are
controlled by the master are the slaves. The TEA1211HN
is a slave only device.
7.11 Current limiter
If the peak input current of the TEA1211HN exceeds its
limit in PWM mode, current ramping is stopped
immediately, and the next switching phase is entered. The
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER
MDB006
Fig.6 I2C-bus system configuration.
2003 Oct 13
8
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
7.12.2 START AND STOP CONDITIONS
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the START condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH
is defined as the STOP condition (P) (see Fig.7).
SDA
SCL
SDA
SCL
S
P
STOP condition
START condition
MDB007
Fig.7 START and STOP conditions on the I2C-bus.
7.12.3 BIT TRANSFER
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period
of the clock pulse as changes in the data line at this time will be interpreted as a control signal (see Fig.8).
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MDB008
Fig.8 Bit transfer on the I2C-bus.
7.12.4 ACKNOWLEDGE
The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited.
Each byte of eight bits is followed by an acknowledge bit. The acknowledge bit is a HIGH level signal put on the bus by
the transmitter during which time the receiver generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master
receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave
transmitter (see Fig.9).
The device that acknowledges must pull down the SDA line during the acknowledge clock pulse, so that the SDA line is
stable LOW during the HIGH period of the acknowledge related clock pulse (set-up and hold times must be considered).
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that
has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to
generate a STOP condition.
2003 Oct 13
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Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
DATA OUTPUT
BY SLAVE
TRANSMITTER
not acknowledge
DATA OUTPUT
BY SLAVE
RECEIVER
acknowledge
8
SCL FROM
MASTER
TRANSMITTER
S
1
2
9
clock pulse for
acknowledgement
START
condition
MDB009
Fig.9 Acknowledge on the I2C-bus.
7.12.5 I2C-BUS PROTOCOL
7.12.5.1 Addressing
Before any data is transmitted on the I2C-bus, the device which should respond is addressed first. The addressing is
always carried out with the first byte transmitted after the start procedure. The (slave) address of the TEA1211HN is
0001 0000 (10h). The subaddress (or word address) is 0000 0000 (00h).
The TEA1211HN acts as a slave receiver only. Therefore the clock signal SCL is only an input signal. The data signal
SDA is a bidirectional line, enabling the TEA1211HN to send an acknowledge.
7.12.5.2 Data
The data consists of one byte, addressing the 40 voltage steps as explained in Tables 1 and 2.
Table 1 Data byte
SUBADDRESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 2
BIT 0
00h
0
0
CVLVL5 CVLVL4 CVLVL3 CVLVL2 CVLVL1 CVLVL0
Table 2 Translation data byte to voltage level
STEP NUMBER
SIZE
(BIT)
STEP
(V)
SUBADDRESS
NAME
CVLVL
MIN. (V)
MAX. (V)
MIN.
MAX.
00h
6
0
40
1.5
0.1
5.5
2003 Oct 13
10
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
7.12.5.3 Write Cycle
The I2C-bus configuration for the different TEA1211HN write cycles is shown in Fig.10. The word address is an eight bit
value that defines which register is to be accessed next.
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
R/W
WORD ADDRESS
S
SLAVE ADDRESS
0
A
A
DATA
A
P
n bytes
auto increment
memory word address
MDB010
S = START condition.
P = STOP condition.
Fig.10 Master transmits to slave receiver (write mode).
8
LIMITING VALUES
SYMBOL
PARAMETER
CONDITIONS
MIN.
−0.5
MAX.
+6.0
UNIT
Vn
voltage on any pin with respect shut-down mode
V
V
to GND
operational mode
−0.5
−
+5.5
1000
+150
+85
Ptot
Tj
total internal power dissipation
junction temperature
ambient temperature
storage temperature
electrostatic discharge voltage
pins LXA
mW
°C
−40
−40
−40
Tamb
Tstg
Vesd
°C
+125
°C
note 1
−
−
−
−
±800
±200
±2000
±200
V
V
V
V
note 2
all other pins
JEDEC Class II; note 1
JEDEC Class II; note 2
Notes
1. Human Body Model: equivalent to discharging a 100 pF capacitor via a 1.5 kΩ resistor.
2. Machine Model: equivalent to discharging a 200 pF capacitor via a 0.75 µH series inductor.
9
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
thermal resistance from junction mounted on dedicated PCB in
35
K/W
to ambient
free air
2003 Oct 13
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Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
10 CHARACTERISTICS
Tamb = −40 to +85 °C; all voltages with respect to ground; positive currents flow into the IC; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Voltage levels
VOUT
output voltage
1.50
−
5.50
V
VIN(start)
start voltage
VOUT = 3.5 V;
2.45
2.55
2.65
V
Iload < 100 mA
VIN
input voltage
VIN(start)
−
−
5.50
−
V
V
V
%
VIN(uvlo)
VFB
under voltage lockout level
feedback voltage level
VIN(start) − 0.15
1.20
1.5
1.25
2.0
1.30
3.0
VOUT(wdw)
output voltage window as
percentage of VOUT
PWM mode
no load
Current levels
Iq
quiescent current
−
100
< 1
−
−
µA
µA
%
Ishdwn
∆Ilim
Imax
current in shut-down mode
current limit deviation
−
2
Ilim = 1 A; note 1
−30
−
+30
1.7
maximum continuous
input/output current
Tamb < 70 °C
−
A
Power MOSFETs; note 2
RDS(on)(N)
RDS(on)(P)
RDS(on)(P-up)
pin-to-pin resistance NFETs VIN = 3.5 V
pin-to-pin resistance PFETs VIN = 3.5 V
−
−
−
65
85
mΩ
mΩ
mΩ
65
85
pin-to-pin resistance P-up
FET between pins LXB and
OUT
VOUT = 1.5 V
100
135
Timing
fsw
switching frequency
PWM mode
450
4.5
600
13
750
20
kHz
fsync
synchronization input
frequency
MHz
Digital levels: pins SYNC/PWM, SHDWN, SCL and SDA
VIL
VIH
LOW-level input voltage
HIGH-level input voltage
0
−
−
0.4
V
V
note 3
0.6 × VIN
VIN + 0.3
Temperature
Tamb
ambient temperature
−40
+25
135
+85
150
°C
°C
Tmax
internal cut-off temperature
120
Notes
1. Current limit level is defined by the external Rlim resistor, see Chapter 11.
2. Measured at Tamb = 25 °C.
3. To avoid additional supply current, it is advised to use HIGH levels not lower than VIN − 0.5 V.
2003 Oct 13
12
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
11 APPLICATION INFORMATION
11.1 Typical Li-Ion, 2- or 3-cell application with I2C-bus programming
L1
10 µH
D1
IN
D2
LXA
LXB
1
3
4
10 11
14 15 21 22 24
26
V
= 3.3 V
OUT
OUT
V
=
IN
2.55 to 5.5 V
2
31
32
25
23
R1
TEA1211HN
120 kΩ
C
C
FB
OUT
IN
100 µF
battery
27
100 µF
12 13 29 28
30
ILIM
5
7
9 16 18 20
R2
75 kΩ
GND
R
lim
SCL
SYNC/
PWM
1 kΩ
SDA
SHDWN
MDB011
The combination of the feedback resistors R1 and R2 in parallel should be approximately 50 kΩ.
D1 and D2 are Schottky diodes
The battery can be a one cell Li-Ion, two cell Alkaline or three cell NiCd/NiMH/Alkaline.
If the I2C-bus interface is used for programming the output voltage, the SCL and SDA lines must be connected to a positive supply via pull-up resistors
(see Section 7.12.1). If the I2C-bus interface is not used, connect pins SCL and SDA to ground.
Note the VIH-level (see Chapter 10).
Pins should never be left open-circuit.
No external clock is applied.
Fig.11 The TEA1211HN in a typical auto-up/down converter application.
2003 Oct 13
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Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
MDB013
100
(1)
η
(%)
(2)
(3)
80
(4)
(5)
60
40
20
0
1
10
100
1000
I
(mA)
load
VOUT = 3.3 V.
L1 = 10µH, TDK SLF7032 series.
(1)
VIN = 2.7 V.
(2) VIN = 3.3 V.
(3) VIN = 3.6 V.
(4) VIN = 4.2 V
(5) VIN = 4.5 V.
Fig.12 Efficiency as a function of load current.
2003 Oct 13
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Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
MDB012
100
(1)
η
(2)
(%)
(3)
(4)
(5)
80
60
40
20
0
2.50
3.00
3.50
4.00
4.50
V
(V)
IN
VOUT = 3.3 V.
L1 = 10µH, TDK SLF7032 series.
(1) OUT = 1000 mA.
I
(2) IOUT = 500 mA.
(3) IOUT = 100 mA.
(4) IOUT = 10 mA.
(5) IOUT = 1 mA.
Fig.13 Efficiency as a function of input voltage.
2003 Oct 13
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Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
11.2 Component selection
11.2.1 INDUCTOR
The inductor should have a low Equivalent Series Resistance (ESR) to reduce losses and the inductor must be able to
handle the peak currents without saturating.
Table 3 Inductor selection information
COMPONENT
VALUE
TYPE
DO3316-682
SLF7032T-100M1R4
SUPPLIER
L1
L1
6.8 µH
10 µH
Coilcraft
TDK
11.2.2 CAPACITORS
For the output capacitor the ESR is critical. The output voltage ripple is determined by the product of the current through
the output capacitor and its ESR. The lower the ESR, the smaller the ripple. However, an ESR less than 80 mΩ could
result in unstable operation.
Table 4 Input and output capacitor selection information
COMPONENT
CIN, COUT
VALUE
100 µF/10 V
TYPE
TPS-series
594D-series
SUPPLIER
AVX
Vishay/Sprague
If the I2C-bus interface is used to program the output voltage, use a larger input capacitor to prevent the under voltage
lockout level being triggered by large current peaks drawn from this capacitor.
Table 5 Input capacitor selection information, when I2C-bus is used
COMPONENT
VALUE
TYPE
TPS-series
594D-series
SUPPLIER
C
IN (I2C-bus used)
220 to 470 µF/10 V
AVX
Vishay/Sprague
11.2.3 SCHOTTKY DIODES
The Schottky diodes provide a lower voltage drop during the break-before-make time of the internal power FETs. It is
advised to use Schottky diodes with fast recovery times.
Table 6 Schottky selection information
COMPONENT
TYPE
SUPPLIER
D1, D2
PRLL5819
Philips
2003 Oct 13
16
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
11.2.4 FEEDBACK RESISTORS
The fixed output voltage can be set with the feedback resistors R1 and R2 (see Fig.11). Even in case I2C-bus is used for
programming the output voltage, these external resistors are required for start-up. The ratio of the resistors can be
V
R1
-------
R2
calculated by:
=
OUT – 1 , with Vref = VFB (see Chapter 10).
-------------
Vref
The two resistors in parallel should have a value of approximately 50 kΩ:
1
1
1
+
≈
---------------
50 kΩ
------- -------
R1 R2
11.2.5 CURRENT LIMITER
The maximum input peak current can be set by the current limiter as follows:
1250
IIN(peak)(max)
R lim
=
Ω
------------------------------
Remark. The output current is not limited: in down conversion, the output current will be higher than the input current,
but the maximum continuous output current is not allowed to exceed 1.7 A (RMS) at 70 °C.
Table 7 Resistor selection information
COMPONENT
R1, R2
VALUE
VOUT dependent
Ilim dependent
TYPE
TOLERANCE
SMD
SMD
1 %
1 %
Rlim
2003 Oct 13
17
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
12 PACKAGE OUTLINE
HVQFN32: plastic thermal enhanced very thin quad flat package; no leads;
32 terminals; body 5 x 5 x 0.85 mm
SOT617-3
B
A
D
terminal 1
index area
A
A
1
E
c
detail X
C
e
1
y
y
v
M
C
C
A
B
C
1
e
1/2 e
b
w M
9
16
L
17
8
e
e
E
h
2
1/2 e
24
1
terminal 1
index area
32
25
X
D
h
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
e
2
y
D
D
E
L
v
w
y
1
1
h
1
h
max.
0.05 0.30
0.00 0.18
5.1
4.9
3.75
3.45
5.1
4.9
3.75
3.45
0.5
0.3
mm
0.05 0.1
1
0.2
0.5
3.5
3.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-04-18
02-10-22
SOT617-3
- - -
MO-220
- - -
2003 Oct 13
18
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
13 SOLDERING
with a high component density, as solder bridging and
non-wetting can present major problems.
13.1 Introduction to soldering surface mount
packages
To overcome these problems the double-wave soldering
method was specifically developed.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
13.2 Reflow soldering
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
• below 220 °C (SnPb process) or below 245 °C (Pb-free
process)
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
– for all BGA and SSOP-T packages
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a
13.4 Manual soldering
volume ≥ 350 mm3 so called thick/large packages.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
• below 235 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
13.3 Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
2003 Oct 13
19
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
13.5 Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
not suitable
REFLOW(2)
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA
suitable
suitable
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
not suitable(4)
PLCC(5), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO, VSSOP
PMFP(8)
suitable
suitable
not recommended(5)(6) suitable
not recommended(7)
suitable
not suitable
not suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Hot bar or manual soldering is suitable for PMFP packages.
2003 Oct 13
20
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
14 DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
15 DEFINITIONS
16 DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Oct 13
21
Philips Semiconductors
Preliminary specification
High efficiency auto-up/down
DC/DC converter
TEA1211HN
17 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2003 Oct 13
22
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R54/02/pp23
Date of release: 2003 Oct 13
Document order number: 9397 750 12174
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