TEA1201TS [NXP]
0.95 V starting basic power unit; 0.95 V开始基本动力单元![TEA1201TS](http://pdffile.icpdf.com/pdf1/p00022/img/icpdf/TEA1201_107199_icpdf.jpg)
型号: | TEA1201TS |
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描述: | 0.95 V starting basic power unit |
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INTEGRATED CIRCUITS
DATA SHEET
TEA1201TS
0.95 V starting basic power unit
Product specification
2002 Jun 06
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
CONTENTS
1
2
3
4
5
6
7
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
ORDERING INFORMATION
QUICK REFERENCE DATA
BLOCK DIAGRAM
PINNING INFORMATION
7.1
7.2
Pinning
Pin description
8
FUNCTIONAL DESCRIPTION
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
Control mechanism
Synchronous rectification
Start-up
Undervoltage lockout
Shut-down
Power switches
Temperature protection
Current limiters
External synchronization and PWM-only mode
Behaviour at input voltage exceeding the
specified range
8.11
8.12
Control of the additional switch
Low battery detector
9
LIMITING VALUES
10
THERMAL CHARACTERISTICS
QUALITY SPECIFICATION
CHARACTERISTICS
11
12
13
APPLICATION INFORMATION
External component selection
PACKAGE OUTLINE
13.1
14
15
SOLDERING
15.1
Introduction to soldering surface mount
packages
15.2
15.3
15.4
15.5
Reflow soldering
Wave soldering
Manual soldering
Suitability of surface mount IC packages for
wave and reflow soldering methods
16
17
18
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
2002 Jun 06
2
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
1
FEATURES
3
GENERAL DESCRIPTION
• Complete DC-to-DC converter circuit, one current
switch and a battery low detector
The TEA1201TS is a fully integrated battery power unit
including a high-efficiency DC-to-DC converter which runs
from a 1-cell NiCd or NiMH battery, a current switch and a
low battery detector. The circuit can be arranged in several
ways to optimize the application circuit of a power supply
system. Therefore, the DC-to-DC converter can be
arranged for upconversion or downconversion and the low
battery detector can be configured for several types of
batteries. Accurate low battery detection is possible while
all other blocks are switched off.
• Configurable for 1, 2 or 3-cell Nickel-Cadmium (NiCd)
or Nickel Metal Hydride (NiMH) batteries and 1 Lithium
Ion (Li-Ion) battery
• Guaranteed DC-to-DC converter start-up from 1-cell
NiCd or NiMH battery, even with a load current
• Upconversion or downconversion
• Internal power MOSFETs featuring a low RDSon of
approximately 0.1 Ω
The DC-to-DC converter features efficient, compact and
dynamic power conversion using a digital control concept
comparable with Pulse Width Modulation (PWM) and
Pulse Frequency Modulation (PFM), integrated CMOS
power switches with a very low RDSon and fully
synchronous rectification.
• Synchronous rectification for high efficiency
• Soft start
• PWM-only operating option
• Stand-alone low battery detector requires no additional
supply voltage
The device operates at a switching frequency of 600 kHz
which enables the use of external components with
minimum size. The switching frequency can be
synchronized to an external high frequency clock signal.
Optionally, the device can be kept in PWM control mode
only. Deadlock is prevented by an on-chip undervoltage
lockout circuit.
• Low battery detection level at 0.90 V, externally
adjustable to a higher level
• Adjustable output voltages
• Shut-down function
• Small outline package
• Advanced 0.6 µm BICMOS process.
Active current limiting enables efficient conversion in
pulsed-load systems such as Global System for Mobile
communication (GSM) and Digital Enhanced Cordless
Telecommunications (DECT).
2
APPLICATIONS
• Cellular phones
The switch can be used to control the connection of (a part
of) the output load. It shows a low pin-to-pin resistance of
500 mΩ.
• Cordless phones
• Personal Digital Assistants (PDAs)
• Portable audio players
• Pagers
The low battery detector has a built-in detection level
which is optimum for a 1-cell NiCd or NiMH battery.
• Mobile equipment.
4
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TEA1201TS
SSOP16
plastic shrink small outline package; 16 leads; body width 4.4 mm
SOT369-1
2002 Jun 06
3
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
5
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DC-to-DC converter
UPCONVERSION
VI(up)
input voltage
VI(start)
VO(uvlo)
0.93
−
−
5.50
V
V
V
V
VO(up)
VI(start)
VO(uvlo)
output voltage
5.50
1.00
2.4
start-up input voltage
undervoltage lockout voltage
IL < 10 mA
0.96
2.2
2.0
DOWNCONVERSION
VI(dwn)
input voltage
output voltage
VO(uvlo)
1.30
−
−
5.50
5.50
V
V
VO(dwn)
CURRENT LEVELS
Iq(DCDC)
quiescent current at pin
−
110
−
µA
UPOUT/DNIN
Ishdwn
current in shut-down mode
VLBI1 = VI(up) = 1.2 V
−
−
65
−
µA
ILX(max)
maximum continuous current at Tamb = 80 °C
−
1.0
A
pins LX1 and LX2
∆Ilim
current limit deviation
Ilim set to 1.0 A
upconversion
−12
−12
−
−
+12
+12
%
%
downconversion
POWER MOSFETS
RDSon(N) drain-to-source on-state
Tj = 27 °C; IDS = 100 mA
Tj = 27 °C; IDS = −100 mA
−
−
110
125
200
250
mΩ
mΩ
resistance NFET
RDSon(P)
drain-to-source on-state
resistance PFET
EFFICIENCY
η
efficiency upconversion
VO up to 3.3 V; see Fig.9
VI = 1.2 V; IL = 100 mA
VI = 2.4 V; IL = 10 mA
−
−
84
92
−
−
%
%
TIMING
fsw
switching frequency
PWM mode
480
6
600
13
720
20
kHz
fi(sync)
synchronization clock input
frequency
MHz
tstart
start-up time
−
10
−
ms
Switch
RDSon
drain-to-source resistance in
switched-on state
VO(up) = VI(down) = 5 V;
VFB1 < 0.4 V
−
−
500
750
mΩ
IO(max)
maximum output current in
switched-on state
VFB1 < 0.4 V
−
0.40
A
General characteristics
Vref
reference voltage
1.165
1.190
1.215
V
2002 Jun 06
4
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9
LBI1
SHDWN0
TEA1201TS
LOW BATTERY
DETECTOR
6
7
OUT1
FB1
10
1
LBO
LX1
3, 4
UPOUT/DNIN
P-type
16
5
POWER FET
LX2
ILIM
INTERNAL
SUPPLY
sense FET
8
GND
START-UP
CIRCUIT
sense
FET
12
V
ref
CONTROL LOGIC
AND
MODE GEARBOX
FB0
N-type
POWER
FET
V
ref
CURRENT LIMIT
COMPARATOR
TEMPERATURE
PROTECTION
11
REFERENCE
VOLTAGE
V
TIME
COUNTER
ref
13 MHz
OSCILLATOR
SYNC
GATE
DIGITAL CONTROLLER
13
14
2
15
MGW787
GND0
SYNC/PWM SHDWN0 U/D
Fig.1 Block diagram.
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
7
PINNING INFORMATION
Pinning
7.1
handbook, halfpage
LX1
LX2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SHDWN0
UPOUT/DNIN
UPOUT/DNIN
ILIM
U/D
SYNC/PWM
GND0
FB0
TEA1201TS
OUT1
V
ref
FB1
LBO
LBI1
GND
MGW788
Fig.2 Pin configuration.
7.2
Pin description
Table 1 SSOP16 package
SYMBOL
LX1
PIN
DESCRIPTION
1
2
inductor connection 1
DC-to-DC converter shut-down input
SHDWN0
UPOUT/DNIN
UPOUT/DNIN
ILIM
3
up mode: DC-to-DC converter output; down mode: DC-to-DC converter input
4
5
current limiting resistor connection
switch output
OUT1
6
FB1
7
switch control input
GND
8
internal supply ground
LBI1
9
low battery detector input 1
low battery detector output
reference voltage
LBO
10
11
12
13
14
15
16
Vref
FB0
DC-to-DC converter feedback input
DC-to-DC converter ground
synchronization clock input or PWM-only selection input
conversion mode selection input
inductor connection 2
GND0
SYNC/PWM
U/D
LX2
2002 Jun 06
6
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
8
FUNCTIONAL DESCRIPTION
Control mechanism
Figure 4 shows the spread of the output voltage window.
The absolute value is mostly dependent on spread, while
the actual window size (Vwdw(high) − Vwdw(low)) is not
affected. For one specific device, the output voltage will
not vary more than 2% (typical value).
8.1
The TEA1201TS DC-to-DC converter is able to operate in
PFM (discontinuous conduction) or PWM (continuous
conduction) operating mode. All switching actions are
completely determined by a digital control circuit which
uses the output voltage level as its control input. This novel
digital approach enables the use of a new pulse width and
frequency modulation scheme, which ensures optimum
power efficiency over the complete range of operation of
the converter.
In low output power situations, the TEA1201TS will switch
over to PFM (discontinuous conduction) operating mode.
In this mode, regulation information from an earlier PWM
operating mode is used. This results in optimum inductor
peak current levels in the PFM mode, which are slightly
larger than the inductor ripple current in the PWM mode.
As a result, the transition between PFM and PWM mode is
optimum under all circumstances. In the PFM mode the
TEA1201TS regulates the output voltage to the high
window limit as shown in Fig.3.
When high output power is requested, the device will
operate in PWM (continuous conduction) operating mode.
This results in minimum AC currents in the circuit
components and hence optimum efficiency, minimum
costs and low EMC. In this operating mode, the output
voltage is allowed to vary between two predefined voltage
levels. As long as the output voltage stays within this
so-called window, switching continues in a fixed pattern.
8.2
Synchronous rectification
For optimum efficiency over the whole load range,
synchronous rectifiers inside the TEA1201TS ensure that
during the whole second switching phase, all inductor
current will flow through the low-ohmic power MOSFETs.
Special circuitry is included which detects when the
inductor current reaches zero. Following this detection, the
digital controller switches off the power MOSFET and
proceeds with regulation.
When the output voltage reaches one of the window
borders, the digital controller immediately reacts by
adjusting the pulse width and inserting a current step in
such a way that the output voltage stays within the window
with higher or lower current capability. This approach
enables very fast reaction to load variations. Figure 3
shows the response of the converter to a sudden load
increase. The upper trace shows the output voltage.
8.3
Start-up
Start-up from low input voltage in the boost mode is
realized by an independent start-up oscillator, which starts
switching the N-type power MOSFET as soon as the
low-battery detector detects a sufficiently high voltage.
The inductor current is limited internally to ensure
soft-starting. The switch actions of the start-up oscillator
will increase the output voltage. As soon as the output
voltage is high enough for normal regulation, the digital
control system takes control over the power MOSFETs.
The ripple on top of the DC level is a result of the current
in the output capacitor, which changes in sign twice per
cycle, times the internal Equivalent Series Resistance
(ESR) of the capacitor. After each ramp-down of the
inductor current, i.e. when the ESR effect increases the
output voltage, the converter determines what to do in the
next cycle. As soon as more load current is taken from the
output the output voltage starts to decay.
When the output voltage becomes lower than the low limit
of the window, a corrective action is taken by a ramp-up of
the inductor current during a much longer time. As a result,
the DC current level is increased and normal PWM control
can continue. The output voltage (including ESR effect) is
again within the predefined window.
8.4
Undervoltage lockout
As a result of too high a load or disconnection of the input
power source, the output voltage can drop so low that
normal regulation cannot be guaranteed. In this event, the
device switches back to start-up mode. If the output
voltage drops even further, switching is stopped
completely.
2002 Jun 06
7
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
load increase
start corrective action
V
o
high window limit
low window limit
time
I
L
MGK925
time
Fig.3 Response to load increase.
V
wdw(high)
2%
V
wdw(high)
2%
+2%
V
wdw(low)
V
O
V
wdw(high)
2%
−2%
V
wdw(low)
V
wdw(low)
typical
situation
maximum
positive spread
maximum
negative spread
MGW789
Fig.4 Output voltage window spread.
8
2002 Jun 06
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
8.5
Shut-down
8.10 Behaviour at input voltage exceeding the
specified range
When the shut-down input is set HIGH, the DC-to-DC
converter disables both switches and power consumption
is reduced to a few microamperes.
In general, an input voltage exceeding the specified range
is not recommended since instability may occur. There are
two exceptions:
8.6
Power switches
1. Upconversion: at an input voltage higher than the
target output voltage, but up to 5.5 V, the converter will
stop switching and the external Schottky diode will
take over. The output voltage will equal the input
voltage minus the diode voltage drop. Since all current
flows through the external diode in this situation, the
current limiting function is not active.
The power switches in the IC are one N-type and one
P-type power MOSFET, both having a typical
drain-to-source resistance of 100 mΩ. The maximum
average current in the power switches is 1.0 A at
Tamb = 80 °C.
8.7 Temperature protection
In the PWM mode, the P-type power MOSFET is
always on when the input voltage exceeds the target
output voltage. The internal synchronous rectifier
ensures that the inductor current does not fall below
zero. As a result, the achieved efficiency is higher in
this situation than standard PWM-controlled
converters achieve.
When the DC-to-DC converter operates in the PWM
mode, and the die temperature gets too high (typical value
is 190 °C), the converter and the switch stop operating.
They resume operation when the die temperature falls
below 90 °C again. As a result, low frequency cycling
between the on and off state will occur. It should be noted
that in the event of device temperatures at the cut-off limit,
the application differs strongly from maximum
specifications.
2. Downconversion: when the input voltage is lower than
the target output voltage, but higher than 2.2 V, the
P-type power MOSFET will stay conducting resulting
in an output voltage being equal to the input voltage
minus some resistive voltage drop. The current limiting
function remains active.
8.8
Current limiters
If the current in one of the power switches exceeds the
programmed limit in the PWM mode, the current ramp is
stopped immediately and the next switching phase is
entered. Current limiting is required to keep power
conversion efficient during temporary high loads.
Furthermore, current limiting protects the IC against
overload conditions, inductor saturation, etc.
8.11 Control of the additional switch
The switch will be in the on-state when its feedback input
is connected to ground. When the feedback input is higher
than 2 V, the power FET will be high-ohmic. The switch
always turns to the high-ohmic state when the shutdown
input is made HIGH.
The current limiting level is set by an external resistor
which must be connected between pin ILIM and ground for
downconversion, or between pins ILIM and UPOUT/DNIN
for upconversion.
8.12 Low battery detector
The low battery detector is an autonomous circuit which
can work at an input voltage down to 0.90 V. It is always
on, even when all other blocks are in the shut-down mode.
8.9
External synchronization and PWM-only mode
The low battery input (pin LBI1) is tuned to accept a 1-cell
NiCd or NiMH battery voltage directly. Hysteresis is
included for correct operation.
If an external high-frequency clock or a HIGH level is
applied to pin SYNC/PWM, the TEA1201TS will use PWM
regulation independent of the load applied.
The output of the low battery detector on pin LBO is an
open-collector output. The output is high (i.e. no current is
sunk by the collector) when the input voltage of the
detector is below the lower detection level.
In the event of a high-frequency clock being applied, the
switching frequency in the PWM mode will be exactly that
frequency divided by 22. In the PWM mode the quiescent
current of the device increases.
In the event that no external synchronization or PWM
mode selection is necessary, pin SYNC/PWM must be
connected to ground.
2002 Jun 06
9
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
9
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
voltage on any pin
CONDITIONS
MIN.
MAX.
UNIT
Vn
shut-down mode
operating mode
−0.2
−0.2
−40
−20
−40
+6.5
+5.5
+150
+80
V
V
Tj
junction temperature
°C
°C
°C
V
Tamb
Tstg
Ves
ambient temperature
storage temperature
+125
electrostatic handling voltage
notes 1 and 2
Class II
Notes
1. ESD specification is in accordance with the JEDEC standard:
a) Human Body Model (HBM) tests are carried out by discharging a 100 pF capacitor through a 1.5 kΩ series
resistor.
b) Machine Model (MM) tests are carried out by discharging a 200 pF capacitor via a 0.75 µH series inductor.
2. Exception is pin ILIM: 1000 V HBM and 100 V MM.
10 THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient in free air
143
K/W
11 QUALITY SPECIFICATION
In accordance with “SNW-FQ-611D”.
2002 Jun 06
10
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
12 CHARACTERISTICS
Tamb = −20 to +80 °C; all voltages are measured with respect to ground; positive currents flow into the IC; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DC-to-DC converter
UPCONVERSION; PIN U/D = LOW
VI(up)
input voltage
VI(start)
VO(uvlo)
0.93
−
5.50
5.50
0.96 1.00
V
VO(up)
VI(start)
VO(uvlo)
output voltage
−
V
V
V
start-up input voltage
undervoltage lockout voltage
IL < 10 mA
note 1
2.0
2.2
2.4
DOWNCONVERSION; PIN U/D = HIGH
VI(dwn)
input voltage
note 2
VO(uvlo)
1.30
−
−
5.50
5.50
V
V
VO(dwn)
output voltage
REGULATION
∆VO(wdw) output voltage window size as a function PWM mode
1.5
2.0
2.5
%
of output voltage
CURRENT LEVELS
Iq(DCDC)
Ishdwn
Ilim(max)
∆Ilim
quiescent current at pin UPOUT/DNIN
current in shut-down mode
maximum current limit
note 3
−
−
−
110
65
5
−
−
−
µA
µA
A
VLBI1 = VI(up) = 1.2 V
current limit deviation
Ilim set to 1.0 A; note 4
upconversion
−12
−12
−
−
−
−
+12
+12
1.0
%
%
A
downconversion
ILX(max)
maximum continuous current at pins LX1 Tamb = 80 °C
and LX2
POWER MOSFETS
RDSon(N) drain-to-source on-state resistance NFET Tj = 27 °C; IDS = 100 mA
−
110
125
200
250
mΩ
mΩ
RDSon(P)
EFFICIENCY
η
drain-to-source on-state resistance PFET Tj = 27 °C; IDS = −100 mA −
efficiency upconversion
VO up to 3.3 V; see note 5
and Fig.9
VI = 1.2 V; IL = 100 mA
VI = 2.4 V; IL = 10 mA
−
−
84
92
−
−
%
%
TIMING
fsw
switching frequency
PWM mode
note 6
480
6
600
13
720
20
−
kHz
MHz
ms
fi(sync)
tstart
synchronization clock input frequency
start-up time
−
10
DIGITAL INPUT LEVELS
VlL(n)
LOW-level input voltage on all digital pins
0
−
0.4
V
2002 Jun 06
11
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
SYMBOL
PARAMETER
HIGH-level input voltage
CONDITIONS
note 7
MIN.
TYP.
MAX.
UNIT
VIH(n)
on pins SYNC/PWM, SHDWN0
and SHDWN2
0.55V4
−
V4 + 0.3 V
V4 + 0.3 V
all other digital input pins
V4 − 0.4 −
Switch: see Fig.5
RDSon drain-to-source resistance in switched-on VO(up) = VI(dwn) = 5 V;
−
−
500
750
mΩ
state
VFB1 < 0.4 V
IO(max)
maximum output current in switched-on
state
VFB1 < 0.4 V
−
0.40
A
Low battery detector
ILBD
supply current of detector
transition time
VI = 0.9 V
falling Vbat
−
−
20
2
−
−
µA
µs
tt(HL)
DETECTION INPUT PIN LBI1
Vdet
low battery detection level
falling Vbat
0.87
0.90 0.93
V
Vhys
low battery detection hysteresis
−
−
−
20
−
−
−
mV
TCVdet
TCVhys
temperature coefficient of detection level
0
mV/K
mV/K
temperature coefficient of detection
hysteresis
0.175
DETECTION OUTPUT PIN LB0
IO(sink)
output sink current
15
−
−
µA
General characteristics
Vref
Iq
reference voltage
1.165
−
1.190 1.215
V
quiescent current at pin UPOUT/DNIN
ambient temperature
all blocks operating
270
+25
190
−
µA
°C
°C
Tamb
Tmax
−20
−
+80
−
internal temperature for cut-off
Notes
1. The undervoltage lockout level shows wide specification limits since it decreases at increasing temperature. When
the temperature increases, the minimum supply voltage of the digital control part of the IC decreases and therefore
the correct operation of this function is guaranteed over the whole temperature range. The undervoltage lockout level
is measured at pin UPOUT/DNIN.
2. When VI is lower than the target output voltage but higher than 2.2 V, the P-type power MOSFET will remain
conducting (duty factor is 100%), resulting in VO following VI.
3. The quiescent current is specified as the input current in the upconversion configuration at VI = 1.20 V and
VO = 3.30 V, using L1 = 6.8 µH, R1 = 150 kΩ and R2 = 91 kΩ.
4. The current limit is defined by resistor R10. This resistor must have a tolerance of 1%.
5. The specified efficiency is valid when using an output capacitor having an ESR of 0.1 Ω and an inductor of 6.8 µH
with an ESR of 0.05 Ω and a sufficient saturation current level.
6. The specified start-up time is the time between the connection of a 1.20 V input voltage source and the moment the
output reaches 3.30 V. The output capacitance equals 100 µF, the inductance equals 6.8 µH and no load is present.
7. V4 is the voltage at pin UPOUT/DNIN. If the applied HIGH-level voltage is less than V4 − 1 V, the quiescent current
of the device will increase.
2002 Jun 06
12
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
MGU641
600
R
DS(on)
mΩ
500
SWITCH
400
300
200
100
0
0.00
1.00
2.00
3.00
4.00
5.00
6.00
V (V)
I
Fig.5 Switch drain-to-source on-state resistance as a function of input voltage.
2002 Jun 06
13
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
13 APPLICATION INFORMATION
TEA1201TS
DC/DC
V
V
out_dcdc
UPCONVERTER
SWITCH
out_switched
LOW BATTERY
DETECTOR
low-batt
Equivalent block diagram
D1
R
L1
lim
LX1
LX2
ILIM
5
1
UPOUT/DNIN
16
4
3
V
out_dcdc
C1
V
R1
R2
ref
11
FB0
12
C2
C5
LBI1
9
TEA1201TS
U/D
15
10
14
2
OUT1
FB1
6
7
V
out_switched
LBO
low-batt
switch_on
SYNC/PWM
SHDWN0
8
13
GND0
GND
R7
MGW790
Fig.6 1-cell NiCd or NiMH battery powered equipment.
14
2002 Jun 06
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
TEA1201TS
DC/DC
V
V
out_dcdc
UPCONVERTER
SWITCH
out_switched
LOW BATTERY
DETECTOR
low-batt
Equivalent block diagram
D1
R
L1
lim
LX1
LX2
ILIM
5
1
UPOUT/DNIN
16
4
3
V
out_dcdc
C1
V
R1
R2
ref
11
FB0
12
C2
C5
R8
R9
LBI1
9
TEA1201TS
U/D
15
10
14
2
OUT1
FB1
6
7
V
out_switched
LBO
low-batt
switch_on
SYNC/PWM
SHDWN0
8
13
GND0
GND
R7
MGW791
Fig.7 2-cell NiCd or NiMH battery powered equipment with autonomous shut-down at low battery voltage.
2002 Jun 06
15
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
TEA1201TS
DC/DC
V
V
out_dcdc
DOWNCONVERTER
SWITCH
out_switched
LOW BATTERY
DETECTOR
low-batt
Equivalent block diagram
UPOUT/DNIN
R
LX1
LX2
1
4
3
L1
16
V
C1
out_dcdc
lim
ILIM
5
D1
C2
R1
R2
U/D
15
FB0
R8
R9
12
LBI1
9
R7
V
TEA1201TS
ref
11
C5
OUT1
FB1
6
7
V
out_switched
LBO
low-batt
10
14
2
switch_on
SYNC/PWM
SHDWN0
8
13
GND0
GND
MGW792
Fig.8 3-cell NiCd or NiMH and 1-cell Li-Ion battery powered equipment.
16
2002 Jun 06
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
13.1 External component selection
13.1.6 CURRENT LIMITING RESISTOR R10
13.1.1 INDUCTOR L1
The maximum instantaneous current is set by the external
resistor R10. The preferred type is SMD with
1% tolerance.
The performance of the TEA1201TS is not very sensitive
to inductance value. The best efficiency performance over
a wide load current range is achieved by using an
inductance of 6.8 µH for example TDK SLF7032 or
Coilcraft DO1608 range.
The connection of resistor R10 differs for each mode:
• At upconversion: resistor R10 must be connected
between pins ILIM and UPOUT/DNIN; the current
320
R10
limiting level is defined by: I Iim
=
----------
13.1.2 DC-TO-DC CONVERTER INPUT CAPACITOR C1
The value of C1 strongly depends on the type of input
source. In general, a 100 µF tantalum capacitor is
sufficient.
• At downconversion: resistor R10 must be connected
between pins ILIM and GND0; the current limiting level
300
R10
is defined by: I Iim
=
----------
13.1.3 DC-TO-DC CONVERTER OUTPUT CAPACITOR C2
The average inductor current during limited current
operation also depends on the inductance value, input
voltage, output voltage and resistive losses in all
components in the power path. Ensure that
The value and type of C2 depends on the maximum output
current and the ripple voltage which is allowed in the
application. Low-ESR tantalum capacitors show good
results. The most important specification of C2 is its ESR,
which mainly determines output voltage ripple.
I
lim < Isat (saturation current) of the inductor.
13.1.7 REFERENCE VOLTAGE DECOUPLING CAPACITOR C5
13.1.4 DIODE D1
Optionally, a decoupling capacitor can be connected
between pin Vref and ground in order to achieve a lower
noise level of the output voltages of the LDO. The best
choice for C5 is a ceramic multilayer capacitor of
approximately 10 nF.
The Schottky diode is only used for a short time during
takeover from N-type power MOSFET and P-type power
MOSFET and vice versa. Therefore, a medium-power
diode is sufficient in most applications, for example a
Philips PRLL5819.
13.1.8 LOW BATTERY DETECTOR COMPONENTS
R7, R8 AND R9
13.1.5 FEEDBACK RESISTORS R1 AND R2
The output voltage of the DC-to-DC converter is
determined by the resistors R1 and R2. The following
conditions apply:
Resistor R7 is connected between pin LBO and the input
or output pin and must be 330 kΩ or higher.
A 1-cell NiCd or NiMH battery can be connected directly to
pin LBI1.
• Use SMD type resistors only with a tolerance of 1%.
If larger body resistors are used, the capacitance on
pin FB0 will be too large, causing inaccurate operation.
A higher battery voltage can be detected by application of
a divider circuit with resistors R8 and R9. The low-battery
detection level for a higher battery voltage can be set by
using the formula:
• Resistors R1 and R2 should have a maximum value of
50 kΩ when connected in parallel. A higher value will
result in inaccurate operation.
Under these conditions, the output voltage can be
calculated by the formula:
R9
R8 + R9
V LBI1(det) = Vdet
×
----------------------
R1
R2
Since current flows into the LBI1 pin, the parallel
impedance of R8 and R9 must be about 1 kΩ in order to
avoid inaccuracy due to the spread of the LBI1 current.
VO = Vref × 1 +
-------
2002 Jun 06
17
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
MGU577
100
η
(%)
(1)
(2)
80
60
40
2
3
1
10
10
10
I
(mA)
L
(1) VI = 2.4 V
(2) VI = 1.2 V
VO = 3.5 V
Fig.9 Efficiency as a function of load current.
2002 Jun 06
18
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
14 PACKAGE OUTLINE
SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm
SOT369-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
10o
0o
0.15
0.00
1.4
1.2
0.32
0.20
0.25
0.13
5.30
5.10
4.5
4.3
6.6
6.2
0.75
0.45
0.65
0.45
0.48
0.18
mm
1.0
1.5
0.65
0.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
99-12-27
SOT369-1
MO-152
2002 Jun 06
19
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
15 SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
15.1 Introduction to soldering surface mount
packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
15.2 Reflow soldering
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
15.4 Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
15.3 Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
2002 Jun 06
20
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
15.5 Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
not suitable
REFLOW(1)
BGA, HBGA, LFBGA, SQFP, TFBGA
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS
PLCC(3), SO, SOJ
suitable
not suitable(2)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(3)(4) suitable
not recommended(5)
suitable
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2002 Jun 06
21
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
16 DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS(1)
STATUS(2)
DEFINITIONS
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
17 DEFINITIONS
18 DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2002 Jun 06
22
Philips Semiconductors
Product specification
0.95 V starting basic power unit
TEA1201TS
NOTES
2002 Jun 06
23
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403502/01/pp24
Date of release: 2002 Jun 06
Document order number: 9397 750 09359
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