TEA1202 [NXP]

Battery power unit; 电池供电设备
TEA1202
型号: TEA1202
厂家: NXP    NXP
描述:

Battery power unit
电池供电设备

电池
文件: 总24页 (文件大小:124K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
DATA SHEET  
TEA1202TS  
Battery power unit  
Objective specification  
2000 Jun 08  
File under Integrated Circuits, IC03  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
FEATURES  
GENERAL DESCRIPTION  
Fully integrated battery power unit, including complete  
DC/DC converter circuit, two Low DropOut voltage  
regulators (LDOs) and a battery low detector  
The TEA1202TS is a fully integrated battery power unit  
including a high-efficiency DC/DC converter which runs  
from a 1-cell NiCd or NiMH battery, two low dropout  
voltage regulators and a low battery detector. The circuit  
can be arranged in many ways to optimize the application  
circuit of a power supply system. Therefore, most inputs  
and outputs are separated, the DC/DC converter can be  
arranged for upconversion or downconversion and the  
regulators can also be used as power switches. One  
regulator can be used completely independent of the rest  
of the system, and the low battery detector can be  
configured for several types of batteries. Accurate low  
battery detection is possible while all other blocks are  
switched off.  
Configurable for 1, 2 or 3-cell Nickel-Cadmium (NiCd)  
or Nickel Metal Hybrid (NiMH) batteries and 1 Lithium  
Ion (Li-Ion) battery  
Guaranteed DC/DC converter start-up from 1-cell NiCd  
or NiMH battery, even with an load current  
Upconversion or downconversion  
Internal power MOSFETs featuring a low RDSon of  
approximately 0.1 Ω  
Synchronous rectification for high efficiency  
Soft start  
The DC/DC converter features efficient, compact and  
dynamic power conversion using a digital control concept  
comparable with Pulse Width Modulation (PWM) and  
Pulse Frequency Modulation (PFM), integrated CMOS  
power switches with a very low RDSon and fully  
synchronous rectification.  
PWM-only operating option  
Dropout voltage of 75 mV at 50 mA  
Both LDOs are also applicable as low-ohmic power  
switches  
Stable LDO performance with ceramic capacitors  
The device operates at a switching frequency of 600 kHz  
which enables the use of external components with  
minimum size. The switching frequency can be  
synchronized to an external high frequency clock signal.  
Optionally, the device can be kept in PWM control mode  
only. Deadlock is prevented by an on-chip undervoltage  
lockout circuit.  
Stand-alone low battery detector requires no additional  
supply voltage  
Low battery detection level at 0.90 V, externally  
adjustable to a higher level  
Adjustable output voltages  
Shut-down function  
Small outline package  
Active current limiting enables efficient conversion in  
pulsed-load systems such as Global System for Mobile  
communication (GSM) and Digital Enhanced Cordless  
Telecommunications (DECT).  
Advanced 0.6 µm BICMOS process.  
APPLICATIONS  
Both LDOs show a low dropout voltage and are inherently  
stable, even when ceramic capacitors with a low ESR  
value are applied at the outputs. Usage of the LDOs as  
low-ohmic switches is also possible.  
Cellular phones  
Cordless phones  
Personal Digital Assistants (PDAs)  
Portable Audio Players  
Pagers  
The low battery detector has a built-in detection level  
which is optimum for a 1-cell NiCd or NiMH battery. Higher  
battery voltages can be translated to this 1-cell level by an  
additional built-in LDO circuit.  
Mobile equipment.  
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
plastic shrink small outline package; 20 leads; body width 4.4 mm  
VERSION  
TEA1202TS  
SSOP20  
SOT266-1  
2000 Jun 08  
2
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
QUICK REFERENCE DATA  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
DC/DC converter  
UPCONVERSION  
VI(up)  
input voltage  
VI(start)  
VO(uvlo)  
0.93  
5.50  
V
V
V
VO(up)  
VI(start)  
output voltage  
5.50  
1.00  
start-up input voltage  
IL < 10 mA  
0.96  
DOWNCONVERSION  
VI(dwn)  
input voltage  
output voltage  
VO(uvlo)  
1.30  
5.50  
5.50  
V
V
VO(dwn)  
CURRENT LEVELS  
Iq  
quiescent current  
current in shut-down mode  
0
110  
2
µA  
µA  
A
Ishdwn  
ILX(max)  
10  
1.0  
maximum continuous current at Tamb = 80 °C  
pins LX1 and LX2  
Ilim  
current limit deviation  
Ilim set to 1.0 A  
upconversion  
12  
12  
+12  
+12  
%
%
downconversion  
POWER MOSFETS  
RDSon(N) drain-to-source on-state  
Tj = 27 °C  
Tj = 27 °C  
110  
125  
mΩ  
mΩ  
resistance NFET  
RDSon(P)  
drain-to-source on-state  
resistance PFET  
EFFICIENCY  
η
efficiency upconversion  
switching frequency  
VI = 1.2 V; VO up to 3.3 V  
IL = 1 mA  
66  
81  
85  
%
%
%
IL = 10 mA  
IL = 100 mA  
TIMING  
fsw  
PWM mode  
480  
6
600  
13  
720  
20  
kHz  
fi(sync)  
synchronization clock input  
frequency  
MHz  
tstart  
start-up time  
10  
ms  
Low dropout voltage regulators  
VLDO  
output voltage range  
dropout voltage  
VLDO < V4 + 0.4 V  
ILDO = 50 mA  
1.30  
5.50  
75  
V
Vdropout  
ILDO(max)  
RDSon  
mV  
mA  
mΩ  
maximum output current  
in regulation  
50  
200  
drain-to-source on-state  
resistance  
VFB1,2 > 2 V; Tj = 27 °C  
General characteristics  
Vref  
reference voltage  
1.165  
1.190  
1.215  
V
2000 Jun 08  
3
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3
SHDWN2  
11  
IN2  
12  
V
LBI2  
LBI1  
ref  
10  
9
OUT2  
FB2  
LDO2  
13  
TEA1202TS  
SHDWN0  
LOW BATTERY  
DETECTOR  
V
ref  
6
7
OUT1  
FB1  
LDO1  
14  
1
LBO  
LX1  
P-type POWER FET  
4
UPOUT/DNIN  
20  
5
LX2  
ILIM  
INTERNAL  
SUPPLY  
sense FET  
8
GND  
START-UP  
CIRCUIT  
16  
V
ref  
CONTROL LOGIC  
AND  
MODE GEARBOX  
FB0  
CURRENT LIMIT  
COMPARATOR  
V
ref  
N-type  
POWER  
FET  
TEMPERATURE  
PROTECTION  
15  
REFERENCE  
VOLTAGE  
V
TIME  
COUNTER  
ref  
sense  
FET  
13 MHz  
OSCILLATOR  
SYNC  
GATE  
DIGITAL CONTROLLER  
17  
18  
2
19  
MGU062  
GND0  
SYNC/PWM SHDWN0 U/D  
ahdnbok,uflapegwidt  
Fig.1 Block diagram.  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
PINNING  
SYMBOL  
LX1  
PIN  
DESCRIPTION  
1
2
3
4
inductor connection 1  
DC/DC shut-down input  
LDO2 shut-down input  
SHDWN0  
SHDWN2  
UPOUT/DNIN  
up mode: DC/DC output;  
down mode DC/DC input  
handbook, halfpage  
LX1  
1
2
3
4
5
6
7
8
9
20 LX2  
ILIM  
5
current limiting resistor  
connection  
SHDWN0  
SHDWN2  
UPOUT/DNIN  
ILIM  
19 U/D  
18 SYNC/PWM  
17 GND0  
16 FB0  
OUT1  
FB1  
6
7
8
9
LDO1 output  
LDO1 feedback input  
internal supply ground  
LDO2 feedback input  
GND  
FB2  
TEA1202TS  
OUT1  
15 V  
ref  
OUT2  
IN2  
10 LDO2 output  
FB1  
14 LBO  
13 LBI1  
12 LBI2  
11 IN2  
11 LDO2 input  
GND  
LBI2  
12 low battery detector input 2  
13 low battery detector input 1  
14 low battery detector output  
15 reference voltage  
FB2  
LBI1  
OUT2 10  
LBO  
Vref  
MGU060  
FB0  
16 DC/DC feedback input  
17 DC/DC converter ground  
GND0  
SYNC/PWM  
18 synchronization clock input or  
PWM-only selection input  
U/D  
LX2  
19 conversion mode selection input  
20 inductor connection 2  
Fig.2 Pin configuration.  
FUNCTIONAL DESCRIPTION  
Control mechanism  
When the output voltage reaches one of the window  
borders, the digital controller immediately reacts by  
adjusting the pulse width and inserting a current step in  
such a way that the output voltage stays within the window  
with higher or lower current capability. This approach  
enables very fast reaction to load variations. Figure 3  
shows the response of the converter to a sudden load  
increase. The upper trace shows the output voltage.  
The TEA1202TS DC/DC converter is able to operate in  
PFM (discontinuous conduction) or PWM (continuous  
conduction) operating mode. All switching actions are  
completely determined by a digital control circuit which  
uses the output voltage level as its control input. This novel  
digital approach enables the use of a new pulse width and  
frequency modulation scheme, which ensures optimum  
power efficiency over the complete range of operation of  
the converter.  
The ripple on top of the DC level is a result of the current  
in the output capacitor, which changes in sign twice per  
cycle, times the internal Equivalent Series Resistance  
(ESR) of the capacitor. After each ramp-down of the  
inductor current, i.e. when the ESR effect increases the  
output voltage, the converter determines what to do in the  
next cycle. As soon as more load current is taken from the  
output the output voltage starts to decay.  
When high output power is requested, the device will  
operate in PWM (continuous conduction) operating mode.  
This results in minimum AC currents in the circuit  
components and hence optimum efficiency, minimum  
costs and low EMC. In this operating mode, the output  
voltage is allowed to vary between two predefined voltage  
levels. As long as the output voltage stays within this  
so-called window, switching continues in a fixed pattern.  
2000 Jun 08  
5
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
load increase  
start corrective action  
V
o
high window limit  
low window limit  
time  
I
L
MGK925  
time  
Fig.3 Response to load increase.  
V
h
2%  
V
h
+2%  
V
l
V
2%  
O
V
h
2%  
V
l
2%  
V
l
maximum  
maximum  
typical  
positive spread  
negative spread  
situation  
MGU061  
Fig.4 Output voltage window spread.  
6
2000 Jun 08  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
When the output voltage becomes lower than the low limit  
of the window, a corrective action is taken by a ramp-up of  
the inductor current during a much longer time. As a result,  
the DC current level is increased and normal PWM control  
can continue. The output voltage (including ESR effect) is  
again within the predefined window.  
Undervoltage lockout  
As a result of too high a load or disconnection of the input  
power source, the output voltage can drop so low that  
normal regulation cannot be guaranteed. In this event, the  
device switches back to start-up mode. If the output  
voltage drops even further, switching is stopped  
completely.  
Figure 4 shows the spread of the output voltage window.  
The absolute value is mostly dependent on spread, while  
the actual window size (Vh Vl) is not affected. For one  
specific device, the output voltage will not vary more  
than 2% (typical value).  
Shut-down  
When the shut-down input is set HIGH, the DC/DC  
converter disables both switches and power consumption  
is reduced to a few microamperes.  
In low output power situations, the TEA1202TS will switch  
over to PFM (discontinuous conduction) operating mode.  
In this mode, regulation information from an earlier PWM  
operating mode is used. This results in optimum inductor  
peak current levels in the PFM mode, which are slightly  
larger than the inductor ripple current in the PWM mode.  
As a result, the transition between PFM and PWM mode is  
optimum under all circumstances. In the PFM mode the  
TEA1202TS regulates the output voltage to the high  
window limit as shown in Fig.3.  
Power switches  
The power switches in the IC are one N-type and one  
P-type power MOSFET, both having a typical  
drain-to-source resistance of 100 m. The maximum  
average current in the power switches is 1.0 A at  
Tamb = 80 °C.  
Temperature protection  
Synchronous rectification  
When the DC/DC converter operates in the PWM mode,  
and the die temperature gets too high (typical value is  
160 °C), the converter and both LDOs stop operating.  
They resume operation when the die temperature falls  
below 90 °C again. As a result, low frequent cycling  
between the on and off state will occur. It should be noted  
that in the event of device temperatures at the cut-off limit,  
the application differs strongly from maximum  
specifications.  
For optimum efficiency over the whole load range,  
synchronous rectifiers inside the TEA1202TS ensure that  
during the whole second switching phase, all inductor  
current will flow through the low-ohmic power MOSFETs.  
Special circuitry is included which detects when the  
inductor current reaches zero. Following this detection, the  
digital controller switches off the power MOSFET and  
proceeds with regulation.  
Current limiters  
Start-up  
If the current in one of the power switches exceeds the  
programmed limit in the PWM mode, the current ramp is  
stopped immediately and the next switching phase is  
entered. Current limiting is required to keep power  
conversion efficient during temporary high loads.  
Furthermore, current limiting protects the IC against  
overload conditions, inductor saturation, etc.  
Start-up from low input voltage in the boost mode is  
realized by an independent start-up oscillator, which starts  
switching the N-type power MOSFET as soon as the  
low-battery detector detects a sufficiently high voltage.  
The inductor current is limited internally to ensure  
soft-starting. The switch actions of the start-up oscillator  
will increase the output voltage. As soon as the output  
voltage is high enough for normal regulation, the digital  
control system takes control over the power MOSFETs.  
The current limiting level is set by an external resistor  
which must be connected between pin ILIM and ground for  
downconversion, or between pins ILIM and UPOUT/DNIN  
for upconversion.  
2000 Jun 08  
7
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
External synchronization and PWM-only mode  
Both LDOs are protected from overload conditions by a  
current limiting circuit and high temperature  
(see Section “Temperature protection”).  
If an external high-frequency clock or a HIGH level is  
applied to pin SYNC/PWM, the TEA1202TS will use PWM  
regulation independent of the load applied.  
Next to normal LDO functions, both regulators can be  
switched off or can be used as switches. Each regulator  
will act as a low-ohmic switch in the on-state when its  
feedback input is connected to ground. When the  
feedback input is higher than 2 V, the regulator will make  
its power FET high-ohmic. So the feedback inputs of the  
regulators can be used as digital inputs which make the  
LDOs behave as switches.  
In the event a high-frequency clock is applied, the  
switching frequency in the PWM mode will be exactly that  
frequency divided by 22. In the PWM mode the quiescent  
current of the device increases.  
In the event that no external synchronization or PWM  
mode selection is necessary, pin SYNC/PWM must be  
connected to ground.  
Low battery detector  
Behaviour at input voltage exceeding the specified  
range  
The low battery detector is an autonomous circuit which  
can work at an input voltage down to 0.90 V. It is always  
on, even when all other blocks are in the shut-down mode.  
In general, an input voltage exceeding the specified range  
is not recommended since instability may occur. There are  
two exceptions:  
The detector has two inputs: the input on pin LBI1 is tuned  
to accept a 1-cell NiCd or NiMH battery voltage directly,  
while the input on pin LBI2 can detect a 2-cell NiCd or  
NiMH battery voltage or higher voltage. The detection level  
of the input on pin LBI2 can be set by using a voltage  
divider between the battery voltage, pin LBI2 and ground.  
Hysteresis is included for proper operating. Furthermore, a  
capacitor of 10 µF (typical value) must be connected  
between pin LBI1 and ground when the input on pin LBI2  
is used.  
1. Upconversion: at an input voltage higher than the  
target output voltage, but up to 5.5 V, the converter will  
stop switching and the external Schottky diode will  
take over. The output voltage will equal the input  
voltage minus the diode voltage drop. Since all current  
flows through the external diode in this situation, the  
current limiting function is not active.  
In the PWM mode, the P-type power MOSFET is  
always on when the input voltage exceeds the target  
output voltage. The internal synchronous rectifier  
ensures that the inductor current does not fall below  
zero. As a result, the achieved efficiency is higher in  
this situation than standard PWM-controlled  
converters achieve.  
The output of the low battery detector on pin LBO is an  
open-collector output. The output is high (i.e. no current is  
sunk by the collector) when the input voltage of the  
detector is below the lower detection level.  
2. Downconversion: when the input voltage is lower than  
the target output voltage, but higher than 2.2 V, the  
P-type power MOSFET will stay conducting resulting  
in an output voltage being equal to the input voltage  
minus some resistive voltage drop. The current limiting  
function remains active.  
Low dropout voltage regulators  
The low dropout voltage regulators are functionally equal  
apart from the shut-down mechanism: LDO2 can be  
controlled separately by pin SHDWN2, while LDO1 is  
controlled by pin SHDWN0 like the DC/DC converter.  
The input voltage of each LDO must be 250 mV higher  
than its output voltage to achieve full specification on e.g.  
ripple rejection. However, the parts will function like an  
LDO down to a margin of 75 mV between input and output:  
the so-called dropout voltage. At a lower margin between  
input and output, the LDOs will behave like a resistor.  
2000 Jun 08  
8
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
SYMBOL  
Vn  
PARAMETER  
voltage on any pin  
CONDITIONS  
shut-down mode  
MIN.  
0.2  
MAX.  
+6.5  
UNIT  
V
V
operating mode  
0.2  
40  
20  
40  
+5.5  
+150  
+80  
Tj  
junction temperature  
°C  
°C  
°C  
V
Tamb  
Tstg  
Ves  
ambient temperature  
storage temperature  
+125  
electrostatic handling voltage  
notes 1 and 2  
Class II  
Note  
1. ESD specification is in accordance with the JEDEC standard:  
a) Human Body Model (HBM) tests are carried out by discharging a 100 pF capacitor through a 1.5 kseries  
resistor.  
b) Machine Model (MM) tests are carried out by discharging a 200 pF capacitor via a 0.75 µH series inductor.  
2. Exception is pin ILIM: 1000 V HBM and 100 V MM.  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
CONDITIONS  
VALUE  
UNIT  
Rth(j-a)  
thermal resistance from junction to ambient in free air  
140  
K/W  
QUALITY SPECIFICATION  
In accordance with “SNW-FQ-611 part E”.  
2000 Jun 08  
9
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
CHARACTERISTICS  
Tamb = 20 to +80 °C; all voltages are measured with respect to ground; positive currents flow into the IC; unless  
otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
DC/DC converter  
UPCONVERSION; pin U/D = LOW  
VI(up)  
input voltage  
VI(start)  
VO(uvlo)  
0.93  
5.50  
V
V
V
V
VO(up)  
VI(start)  
VO(uvlo)  
output voltage  
5.50  
1.00  
2.4  
start-up input voltage  
undervoltage lockout voltage  
IL < 10 mA  
0.96  
2.2  
note 1  
2.0  
DOWNCONVERSION; pin U/D = HIGH  
VI(dwn)  
input voltage  
note 2  
VO(uvlo)  
1.30  
5.50  
5.50  
V
V
VO(dwn)  
output voltage  
REGULATION  
VO(wdw)  
output voltage window size as PWM mode  
a function of output voltage  
1.5  
2.0  
2.5  
%
CURRENT LEVELS  
Iq(DCDC)  
Ishdwn  
Ilim(max)  
Ilim  
quiescent current  
note 3  
0
110  
2
µA  
µA  
A
current in shut-down mode  
maximum current limit  
current limit deviation  
10  
5
Ilim set to 1.0 A; note 4  
upconversion  
12  
12  
+12  
+12  
1.0  
%
%
A
downconversion  
ILX(max)  
maximum continuous current Tamb = 80 °C  
at pins LX1 and LX2  
POWER MOSFETS  
RDSon(N) drain-to-source on-state  
Tj = 27 °C  
Tj = 27 °C  
110  
125  
mΩ  
mΩ  
resistance NFET  
RDSon(P)  
drain-to-source on-state  
resistance PFET  
EFFICIENCY  
η
efficiency upconversion  
VI = 1.2 V; VO up to 3.3 V;  
note 5  
IL = 1 mA  
66  
81  
85  
%
%
%
IL = 10 mA  
IL = 100 mA  
TIMING  
fsw  
switching frequency  
PWM mode  
480  
6
600  
13  
720  
20  
kHz  
fi(sync)  
synchronization clock input  
frequency  
MHz  
tstart  
start-up time  
note 6  
10  
ms  
2000 Jun 08  
10  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
DIGITAL INPUT LEVELS  
VlL(n)  
LOW-level input voltage on all  
0
0.4  
V
digital pins  
VIH(n)  
HIGH-level input voltage  
note 7  
on pins SYNC/PWM,  
SHDWN0 and SHDWN2  
0.55V4  
V4 + 0.3 V  
V4 + 0.3 V  
all other digital input pins  
V4 0.4  
Low dropout voltage regulators; note 8  
VLDO  
output voltage range  
dropout voltage  
VLDO < V4 + 0.4 V  
ILDO = 50 mA; note 9  
ILDO = 50 mA  
1.30  
5.50  
75  
V
Vdropout  
Vdrop  
mV  
mV  
minimum drop voltage for  
functionality within  
specification  
250  
ILDO(max)  
VLDO  
Vline  
Vload  
PSRR  
tres  
maximum output current  
output voltage accuracy  
line voltage regulation  
load voltage regulation  
power supply ripple rejection  
response time  
in regulation  
50  
mA  
%
VI VLDO = 2 V; ILDO = 10 µA 2.0  
+2.0  
VI VLDO > Vdrop  
10 µA < ILDO < 50 mA  
note 10  
1
1
mV  
mV  
dB  
µs  
25  
after load step from no load to  
ILDO(max)  
200  
Iq(LDO)  
quiescent current  
shut-down current  
50  
µA  
µA  
Ishdwn(LDO)  
1
SWITCH CIRCUIT  
RDSon  
drain-to-source resistance in  
VFB1,2 > 2 V; Tj = 27 °C  
200  
mΩ  
switched-on state  
IO(max)  
maximum output current in  
switched-on state  
VFB1,2 > 2 V  
0.40  
0.45  
0.50  
A
Low battery detector  
ILBD  
supply current of detector  
transition time  
VI = 0.9 V  
falling Vbat  
20  
2
µA  
µs  
tt(HL)  
DETECTION INPUT PIN LBI1  
Vdet  
Vhys  
low battery detection level  
falling Vbat  
0.88  
36  
0.90  
40  
0.92  
44  
V
low battery detection  
hysteresis  
mV  
TCVdet  
TCVhys  
temperature coefficient of  
detection level  
0
mV/K  
mV/K  
temperature coefficient of  
detection hysteresis  
0.175  
DETECTION OUTPUT PIN LB0  
IO(sink)  
output sink current  
15  
µA  
2000 Jun 08  
11  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
General characteristics  
Vref  
Iq  
reference voltage  
1.165  
1.190  
270  
1.215  
V
quiescent current at  
pin UPOUT/DNIN  
all blocks operating  
µA  
Tamb  
Tmax  
ambient temperature  
20  
+25  
160  
+80  
170  
°C  
°C  
internal temperature for cut-off  
150  
Notes  
1. The undervoltage lockout level shows wide specification limits since it decreases at increasing temperature. When  
the temperature increases, the minimum supply voltage of the digital control part of the IC decreases and therefore  
the correct operation of this function is guaranteed over the whole temperature range. The undervoltage lockout level  
is measured at pin UPOUT/DNIN.  
2. When VI is lower than the target output voltage but higher than 2.2 V, the P-type power MOSFET will remain  
conducting (duty factor is 100%), resulting in VO following VI.  
3. The quiescent current is specified as the input current in the upconversion configuration at VI = 1.20 V and  
VO = 3.30 V, using L1 = 6.8 µH, R1 = 150 kand R2 = 91 k.  
4. The current limit is defined by resistor R10. This resistor must be 1% accurate.  
5. The specified efficiency is valid when using an output capacitor having an ESR of 0.1 and an inductor of 6.8 µH  
with an ESR of 0.05 and a sufficient saturation current level.  
6. The specified start-up time is the time between the connection of a 1.20 V input voltage source and the moment the  
output reaches 3.30 V. The output capacitance equals 100 µF, the inductance equals 6.8 µH and no load is present.  
7. V4 is the voltage at pin UPOUT/DNIN. If the applied HIGH-level voltage is less than V4 1 V, the quiescent current  
of the device will increase.  
8. Specifications have been verified in the PFM mode.  
9. The dropout voltage is defined as the voltage between the input and the output of the LDO when the output voltage  
has dropped 100 mV below its nominal value. The dropout voltage is measured while the LDO input voltage is  
decreasing and at maximum current.  
10. Measured with a sine wave at fi = 100 Hz to 1 MHz, Vi = 100 mV (RMS) and ILDO = 10 mA.  
2000 Jun 08  
12  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
APPLICATION INFORMATION  
DC/DC  
output  
DC/DC  
UPCONVERTER  
regulator 1  
output  
LDO1  
LDO2  
TEA1202TS  
regulator 2  
output  
LOW BATTERY  
DETECTOR  
low battery  
detection  
equivalent block diagram  
D1  
L1  
R10  
ILIM  
LX1  
1
5
4
UPOUT/DNIN  
DC/DC  
output  
LX2  
IN2  
20  
11  
C1  
R1  
FB0  
C2  
C3  
C4  
16  
R2  
LBI1  
LBI2  
LBO  
U/D  
13  
R7  
OUT1  
regulator 1  
output  
12  
14  
19  
6
7
low battery  
detection  
R3  
FB1  
TEA1202TS  
R4  
external  
clock  
SYNC/PWM  
SHDWN0  
18  
DC/DC  
shut-down  
OUT2  
regulator 2  
output  
2
10  
SHDWN2  
Vref  
regulator 2  
shut-down  
R5  
3
FB2  
15  
9
8
17  
GND0  
C5  
R6  
GND  
MGU063  
Fig.5 Application in 1-cell NiCd or NiMH battery powered equipment.  
13  
2000 Jun 08  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
DC/DC  
output  
DC/DC  
UPCONVERTER  
regulator 1  
output  
LDO1  
LDO2  
TEA1202TS  
regulator 2  
output  
low battery  
detection  
LOW BATTERY  
DETECTOR  
equivalent block diagram  
D1  
L1  
R10  
ILIM  
LX1  
LX2  
1
5
4
UPOUT/DNIN  
DC/DC  
output  
20  
11  
13  
IN2  
C1  
R1  
LBI1  
FB0  
C2  
C3  
C4  
16  
C6  
R8  
R9  
R2  
LBI2  
U/D  
12  
19  
R7  
OUT1  
regulator 1  
output  
6
R3  
TEA1202TS  
LBO  
low battery  
detection  
FB1  
14  
7
R4  
external  
clock  
SYNC/PWM  
SHDWN0  
18  
2
DC/DC  
shut-down  
OUT2  
regulator 2  
output  
10  
9
SHDWN2  
Vref  
regulator 2  
shut-down  
R5  
3
FB2  
15  
8
17  
GND0  
C5  
R6  
GND  
MGU064  
Fig.6 Application in 2-cell NiCd or NiMH battery powered equipment.  
14  
2000 Jun 08  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
control  
regulator 1 switch  
DC/DC  
output  
DC/DC  
UPCONVERTER  
output  
regulator 1  
switch  
SWITCH  
LDO1  
TEA1202TS  
regulator 2  
output  
LDO2  
LOW BATTERY  
DETECTOR  
low battery  
detection  
equivalent block diagram  
D1  
L1  
R10  
ILIM  
LX1  
LX2  
1
5
4
UPOUT/DNIN  
DC/DC  
output  
20  
11  
13  
IN2  
C1  
R1  
LBI1  
FB0  
C2  
16  
C6  
R8  
R9  
R2  
LBI2  
U/D  
12  
R7  
TEA1202TS  
19  
output  
OUT1  
FB1  
regulator 1  
switch  
6
7
LBO  
low battery  
detection  
14  
control  
regulator 1  
switch  
external  
clock  
SYNC/PWM  
SHDWN0  
18  
2
OUT2  
regulator 2  
output  
10  
9
SHDWN2  
Vref  
R5  
3
FB2  
15  
C4  
8
17  
GND0  
C5  
R6  
GND  
MGU065  
Fig.7 Application in 2-cell NiCd or NiMH battery powered equipment with autonomous shut-down at low battery  
voltage and using LDO1 as a switch.  
2000 Jun 08  
15  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
DC/DC  
output  
DC/DC  
DOWNCONVERTER  
regulator 1  
output  
LDO1  
LDO2  
TEA1202TS  
regulator 2  
output  
LOW BATTERY  
DETECTOR  
low battery  
detection  
equivalent block diagram  
R10  
ILIM  
LX2  
LX1  
5
UPOUT/DNIN  
4
20  
1
L1  
D1  
DC/DC  
output  
IN2  
11  
13  
C1  
LBI1  
R1  
R2  
C6  
FB0  
C2  
C3  
C4  
16  
R8  
R9  
LBI2  
U/D  
12  
19  
R7  
OUT1  
FB1  
regulator 1  
output  
6
TEA1202TS  
R3  
R4  
LBO  
low battery  
detection  
7
14  
SYNC/PWM  
SHDWN0  
external  
clock  
18  
2
DC/DC  
shut-down  
OUT2  
FB2  
regulator 2  
output  
10  
9
SHDWN2  
Vref  
regulator 2  
shut-down  
R5  
R6  
3
15  
8
17  
GND0  
C5  
GND  
MGU066  
Fig.8 Application in 3-cell NiCd or NiMH and 1-cell Li-Ion battery powered equipment.  
16  
2000 Jun 08  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
External component selection  
CURRENT LIMITING RESISTOR R10  
INDUCTOR L1  
The maximum instantaneous current is set by the external  
resistor R10. The preferred type is SMD, 1% accurate.  
The performance of the TEA1202TS is not very sensitive  
to inductance value. The best efficiency performance over  
a wide load current range is achieved by using an  
inductance of 6.8 µH e.g. TDK SLF7032 or Coilcraft  
DO1608 range.  
The connection of resistor R10 differs for each mode:  
At upconversion: resistor R10 must be connected  
between pins ILIM and UPOUT/DNIN; the current  
320  
R10  
limiting level is defined by: I Iim  
=
----------  
DC/DC INPUT CAPACITOR C1  
At downconversion: resistor R10 must be connected  
between pins ILIM and GND0; the current limiting level  
The value of C1 strongly depends on the type of input  
source. In general, a 100 µF tantalum capacitor is  
sufficient.  
300  
R10  
is defined by: I Iim  
=
----------  
DC/DC OUTPUT CAPACITOR C2  
The average inductor current during limited current  
operation also depends on the inductance value, input  
voltage, output voltage and resistive losses in all  
components in the power path. Ensure that  
The value and type of C2 depends on the maximum output  
current and the ripple voltage which is allowed in the  
application. Low-ESR tantalum capacitors show good  
results. The most important specification of C2 is its ESR,  
which mainly determines output voltage ripple.  
I
lim < Isat (saturation current) of the inductor.  
REFERENCE VOLTAGE DECOUPLING CAPACITOR C5  
DIODE D1  
Optionally, a decoupling capacitor can be connected  
between pin Vref and ground in order to achieve a lower  
noise level of the output voltages of the LDO. The best  
choice for C5 is a ceramic multilayer capacitor of  
approximately 100 nF.  
The Schottky diode is only used for short time during  
takeover from N-type power MOSFET and P-type power  
MOSFET and vice versa. Therefore, a medium-power  
diode is sufficient in most applications e.g. Philips  
PRLL5819.  
LDO OUTPUT CAPACITORS C3 AND C4  
FEEDBACK RESISTORS R1 AND R2  
A typical LDO output capacitor is a ceramic multilayer  
capacitor of 2.2 µF, e.g. GRM40X5R225K6.3 of Murata.  
The ESR of the output capacitor must be between  
10 and 100 mto achieve stability and the specified  
transient response.  
The output voltage of the DC/DC converter is determined  
by the resistors R1 and R2. The following conditions  
apply:  
Use a 1% accurate SMD type resistors only. If larger  
body resistors are used, the capacitance on pin FB0 will  
be too large, causing inaccurate operation.  
Resistors R1 and R2 should have a maximum value of  
50 kwhen connected in parallel. A higher value will  
result in inaccurate operation.  
Under these conditions, the output voltage can be  
calculated by the formula:  
R1  
R2  
VO = Vref × 1 +  
-------  
2000 Jun 08  
17  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
LDO FEEDBACK RESISTORS R3, R4, R5 AND R6  
LOW BATTERY DETECTOR COMPONENTS R7, R8, R9 AND C6  
The output voltage of each LDO can be set by the external  
feedback resistors. Their values can be derived from the  
formulae:  
Resistor R7 is connected between pin LBO and the input  
or output pin and must be 330 kor higher.  
A 1-cell NiCd or NiMH battery can be connected directly to  
pin LBI1.  
R3  
VO = Vref × 1 +  
V O = V ref × 1 +  
-------  
R4  
A higher battery voltage must be applied to pin LBI2 using  
a divider circuit with resistor R8 and R9. In that situation,  
capacitor C6 (10 µF) must be connected between pin LBI1  
and ground. The low-battery detection level for a higher  
battery voltage can be set by the resistors at pin LBI2  
using the formula:  
R5  
-------  
R6  
The maximum value for each of the LDO feedback  
resistors is 500 k.  
R8  
R9  
V LBI2 = 0.90 × 1 +  
-------  
2000 Jun 08  
18  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
PACKAGE OUTLINE  
SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm  
SOT266-1  
D
E
A
X
c
y
H
v
M
A
E
Z
11  
20  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
10  
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
10o  
0o  
0.15  
0
1.4  
1.2  
0.32  
0.20  
0.20  
0.13  
6.6  
6.4  
4.5  
4.3  
6.6  
6.2  
0.75  
0.45  
0.65  
0.45  
0.48  
0.18  
mm  
1.5  
0.65  
1.0  
0.2  
0.25  
0.13  
0.1  
Note  
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
95-02-22  
99-12-27  
SOT266-1  
MO-152  
2000 Jun 08  
19  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
SOLDERING  
If wave soldering is used the following conditions must be  
observed for optimal results:  
Introduction to soldering surface mount packages  
Use a double-wave soldering method comprising a  
turbulent wave with high upward pressure followed by a  
smooth laminar wave.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(document order number 9398 652 90011).  
For packages with leads on two sides and a pitch (e):  
– larger than or equal to 1.27 mm, the footprint  
longitudinal axis is preferred to be parallel to the  
transport direction of the printed-circuit board;  
There is no soldering method that is ideal for all surface  
mount IC packages. Wave soldering is not always suitable  
for surface mount ICs, or for printed-circuit boards with  
high population densities. In these situations reflow  
soldering is often used.  
– smaller than 1.27 mm, the footprint longitudinal axis  
must be parallel to the transport direction of the  
printed-circuit board.  
Reflow soldering  
The footprint must incorporate solder thieves at the  
downstream end.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
For packages with leads on four sides, the footprint must  
be placed at a 45° angle to the transport direction of the  
printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
Several methods exist for reflowing; for example,  
infrared/convection heating in a conveyor type oven.  
Throughput times (preheating, soldering and cooling) vary  
between 100 and 200 seconds depending on heating  
method.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Typical reflow peak temperatures range from  
215 to 250 °C. The top-surface temperature of the  
packages should preferable be kept below 230 °C.  
Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Wave soldering  
Manual soldering  
Conventional single wave soldering is not recommended  
for surface mount devices (SMDs) or printed-circuit boards  
with a high component density, as solder bridging and  
non-wetting can present major problems.  
Fix the component by first soldering two  
diagonally-opposite end leads. Use a low voltage (24 V or  
less) soldering iron applied to the flat part of the lead.  
Contact time must be limited to 10 seconds at up to  
300 °C.  
To overcome these problems the double-wave soldering  
method was specifically developed.  
When using a dedicated tool, all other leads can be  
soldered in one operation within 2 to 5 seconds between  
270 and 320 °C.  
2000 Jun 08  
20  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
Suitability of surface mount IC packages for wave and reflow soldering methods  
SOLDERING METHOD  
PACKAGE  
BGA, LFBGA, SQFP, TFBGA  
WAVE  
not suitable  
REFLOW(1)  
suitable  
suitable  
suitable  
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS  
PLCC(3), SO, SOJ  
not suitable(2)  
suitable  
LQFP, QFP, TQFP  
not recommended(3)(4) suitable  
not recommended(5)  
suitable  
SSOP, TSSOP, VSO  
Notes  
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum  
temperature (with respect to time) and body size of the package, there is a risk that internal or external package  
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the  
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.  
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink  
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).  
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.  
The package footprint must incorporate solder thieves downstream and at the side corners.  
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;  
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
2000 Jun 08  
21  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
DATA SHEET STATUS  
DATA SHEET STATUS  
PRODUCT  
STATUS  
DEFINITIONS (1)  
Objective specification  
Development This data sheet contains the design target or goal specifications for  
product development. Specification may change in any manner without  
notice.  
Preliminary specification Qualification  
This data sheet contains preliminary data, and supplementary data will be  
published at a later date. Philips Semiconductors reserves the right to  
make changes at any time without notice in order to improve design and  
supply the best possible product.  
Product specification  
Production  
This data sheet contains final specifications. Philips Semiconductors  
reserves the right to make changes at any time without notice in order to  
improve design and supply the best possible product.  
Note  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes, without notice, in the  
products, including circuits, standard cells, and/or  
software, described or contained herein in order to  
improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for  
the use of any of these products, conveys no licence or title  
under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that  
these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified.  
Application information  
Applications that are  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2000 Jun 08  
22  
Philips Semiconductors  
Objective specification  
Battery power unit  
TEA1202TS  
NOTES  
2000 Jun 08  
23  
Philips Semiconductors – a worldwide company  
Argentina: see South America  
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,  
Tel. +31 40 27 82785, Fax. +31 40 27 88399  
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Tel. +61 2 9704 8141, Fax. +61 2 9704 8139  
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Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210  
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Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,  
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773  
Pakistan: see Singapore  
Belgium: see The Netherlands  
Brazil: see South America  
Philippines: Philips Semiconductors Philippines Inc.,  
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,  
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474  
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Tel. +359 2 68 9211, Fax. +359 2 68 9102  
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,  
Tel. +48 22 5710 000, Fax. +48 22 5710 001  
Portugal: see Spain  
Romania: see Italy  
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Tel. +1 800 234 7381, Fax. +1 800 943 0087  
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,  
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,  
Tel. +852 2319 7888, Fax. +852 2319 7700  
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Tel. +7 095 755 6918, Fax. +7 095 755 6919  
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Colombia: see South America  
Czech Republic: see Austria  
Tel. +65 350 2538, Fax. +65 251 6500  
Slovakia: see Austria  
Slovenia: see Italy  
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,  
Tel. +45 33 29 3333, Fax. +45 33 29 3905  
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Germany: Hammerbrookstraße 69, D-20097 HAMBURG,  
Tel. +49 40 2353 60, Fax. +49 40 2353 6300  
Spain: Balmes 22, 08007 BARCELONA,  
Tel. +34 93 301 6312, Fax. +34 93 301 4107  
Hungary: see Austria  
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,  
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745  
India: Philips INDIA Ltd, Band Box Building, 2nd floor,  
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,  
Tel. +91 22 493 8541, Fax. +91 22 493 0966  
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,  
Tel. +41 1 488 2741 Fax. +41 1 488 3263  
Indonesia: PT Philips Development Corporation, Semiconductors Division,  
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,  
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080  
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,  
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874  
Ireland: Newstead, Clonskeagh, DUBLIN 14,  
Tel. +353 1 7640 000, Fax. +353 1 7640 200  
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,  
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,  
Tel. +66 2 745 4090, Fax. +66 2 398 0793  
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,  
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007  
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,  
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813  
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),  
Tel. +39 039 203 6838, Fax +39 039 203 6800  
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,  
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461  
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,  
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057  
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,  
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421  
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,  
Tel. +82 2 709 1412, Fax. +82 2 709 1415  
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,  
Tel. +1 800 234 7381, Fax. +1 800 943 0087  
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,  
Tel. +60 3 750 5214, Fax. +60 3 757 4880  
Uruguay: see South America  
Vietnam: see Singapore  
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,  
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087  
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,  
Middle East: see Italy  
Tel. +381 11 3341 299, Fax.+381 11 3342 553  
For all other countries apply to: Philips Semiconductors,  
Internet: http://www.semiconductors.philips.com  
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,  
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
69  
SCA  
© Philips Electronics N.V. 2000  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
403502/25/01/pp24  
Date of release: 2000 Jun 08  
Document order number: 9397 750 06773  

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