SAA4996H [NXP]
Motion Adaptive Colour Plus And Control IC MACPACIC for PALplus; 运动自适应颜色Plus和控制IC MACPACIC的PALplus
| 型号： | SAA4996H |
| 厂家： | 
NXP |
| 描述： | Motion Adaptive Colour Plus And Control IC MACPACIC for PALplus |
| 文件： | 总60页 (文件大小：263K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
SAA4996H
Motion Adaptive Colour Plus And
Control IC (MACPACIC) for
PALplus
1996 Oct 28
Preliminary specification
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And
Control IC (MACPACIC) for PALplus
SAA4996H
CONTENTS
8
TEST
8.1
8.1.1
Boundary scan test
Identification codes
1
2
3
4
5
6
7
FEATURES
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAMS
PINNING
9
DC CHARACTERISTICS
AC CHARACTERISTICS
Clock buffers
10
10.1
11
12
13
LIST OF ABBREVIATIONS
PACKAGE OUTLINE
SOLDERING
FUNCTIONAL DESCRIPTION
7.1
Introduction
Data processing
Control
General requirements
Hardware configurations and delays
Full PALplus module (see Fig.5)
Stand-alone MACPACIC (see Fig.6)
Analog processing in front of the PALplus
module
13.1
13.2
13.3
13.4
Introduction
Reflow soldering
Wave soldering
7.1.1
7.1.2
7.2
Repairing soldered joints
7.3
14
15
DEFINITIONS
7.3.1
7.3.2
7.4
LIFE SUPPORT APPLICATIONS
7.5
Block diagram
7.6
7.6.1
7.7
7.7.1
7.8
Luminance and helper processing
Input range
Luminance processing
Luminance helper processing
Output signals
7.9
Measurements
7.9.1
7.9.2
Line 22 offset reference measurement
Line 23 and 623 amplitude reference
measurement
7.9.3
7.10
7.10.1
Noise measurement in line 23 and 623
Automatic gain and offset control
SNERT control bits influencing the AGC and
AOC
7.10.2
7.10.3
7.10.4
7.11
Gain control
Offset control
Helper amplitude and bandwidth control
Output range
7.12
Chrominance
7.12.1
7.12.2
7.12.3
7.12.4
7.13
Input range
Chrominance processing
Output signals
Output range
Chrominance motion detection
Intelligent residual cross-luminance reduction
(IRXR)
7.14
7.15
Control
7.15.1
7.15.2
7.15.3
Input reference signals
Functional description
SNERT interface (see application note
AN95XXX)
1996 Oct 28
2
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
The integrated circuit is especially designed to be used in
conjunction with the SAA4997H Vertical Reconstruction IC
(VERIC) to decode the transmitted PALplus video signals
in PALplus colour TV receivers.
1
FEATURES
• Motion adaptive colour plus decoding
• Helper AGC/AOC
• Helper decompanding
• Memory controlling
In addition, a hardware configuration ‘stand-alone
MACPACIC’ with only two field memories (FM1 and FM4)
is also possible. In this condition no helper lines are
processed and no vertical reconstruction is applied.
This configuration enables the Motion Adaptive Colour
Plus processing to be performed in non PALplus receivers.
• VERIC controlling.
2
GENERAL DESCRIPTION
The SAA4996H (MACPACIC) performs the Motion
Adaptive Colour Plus (MACP) processing which is a
dedicated field comb filter technique exploited for the
PALplus system.
3
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN.
4.75
MAX.
5.25
UNIT
VDD
digital supply voltage
V
Tamb
Tdie
operating ambient temperature
die temperature
0
+70
°C
°C
−
+125
4
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
SAA4996H
QFP100
SOT317-1
plastic quad flat package; 100 leads (lead length 1.95 mm);
body 14 × 20 × 2.7 mm; high stand-off height
1996 Oct 28
3
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
5
BLOCK DIAGRAMS
SAA4996H
60, 59,
57 to 52
17 to 24
1 to 8
8
8
8
8
Y_ADC
Y_FM1
Y_MA
LUMINANCE AND
HELPER PROCESSING
37 to 44
45
Y_TO_FM1
YL
U_TO_FM1_0
U_MA, V_MA
61, 62,
63, 64
4
4
15, 16,
13, 14
U_ADC
V_ADC
4
4
46, 47,
48
4
3
3
WE_FM2 / U_TO_FM1_1
WE_FM3 / V_TO_FM1_1
RSTW_FM23 / V_TO_FM1_0
1
0
CHROMINANCE
PROCESSING
3
MUX
11, 12,
9, 10
U_FM1
V_FM1
SEL
IVericN
91, 92,
89, 90
CS
UV_IFA
U_TO_FM4
V_TO_FM4
99
100
94
95
93
79
80
28
76
77
78
RE_FM1
WE_FM1
RE_FM4
WE_FM4
RST_FM14
VA_AI
85, 86,
87, 88
CHROMINANCE
MOTION DETECTION
AND IRXR
U_FM4
V_FM4
4
CONTROL
HREF_MA
WE_MA
81
29
36
VA_FRONT
CLAMP
EVEN_FIELD
FILM
WE_FRONT
INTPOL
3
3
98, 75, 35
51, 31, 65
control
CLK_16B1,2,3
CLK_32B1,2,3
CLK_16i
CLK_32i
82
83
84
SNERT_DA
SNERT_CL
SNERT_RST
CLOCK
BUFFER
68
TDO_MA
SNERT INTERFACE
TEST
25, 49,
67, 73,
96
26, 50,
66, 74,
97
30,
32, 34
58
VERIC_AV_N
27 33
70 72 71 69
V
to V
CLK_16
CLK_32
TDI
TMS
TEST1,2,3
SS1
to V
SS5
TCK TRSTN
MHA133
V
DD1
DD5
Fig.1 Block diagram.
4
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM1A37
1996 Oct 28
5
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM1A38
1996 Oct 28
6
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
6
PINNING
SYMBOL
Y_FM1_7
PIN
DESCRIPTION
1
CVBS/helper/luminance input data bit 7 from FM1
CVBS/helper/luminance input data bit 6 from FM1
CVBS/helper/luminance input data bit 5 from FM1
CVBS/helper/luminance input data bit 4 from FM1
CVBS/helper/luminance input data bit 3 from FM1
CVBS/helper/luminance input data bit 2 from FM1
CVBS/helper/luminance input data bit 1 from FM1
CVBS/helper/luminance input data bit 0 from FM1
chrominance input data bit 0 from FM1
Y_FM1_6
Y_FM1_5
Y_FM1_4
Y_FM1_3
Y_FM1_2
Y_FM1_1
Y_FM1_0
V_FM1_0
V_FM1_1
U_FM1_0
U_FM1_1
V_ADC_0
V_ADC_1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
chrominance input data bit 1 from FM1
chrominance input data bit 0 from FM1
chrominance input data bit 1 from FM1
chrominance input data bit 0 from ADC
chrominance input data bit 1 from ADC
U_ADC_0
U_ADC_1
Y_ADC_0
Y_ADC_1
Y_ADC_2
Y_ADC_3
Y_ADC_4
Y_ADC_5
Y_ADC_6
Y_ADC_7
VDD1
chrominance input data bit 0 from ADC
chrominance input data bit 1 from ADC
CVBS/helper/luminance data input bit 0 from ADC
CVBS/helper/luminance data input bit 1 from ADC
CVBS/helper/luminance data input bit 2 from ADC
CVBS/helper/luminance data input bit 3 from ADC
CVBS/helper/luminance data input bit 4 from ADC
CVBS/helper/luminance data input bit 5 from ADC
CVBS/helper/luminance data input bit 6 from ADC
CVBS/helper/luminance data input bit 7 from ADC
positive supply voltage 1
VSS1
negative supply voltage 1
CLK_16
16 MHz line-locked system clock input pulse
write enable output signal; defines active video data
horizontal reference input pulse
WE_MA
CLAMP
TEST1
test pin 1; must be LOW during normal operation
32 MHz line-locked clock output pulse
CLK_32B2
TEST2
test pin 2; must be LOW during normal operation
32 MHz line-locked system clock input pulse
test pin 3; must be LOW during normal operation
16 MHz line-locked clock output pulse
CLK_32
TEST3
CLK_16B3
WE_FRONT
write enable input signal used as horizontal reference in the event of active
data
36
Y_TO_FM1_0
Y_TO_FM1_1
Y_TO_FM1_2
37
38
39
CVBS/helper/luminance output data bit 0 to FM1; stand-alone MACPACIC
CVBS/helper/luminance output data bit 1 to FM1; stand-alone MACPACIC
CVBS/helper/luminance output data bit 2 to FM1; stand-alone MACPACIC
1996 Oct 28
7
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
SYMBOL
Y_TO_FM1_3
PIN
40
41
42
43
44
45
46
DESCRIPTION
CVBS/helper/luminance output data bit 3 to FM1; stand-alone MACPACIC
CVBS/helper/luminance output data bit 4 to FM1; stand-alone MACPACIC
CVBS/helper/luminance output data bit 5 to FM1; stand-alone MACPACIC
CVBS/helper/luminance output data bit 6 to FM1; stand-alone MACPACIC
CVBS/helper/luminance output data bit 7 to FM1; stand-alone MACPACIC
chrominance output data to FM1; stand-alone MACPACIC
Y_TO_FM1_4
Y_TO_FM1_5
Y_TO_FM1_6
Y_TO_FM1_7
U_TO_FM1_0
WE_FM2/U_TO_FM1_1
for full PALplus module; write enable for FM2 for stand-alone MACPACIC;
chrominance output to FM1
RSTW_FM23/V_TO_FM1_0
WE_FM3/V_TO_FM1_1
47
48
for full PALplus module; reset write for FM2/FM3 for stand-alone
MACPACIC; chrominance output to FM1
for full PALplus module; write enable for FM3 for stand-alone MACPACIC;
chrominance output to FM1
VDD2
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
positive supply voltage 2
VSS2
negative supply voltage 2
CLK_32B1
Y_MA_0
Y_MA_1
Y_MA_2
Y_MA_3
Y_MA_4
Y_MA_5
VERIC_AV_N
Y_MA_6
Y_MA_7
U_MA_0
U_MA_1
V_MA_0
V_MA_1
CLK_32B3
VSS3
32 MHz line-locked clock output pulse
luminance output data bit 0 from MACPACIC
luminance output data bit 1 from MACPACIC
luminance output data bit 2 from MACPACIC
luminance output data bit 3 from MACPACIC
luminance output data bit 4 from MACPACIC
luminance output data bit 5 from MACPACIC
input configuration signal VERIC available (VERIC_AV_N = 0)
luminance output data bit 6 from MACPACIC
luminance output data bit 7 from MACPACIC
chrominance output data bit 0 from MACPACIC
chrominance output data bit 1 from MACPACIC
chrominance output data bit 0 from MACPACIC
chrominance output data bit 1 from MACPACIC
32 MHz line-locked clock output pulse
negative supply voltage 3
VDD3
positive supply voltage 3
TDO_MA
TRSTN
TDI
boundary scan test: data output signal
boundary scan test: reset input signal
boundary scan test: data input signal
boundary scan test: multiplexer set input
boundary scan test: clock input signal
positive supply voltage 4
TMS
TCK
VDD4
VSS4
negative supply voltage 4
CLK_16B2
EVEN_FIELD
16 MHz line-locked clock output pulse
even field =0 = odd input field; even field =1 = even input field
1996 Oct 28
8
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
SYMBOL
PIN
DESCRIPTION
FILM
77
control output signal to select film or camera mode in VERIC;
FILM = 0: camera mode; FILM = 1: film mode; FILM = 1 and INTPOL = 0;
bypass mode for MultiPIP
INTPOL
VA_AI
78
79
INTPOL = 0 = vertical interpolation in the VERIC not active;
INTPOL = 1 = vertical interpolation in the VERIC active
vertical reference output pulse or vertical reference input pulse in MultiPIP
mode
HREF_MA
80
81
horizontal reference output pulse
VA_FRONT
vertical reference input pulse or vertical reference output pulse in MultiPIP
mode
SNERT_DA
82
Synchronous No parity Eight bit Reception and Transmission (SNERT)-bus
data
SNERT_CL
SNERT_RST
U_FM4_0
U_FM4_1
V_FM4_0
V_FM4_1
V_TO_FM4_1
V_TO_FM4_0
U_TO_FM4_1
U_TO_FM4_0
RST_FM14
RE_FM4
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
SNERT-bus clock
SNERT-bus reset
chrominance input data bit 0 from FM4
chrominance input data bit 1 from FM4
chrominance input data bit 0 from FM4
chrominance input data bit 1 from FM4
chrominance output data bit 1 to FM4
chrominance output data bit 0 to FM4
chrominance output data bit 1 to FM4
chrominance output data bit 0 to FM4
reset read/write FM1 and FM4 output
read enable FM4 output
WE_FM4
write enable FM4 output
VDD5
positive supply voltage 5
VSS5
negative supply voltage 5
CLK_16B1
RE_FM1
16 MHz line-locked clock output pulse
read enable FM1 output
WE_FM1
write enable FM1 output
1996 Oct 28
9
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Y_FM1_7
Y_FM1_6
Y_FM1_5
Y_FM1_4
Y_FM1_3
Y_FM1_2
Y_FM1_1
Y_FM1_0
V_FM1_0
V_FM1_1
U_FM1_0
1
2
80
79
78
77
76
75
74
73
72
71
HREF_MA
VA_AI
3
INTPOL
4
FILM
5
EVEN_FIELD
CLK_16B2
6
7
V
SS4
8
V
DD4
9
TCK
10
11
TMS
70 TDI
U_FM1_1 12
69
68
67
66
65
64
63
TRSTN
13
14
V_ADC_0
V_ADC_1
TDO_MA
V
DD3
U_ADC_0 15
U_ADC_1 16
V
SS3
SAA4996H
CLK_32B3
V_MA_1
V_MA_0
17
18
Y_ADC_0
Y_ADC_1
Y_ADC_2 19
Y_ADC_3 20
62 U_MA_1
61 U_MA_0
Y_ADC_4
21
60
59
Y_MA_7
Y_MA_6
Y_ADC_5 22
Y_ADC_6 23
58 VERIC_AV_N
57 Y_MA_5
24
25
26
Y_ADC_7
V
56
55
Y_MA_4
Y_MA_3
DD1
V
SS1
CLK_16 27
54 Y_MA_2
53 Y_MA_1
28
29
WE_MA
CLAMP
52
51
Y_MA_0
TEST1 30
CLK_32B1
MHA134
Fig.4 Pin configuration.
10
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
7
FUNCTIONAL DESCRIPTION
Introduction
7.1.2
CONTROL
Memory control, PALplus system controlling and clock
generation (from the incoming 16 MHz and 32 MHz
line-locked clocks) are implemented in the MACPACIC.
All clocks and control signals necessary for the PALplus
module (excluding read control of FM2/FM3) are
generated in the controller part. Inputs are reference
signals, clocks and control signals delivered by the
colour/helper decoder IC (TDA9144), and the 100 Hz
memory controller, i.e. ECO4 (SAA4952) or ECOBENDIC
(SAA4970). The MACPACIC also receives control
information via a three-wire serial interface (SNERT-bus)
from the microprocessor in the 100 Hz feature box.
7.1
The MACPACIC is designed to be used in the PALplus
decoder module of a PALplus colour TV receiver. The full
PALplus decoder module consists of two special
integrated circuits and four field memories, as illustrated in
Fig.5.
The special ICs are as follows;
• Motion Adaptive Colour Plus And Control IC
(MACPACIC) for PALplus (SAA4996H)
• Vertical Reconstruction IC (VERIC) (SAA4997H).
Besides the full PALplus module, a configuration for
stand-alone Motion Adaptive Colour Plus processing
(MACP) is also possible (see Fig.6). In this event only
MACPACIC with FM1 and FM4 are necessary.
This configuration enables the MACP processing in
non-PALplus receivers to be performed.
7.2
General requirements
The PALplus IC set is designed to operate in conjunction
with the PHILIPS 100 Hz feature box. All requirements
with respect to this combination are fulfilled.
The special requirements are as follows;
The PALplus module is designed to operate in conjunction
with a 100 Hz feature box. All special requirements such
as the delay of the PALplus module, bypass modes and
generation of the necessary control and clock signals will
be fulfilled.
• The signal processing is adapted to the analog
preprocessing in the TDA9144 for luminance, helper
and chrominance signals
• Clock rate and clock generation
• Some special control signals are generated in the
PALplus module
7.1.1
DATA PROCESSING
The MACPACIC includes the decompanding functions for
the helper lines and the motion adaptive
luminance/chrominance separation in accordance with the
PALplus system description REV. 3.0 with some
modifications;
• The field length must be measured and used to set the
delay of the full PALplus module to 1.5 fields
• A SNERT interface is used to transfer control data to
and from the PALplus module
• MultiPIP with the help of a PIP module is possible
• The system operates at a clock frequency of 16 MHz
• The Y:U:V format is 4:1:1 instead of 4:2:2
• Results of noise measurements influence the helper
processing
• The filter DEC_MD_UV_LPF is not implemented
• Automatic gain and offset control is implemented
• If noisy helper signals are received, the helper
bandwidth and/or amplitude can be reduced
• Reference signals in line 22 are used for inverse set-up
operation
• Automatic gain control of the helper signal with respect
to the luminance signal.
• Noise measurement implemented
• Boundary scan test implemented
The input signals are the BB(helper)/CVBS and
chrominance signals which are derived from the
analog-to-digital converter (ADC).
• Preset of internal recursive parts for testing.
At its outputs the MACPACIC delivers separate luminance
and chrominance signals, each one free from
cross-artefacts as main signal, as well as decompanded
and filtered helper signals. For standard input signals and,
in the event of MultiPIP mode with the help of a
PIP module, the MACPACIC can be switched to different
bypass modes.
1996 Oct 28
11
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
7.3
Hardware configurations and delays
7.4
Analog processing in front of the PALplus
module
Two general hardware configurations are possible.
In front of the MACPACIC an analog colour/helper
decoder (TDA9144) performs the colour and helper
demodulation.
7.3.1
FULL PALPLUS MODULE (see Fig.5)
The delay from input to output is 1.5 fields rounded to
complete lines, also in the bypass mode. Therefore, the
number of input lines of the odd and even fields must be
measured. The result of this measurement is then used to
generate the required delay.
Because of the requirement that a standard ADC with
clamping on 16 should be used for CVBS and helper
analog-to-digital conversion, a black (letter box lines) and
mid grey (helper lines) shift is applied in the colour/helper
decoder. For reshifting without errors in the digital domain
these shift levels are inserted as a reference in line 22.
In the MultiPIP mode the delay of the full PALplus module
is one line.
In the event of stand-alone MACPACIC and PALplus input
signals the helper demodulation must be switched off.
7.3.2
STAND-ALONE MACPACIC (see Fig.6)
No special actions are taken in the colour/helper decoder
for chrominance processing.
In this situation only the MACPACIC with FM1 and FM4
are necessary. No helper lines are processed and no
vertical reconstruction with the VERIC is applied.
The delay from input to output is one field, one line and
some clocks of processing delay, this also applies in the
bypass mode. In the MultiPIP mode the delay is two clocks
(CLK_16).
In this document U will refer to −(B − Y) and V will refer to
−(R − Y).
In combination with the full PALplus module with letter box
input signals (16:9), the PAL delay line of the colour/helper
decoder must be switched off. This is because this function
is also implemented in the vertical reconstruction filter of
the VERIC. For all other input signals and for stand-alone
MACPACIC the PAL delay line must be switched on.
1996 Oct 28
12
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
SAA4996H
SAA4997H
Y_VE_0...7
3
3
CLK_16B1, 2, 3
CLK_32B1, 2, 3
8
Y_VE_[0...7]
CLK_32B1
8
Y_ADC_0...7
Y_FRONT[0...7]
8
8
8
4
FIELD MEMORY
Y_FM23_0...7
8
4
FIELD MEMORY
FM1
Y_FM1_0...7
FM2
8
4
4
8
U_FM23_0,1
V_FM23_0,1
4
8
Y_MA_0...7
U_FM1_0,1
V_FM1_0,1
FIELD MEMORY
FM3
SWCK
SRCK
U_MA_0,1
V_MA_0,1
CLK_16B1
U_VE_[0,1]
V_VE_[0,1]
U_VE_0,1
V_VE_0,1
4
4
4
CLK_16
4
U_ADC_0,1
V_ADC_0,1
U_FRONT[0,1]
V_FRONT[0,1]
CLK_32B3
8
Y_TO_FM1_0...7
U_TO_FM1_0
5
BB-DECOMPANDING
INVERSE QMF
RECONSTRUCTION
FILTER
V
(1)
4
DD1-5
WE_FM2
5
V
DD1-4
V
U_TO_FM1_1
4
SS1-5
MOTION ADAPTIVE
LUMINANCE /
CHROMINANCE
SEPARATION
V
SS1-4
(1)
RSTW_FM23
V_TO_FM1_0
CLK_16
CLK_32
CLK_16B2
CLK_32B3
(1)
TDO_VE
OE_FM2
OE_FM3
RE_FM2
RE_FM3
RSTR_FM23
WE_FM3
VERTICAL
CHROMINANCE
SRC
VA_FRONT
WE_FRONT
CLAMP
V_TO_FM1_1
HREF_MA
VA_AI
MEMORY CONTROL
PALplus CONTROL
CLOCK GENERATION
SYNC GENERATION
SNERT INTERFACE
2
2
WE_FM1, RE_FM1
RST_FM14
SNERT_DA
SNERT_CL
SNERT_RST
FILM
EVEN_FIELD
INTPOL
WE_FM4, RE_FM4
FM2 / FM3
READ CONTROL
VA_AI
WE_MA
HREF_MA
TRSTN
TDI
TRSTN
TDI
FILM
TMS
TCK
TMS
TCK
EVEN_FIELD
INTPOL
3
3
TEST1-3
(2)
TEST1-3
NC
TDO_MA
U_FM4_0,1
U_TO_FM4_0,1
11
VERIC_AV_N
V_TO_FM4_0,1 V_FM4_0,1
4
MHA136
4
FIELD MEMORY
FM4
CLK_16B1
(1) In case of stand-alone MACPACIC the output signals are U_TO_FM1_1, V_TO_FM1_0 or V_TO_FM1_1.
Otherwise the output signals are WE_FM2, RSTW_FM23 or WE_FM3.
(2) VERIC available: VERIC_AV_N is connected to VSS
.
Fig.5 PALplus decoder module.
13
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
8
Y_TO_FM1_0...7
Y_TO_FM1_0
8
Y_ADC_0...7
Y_FRONT[0...7]
8
4
8
FIELD MEMORY
FM1
Y_FM1_0...7
Y_MA_0...7
Y_MA_0...7
U_FM1_0,1
V_FM1_0,1
4
U_MA_0,1
V_MA_0,1
U_MA_0,1
V_MA_0,1
SWCK
SRCK
RSTW_FM23
V_TO_FM1_0
(1)
(1)
(1)
SAA4996H
CLK_16B1
CLK_16
4
WE_FM2
U_TO_FM1_1
U_ADC_0,1
V_ADC_0,1
U_FRONT[0,1]
V_FRONT[0,1]
WE_FM3
V_TO_FM1_1
5
V
DD1-5
5
V
SS1-5
MOTION ADAPTIVE
LUMINANCE /
CHROMINANCE
SEPARATION
CLK_16
CLK_32
3
3
CLK_16B1, 2, 3
CLK_32B1, 2, 3
VA_FRONT
WE_FRONT
CLAMP
MEMORY CONTROL
PALplus CONTROL
CLOCK GENERATION
SYNC GENERATION
SNERT INTERFACE
2
2
WE_FM1, RE_FM1
RST_FM14
SNERT_DA
SNERT_CL
SNERT_RST
WE_FM4, RE_FM4
VA_AI
WE_MA
HREF_MA
TRSTN
TDI
FILM
TMS
TCK
EVEN_FIELD
INTPOL
3
TEST1-3
(2)
TDO_MA
U_FM4_0,1
U_TO_FM4_0,1
VERIC_AV_N
V_TO_FM4_0,1 V_FM4_0,1
4
4
FIELD MEMORY
FM4
CLK_16B1
MHA135
(1) In case of stand-alone MACPACIC the output signals are U_TO_FM1_1, V_TO_FM1_0 or V_TO_FM1_1.
Otherwise the output signals are WE_FM2, RSTW_FM23 or WE_FM23.
(2) VERIC not available: VERIC_AV_N is connected to VDD
.
Fig.6 Stand-alone MACPACIC.
14
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
7.5
Block diagram
7.7
Luminance processing
The functional block diagram of the MACPACIC for
PALplus is illustrated in Fig.1. The device consists of
4 main parts:
The luminance and the helper processing have two input
branches. One input is an 8-bit wide 16 MHz data stream
from the ADC. The other is an 8-bit wide 16 MHz data
stream from the field memory (FM1). The odd field of an
input frame is stored in the field memory FM1. In the even
field of a frame, the even field together with the delayed
odd field is processed by the MACPACIC.
• Luminance and helper processing
• Chrominance processing
• Chrominance motion detection
• Control.
To remove the chrominance part of the incoming
composite video signal, the Motion Adaptive Colour Plus
technique is applied. Colour Plus is a dedicated comb filter
technique, which makes full use of the correlation of two
successive fields.
The clock rate of the input data is 16 MHz. Internally, the
device operates at a 32 MHz clock frequency. The clock
rate of the output data is either 32 MHz (in combination
with FM2, FM3 and VERIC) or 16 MHz for stand-alone
MACP processing.
During processing the data of the odd and even fields are
separated in a high-pass and low-pass part. The high-pass
part consists of the luminance high-pass component and
the modulated chrominance signal. Due to the phase
difference of the colour carrier of 180° from the odd to the
even field, the chrominance signal can be removed by
adding the high-pass signals.
The delay of the full PALplus module is 1.5 fields in the
PALplus and bypass mode. A field length measurement is
implemented. For MultiPIP with the help of a PIP module
the delay of the PALplus module is one line.
For stand-alone MACP the delay is one field, one line and
some clocks of processing delay.
This processing will work successfully in the film mode,
because scanned film material is motionless within the two
fields of one frame. In the camera mode a motion detector
fades down the luminance high-pass component if motion
is detected.
For MultiPIP with the help of a PIP module the delay of
MACPACIC is two clocks (CLK_16).
7.6
Luminance and helper processing
7.6.1
INPUT RANGE
The following vertical low-pass filters perform a vertical
interpolation of the high-pass part by the factor of two.
To use a standard ADC with clamping on 16, a black
set-up for the CVBS signal and a black/mid grey set-up for
the helper signal has to be performed in the colour/helper
decoder. The shift values for black set-up and mid grey
set-up are inserted in line 22.
In the event of bad signal conditions, the residual
cross-luminance signal, caused by clock jitter between two
fields, can be reduced by using this filter as a 2D comb
filter. Therefore different sets of coefficients can be
selected via SNERT.
All values are nominal values.
The luminance high-pass part and the luminance low-pass
part are then added.
CVBS:
clamp level: 16
black set-up: 51
white: 191
The automatic gain control (AGC) and automatic offset
control (AOC) functions use reference lines 23,
623 and 22 to reduce errors in the vertical reconstruction
in the VERIC. This is to reduce the effects of any errors
that might be caused due to variations in the conventional
PAL references in the signal during the transmission chain
with respect to the levels of the luminance letter box and
helper signals.
format: 8-bit, straight binary
Helper:
mid grey set-up: 121
range: (121 − 60) to (121 + 60) = 61 to 181
format: 8-bit, offset binary
Y (standard input):
black: 16
peak white: 191
format: 8-bit, straight binary
1996 Oct 28
15
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
The content and the timing of the reference lines are
illustrated in Figs 13, 14 and 15.
7.7.1
LUMINANCE HELPER PROCESSING
In the event of incoming helper, the switchable low-pass
filter acts as an inverse shaping and bandwidth reduction
filter for the helper lines. If a distorted helper signal is
transmitted, the bandwidth can be reduced from 2.2 MHz
(0 dB) to 1.0 MHz or to 0.5 MHz (−3 dB).
7.9.1
LINE 22 OFFSET REFERENCE MEASUREMENT
Due to the fact that a standard ADC with a clamping level
of 16 should be inserted for CVBS and helper
analog-to-digital conversion, a black offset for the letter
box lines and a mid grey offset for the helper lines are
carried out in the colour/helper decoder. These offset
values are inserted as references in line 22 to reshift the
CVBS and helper signals in the digital domain without
errors. Therefore, a measurement of the offsets in line 22
is necessary. The average value of the real offset is
calculated from 64 samples and substacted from the
CVBS and helper signal. The CVBS and helper input
signal are illustrated in Fig.16.
The high-pass part of the luminance processing is not
used for the helper processing.
To stabilize the transmitted helper signal against noise
disturbances, the encoder performs a companding of the
signal. In the decoder the decompanding is performed in
the AGOC block (see Fig.7).
7.8
Output signals
In the event of full PALplus configuration, odd and even
field data are multiplexed to a 32 MHz data stream.
7.9.2
LINE 23 AND 623 AMPLITUDE REFERENCE
MEASUREMENT
For the stand-alone MACPACIC, the processed even field
data is connected to the field memory FM1 and the odd
field data is switched to the output Y_MA. In the next field
the stored even field data is read out of the field memory
FM1 and then connected to the output of the MACPACIC.
The helper and luminance amplitude measurement
consists of averaging 64 samples each of;
Helper zero (MHZ).
Helper maximum (MHM).
Luminance black (MLB).
Luminance white (MLW).
If MultiPIP mode is selected, the luminance input data from
the ADC (Y_ADC) is switched directly to the output Y_MA.
In the bypass mode the luminance data processing is
switched off and multiplexed data is connected to the
MACPACIC output.
Measured helper amplitude = helper maximum minus
helper zero.
The clock frequency of the output data Y_MA is 32 MHz for
the MACPACIC in combination with the VERIC, or 16 MHz
for the stand-alone MACPACIC.
Measured luminance amplitude = luminance white minus
luminance black.
Frame integration is performed with a feed back factor of
(1 − K) = 1⁄16. The frame integration part can be preset with
the first measured value. Preset is controlled with the
preset bit transmitted via SNERT.
7.9
Measurements
The digital data stream at the input of the PALplus decoder
module contains three reference lines;
7.9.3
NOISE MEASUREMENT IN LINE 23 AND 623
• Reference line 22 consists of the black and mid grey
set-up, inserted by the colour/helper decoder
For the helper lines the noise measurement is carried out
in reference line 23 and for the letter box lines in reference
line 623. Both measurements are active in the black
reference levels of line 23 and line 623 respectively.
The processing of the noise measurement for the helper
signal and the letter box signal is performed in the same
way.
• The second half of line 23 contains the black level
reference and the maximum negative reference for the
PALplus helper lines
• The first half of line 623 contains reference values for
the black level and the peak white level for the main
lines.
First the average value of 64 samples is calculated.
The single actual sample values are subtracted from this
average value and the sum of these absolute differences
are frame integrated. The integration factor is 1 − K = 1⁄16.
The reference lines 23 and 623 are generated by the
PALplus encoder and are used to reduce the effects of any
errors that might be caused due to variations in the
transmission chain with respect to the levels of the
luminance letter box and helper signals.
1996 Oct 28
16
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
The frame integration part can be preset with the first
measured value. Preset is controlled via a bit from the
SNERT interface.
The helper amplitude is reduced when the measured noise
exceeds a certain threshold level. These thresholds are
conveyed via the SNERT-bus. The reduction of the helper
amplitude, before decompanding, ensures that more noise
is cancelled by the coring. The adaptive helper gain control
is switched off when the SNERT bits HlpM1 and HlpM0 are
both at logic 1. In this condition the helper gain is defined
by the values FixHlp and FixMain via the SNERT-bus.
7.10 Automatic gain and offset control
The automatic gain and offset control circuit evaluates the
results of the reference data, which are derived from
reference lines 22, 23 and 623 to eliminate any offset and
gain differences between the letter box lines and the
helper lines. This is caused during transmission of the
video signal.
If the measured helper or luminance amplitude is below
the threshold level, or when line 22 is not valid, the helper
is switched off.
7.10.3 OFFSET CONTROL
7.10.1 SNERT CONTROL BITS INFLUENCING THE AGC AND
AOC
As long as line 22 reference is present, luminance and
helper offset are controlled by line 22. If line 22 is not valid
the offset value is fixed to 16.
MacpOn: If line 22 is not detected this bit will be ignored
and the MACP processing (and thus AGC and AOC) is
switched off.
For luminance offset control a hysteresis function,
controlled by SNERT, is applied to the measured
luminance offset.
FilmOn: If line 22 is not detected, the VERIC operates in
Camera mode.
HlpM1, HlpM0: In adaptive and fixed helper processing
modes (HlpM1 = 1, HlpM0 = X) AGC and AOC are
achieve.
7.10.4 HELPER AMPLITUDE AND BANDWIDTH CONTROL
In the event of noisy helper signals the helper amplitude
and bandwidth can be reduced to avoid disturbances in
the inverse QMF processing in VERIC.
Table 1 Control bits HlpM1 and HlpM0
Five thresholds are therefore transmitted via SNERT.
These thresholds are compared with the measured helper
noise value. The results are used to control a state
machine with five states.
HlpM1
HlpM0
FUNCTION
0
0
no helper processing
(any aspect ratio, without helper)
0
1
1
0
helper set to zero
(up-conversion without helper)
The state machine is initialized with the preset bit from
SNERT or when line 22 is valid for the first time.
adaptive helper processing (helper
processing controlled by reference
amplitudes and noise in the helper
channel)
The output states are used to control the helper amplitude
and bandwidth as shown in Fig.8 and Tables 2 and 3.
7.11 Output range
1
1
fixed helper processing (fixed gain
values loaded via SNERT-bus)
Luminance lines: straight binary, black = 16, white = 191.
PALplus helper lines: offset binary, 128 ±70.
7.10.2 GAIN CONTROL
If line 22 reference is present in a frame, the luminance
input signal contains black set-up and reduced amplitude.
The luminance gain then is 1.25. If line 22 is not valid the
luminance gain is 1.0.
The helper gain is controlled by the measured helper
amplitude in line 23 to match the helper amplitude to the
decompanding table. After decompanding the helper
amplitude is controlled by the measured luminance
amplitude in line 623, to obtain the correct
luminance/helper ratio for the QMF filter in the VERIC.
1996 Oct 28
17
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM3A0
bnok,lfuapgedwith
1996 Oct 28
18
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
state machine
handbook, halfpage
output
4
3
2
1
0
Measured Helper
Noise (MHN)
MHA295
Fig.8 Helper bandwidth and amplitude reduction.
Table 2 Measured Helper Noise in Zero (MHNZ)
MHNZ
MHNZ < HlpRedThr1
STATE MACHINE (OLD)
STATE MACHINE (NEW)
X
4
4
4
3
3
2
2
1
1
0
0
HlpRedThr1 ≤ MHNZ < HlpRedThr2
HlpRedThr2 ≤ MHNZ < HlpRedThr3
HlpRedThr3 ≤ MHNZ < HlpRedThr4
HlpRedThr4 ≤ MHNZ < HlpRedThr5
<4
≥3
<3
≥2
<2
≥1
0
HlpRedThr5 ≤ MHNZ
X
Table 3 State machine output
STATE MACHINE OUTPUT REDUCE HELPER BANDWIDTH (RHB) REDUCE HELPER AMPLITUDE (RHA)
4
3
2
1
0
0 (2.2 MHz LPF)
1 (1.0 MHz LPF)
1 (1.0 MHz LPF)
2 (0.5 MHz LPF)
2 (0.5 MHz LPF)
2; note 1
2
1; note 2
1
0; note 3
Notes
1. No helper amplitude reduction.
2. Helper amplitude reduction via LUT of about 50%.
3. Helper signal zero.
1996 Oct 28
19
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Odd and even field data are multiplexed and connected to
the output of MACPACIC.
7.12 Chrominance
7.12.1 INPUT RANGE
The chrominance processing has two input branches (see
Fig.9). One input branch is the direct chrominance input
path from the ADC. The other input branch is the output of
the field memory FM1. The odd field of a frame is stored in
the field memory FM1. In the even field of a frame the
delayed odd field and the incoming even field are
The input is a 4:1:1 sequential 4-bit wide UV signal with a
16 MHz clock frequency. Originally the U and V signals
were 8 bits wide with a sampling frequency of 4 MHz each.
The range is 0 ±90 in two’s complement format for
U and V.
processed with the motion adaptive colour plus algorithm
to the cross-colour free chrominance output data.
7.12.2 CHROMINANCE PROCESSING
By adding the incoming chrominance signals of the odd
and even fields, the intra frame average chrominance
signal (UVifa) is generated.
The Motion Adaptive Colour Plus technique is also applied
in the chrominance processing to remove the luminance
part from the incoming demodulated UV signal.
For the chrominance motion detector this signal is stored
after formatting in the memory FM4 (UV_TO_FM4).
In the modulated domain the chrominance signal can be
generated by subtracting the odd and even field data due
to the 180° phase difference of the colour subcarrier.
The colour decoder eliminates the phase difference of the
chrominance signals, but now the luminance signals will
obtain the phase difference of 180°.
7.12.3 OUTPUT SIGNALS
The output data rate is 32 MHz for MACPACIC in
combination with VERIC and 16 MHz for stand-alone
MACPACIC or in the MultiPIP mode.
By adding the odd and even field data, the cross-colour
free chrominance signal (UVifa) is generated.
In the MultiPIP mode the chrominance data from the ADC
(UV_ADC) is switched directly to the output UV_MA.
This processing will work successfully in the film mode,
because scanned film material is motionless within the two
fields of one frame. In the camera mode, where each field
represents an individual picture, a motion detector fades
down the chrominance high-pass component if motion is
detected.
In the bypass mode the chrominance data processing is
switched off and the multiplexed odd and even field data
are connected to the MACPACIC output.
7.12.4 OUTPUT RANGE
When chrominance motion occurs, the encoder fades
down the high-pass luminance signal. In that event, the
motion detector in the decoder will switch the chrominance
part from intra frame average processing to the incoming
data.
The range is 0 ±90 in two’s complement format for
U and V.
(even)
UV_ADC
0
1
MUX
MUX
LM
UV_TO_FM1
CS
UVifa
+
MUX
from motion
detector
MUX
UV_out
0
1
UV_FM1
UV_ADC
LM
UV_FM1
(odd)
UV_TO_FM4
to motion detector
MHA299
Fig.9 Chrominance processing.
20
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
When the sampling grid is not optimum (e.g. shifted a little
in one field with respect to the other field), the cancellation
of both modulated colour signals will not be complete and
some residual XL will remain. The amount of residual XL
is proportional to the amplitude of the modulated colour
signal and to the following formula;
7.13 Chrominance motion detection
The PALplus system has two modes of operation.
These are called film mode, which is only used with film
sources, and camera mode which is applied for normal
50 Hz interlaced video sources. The motion detector is
only necessary in the camera mode because, in the
film mode, the two fields of a frame are sampled from the
same picture of the film.
sin (π × f_sc × timing_error)
The timing error is determined by the type of circuitry used
for the sync/clock generation and by the amount of
noise/disturbance in the input signal (more
The chrominance motion detector has two input branches
(see Fig.10). One input branch is the intra frame average
of the actual frame, the other input branch is the intra
frame average signal of the previous frame. This signal is
delivered by the field memory FM4.
noise/disturbance generally leads to larger timing errors).
The intelligent residual cross-luminance reduction (IRXR)
tries to cancel this residual cross-luminance (XL), by
reducing the amount of YH depending of the amplitude of
the modulated colour signal.
Subtraction of the two intra frame average signals
generates the chrominance inter frame difference.
The saturation indication signal (SD) is generated by the
intra frame average signal of the actual frame with the help
of a look-up table (LUT). A horizontal interpolation filter
interpolates a 16 MHz saturation detection signal SD.
PAL averaging eliminates phase errors. This PAL
averaging can be switched off when the PAL delay line in
the colour decoder is active.
A look-up table (LUT) generates the motion signal from the
chrominance signal. A comparator generates a
chrominance control switch signal (CS). A horizontal
interpolation filter interpolates a 16 MHz motion signal.
The motion high-pass luminance control signal M_YL is
provided by another LUT.
Another LUT transforms the SD signal into the signal
SD_YL, which determines the amount of YH to be
reduced. Different characteristics curves of the LUT can
be selected either via SNERT (SEL_SD_YL) or
automatically depending on the measured noise value
(SelSdYl), see Fig.11 and Table 4.
7.14 Intelligent residual cross-luminance reduction
(IRXR)
The IRXR function can be disabled or enabled via SNERT
by the EN_IRXR bit.
The IRXR block diagram is illustrated in Fig.10.
The output signal YL is generated from the three YH
reduction signals SD_YL, M_YL and NM_YL.
The MACP algorithm requires good stability of the
sampling clock between both fields, because samples
from both fields will be combined, in order to suppress
cross-colour and cross-luminance. Investigations with
currently used sync/clock circuitry have shown that the
stability of these clocks is not as good as it should be for
perfect performance of the MACP algorithm.
This combination is performed with a minimum detection
circuit. The amount of YH that is allowed is the lowest of
the three input signals. Whenever one input signal
indicates a reason to reduce the YH, this should be
performed independently of the other input signals.
In the event of film mode the signals NM_YL (Fig.12 and
Table 5) and M_YL are over-written with the value 4.
Motion detector processing is not active for these signals
in the film mode. Such film overriding is not allowed for the
SD_YL signal, because the residual XL can occur in the
film mode as well as in the camera mode.
When a MACP signal is received the colour subcarrier trap
in the TDA9144 is bypassed and the input signal of the
SAA4996H still contains the modulated colour component.
The MACP technique always processes corresponding
lines of two successive fields (having an offset of
312 lines). These lines will have the same high-frequency
luminance information (YH) and inverted colour
information due to the phase/line relationship in PAL.
With an ideal sampling grid, the two inverted colour signals
will be cancelled completely by addition so that no
cross-luminance (XL) remains in the resulting picture.
1996 Oct 28
21
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM2A98
a n d b o o k , f u l l p a g e w
1996 Oct 28
22
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
state machine
handbook, halfpage
output
state machine
handbook, halfpage
output
3
2
1
0
2
1
0
Measured Helper
Noise Zero (MHNZ)
Measured Luminance
Noise in Black (MLNB)
MHA297
MHA296
Fig.11 Generation of the signal SelSdYl.
Fig.12 Generation of the signal NM_YL.
Table 4 Measured luminance noise in black (MLNB)
MLNB
MLNB < SatYhThr1
STATE MACHINE (OLD)
STATE MACHINE (NEW)
X
3
3
3
2
2
1
1
0
0
SatYhThr1 ≤ MLNB < SatYhThr2
<3
≥2
<2
≥1
0
SatYhThr2 ≤ MLNB < SatYhThr3
SatYhThr3 ≤ MLNB < SatYhThr4
SatYhThr3 ≤ MLNB
X
Table 5 Generation of the signal NM_YL
MHNZ
STATE MACHINE (OLD)
STATE MACHINE (NEW)
NM_YL
MHNZ < MacpYhThr1
X
2
2
4
MacpYhThr1 ≤ MHNZ < MacpYhThr2
2
1
1
0
0
4
2
2
0
0
<2
≥1
<1
X
MacpYhThr2 ≤ MHNZ < MacpYhThr3
MacpYhThr3 < MHNZ
1996 Oct 28
23
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
255
line time
reference point = half amplitude
of the falling synchronisation slope
191
22 µs
mid grey set-up
121
31 µs
11 µs
black set-up
51
clamp level
16
0
0
5
10
15
20
25
30
35
40
45
50
55
60
65
MHA148
Fig.13 Digital representation of the reference signal in line 22 at the input of the PALplus decoder module.
255
line time
reference point = half amplitude
of the falling synchronisation slope
wide screen signalling bits
191
black level
reference 121
maximum negative
reference
61
10.5 µs
51
41 µs
10.83 µs
51 µs
16
0
clamp level
5
0
10
15
20
25
30
35
40
45
50
55
60
65
MHA149
Fig.14 Digital representation of the reference signal in line 23 at the input of the PALplus decoder module.
1996 Oct 28
24
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
255
line time
reference point = half amplitude
of the falling synchronisation slope
white level reference
191
30 µs
20 µs
black level
reference
10.5 µs
51
clamp level
16
0
0
5
10
15
20
25
30
35
40
45
50
55
60
65
MHA150
Note: There is no burst in line 623.
Fig.15 Digital representation of the reference signal in line 623 at the input of the PALplus decoder module.
255
white
191
181
121
mid grey set-up
61
black set-up
51
16
0
clamp level
MHA151
CVBS (EBU colour bar with 100% saturation and
75% amplitude) with black set-up
base band helper with mid grey set-up
Fig.16 PALplus CVBS and helper input signal.
25
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
255
WHITE 191
BLACK 16
(clamp level)
0
MHA154
Fig.17 Non PALplus Y input signal.
255
WHITE 191
BLACK 16
0
MHA155
Fig.18 Y output signal.
26
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
255
198
128
58
16
0
MHA152
Fig.19 Helper output signal.
typical digital values
127
90
60
30
0
–30
–60
–90
52 µs
12 µs
–128
EBU Colour Bar
MHA153
Fig.20 −(B − Y) input and output signal.
1996 Oct 28
27
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
typical digital values
+127
+90
+76
+14
0
−14
−76
−90
52 µs
12 µs
−128
EBU Colour Bar
MHA294
Fig.21 −(R − Y) input and output signal.
CLK_16
WE_FRONT
Y_ADC_0...7
U_ADC_1
U_ADC_0
V_ADC_1
V_ADC_0
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
Y0
U70
U60
V70
V60
Y1
U50
U40
V50
V40
Y2
U30
U20
V30
V20
Y3
Y4
Y5
Y838
U3836
U2836
V3836
V2836
Y839
U1836
U0836
V1836
V0836
XX
XX
XX
XX
XX
U010
U00
V10
V00
U74
U64
V74
V64
U54
U44
V54
V44
MHA163
Fig.22 Horizontal data input timing.
28
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
CLK_16
CLK_32
Y_MA_0..7
U_MA_1
U_MA_0
V_MA_1
V_MA_0
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
Y0A Y0B Y1A Y1B Y2A Y2B Y3A Y3B Y4A Y4B
XX U70A U50A U30A U10A U60B U40B U20B U00B U64A U44A
XX U60A U40A U20A U00A U70B U50B U30B U10B U74A U54A
XX V70A V50A V30A V10A V60B V40B V20B V00B V64A V44A
XX V60A V40A V20A V00A V70B V50B V30B V10B V74A V54A
MHA156
U60A
bit
field
word
Fig.23 Horizontal output signals, full PALplus module.
CLK_16
Y_MA_0...7
U_MA_1
U_MA_0
V_MA_1
V_MA_0
XX
XX
XX
XX
XX
Y0
Y1
Y2
Y3
Y4
Y5
Y838
Y839
XX
XX
XX
XX
XX
U70
U60
V70
V60
U50
U40
V50
V40
U30
U20
V30
V20
U010
U00
V10
V00
U74
U64
V74
V64
U54
U44
V54
V44
U3836
U2836
V3836
V2836
U1836
U0836
V1836
V0836
MHA157
Fig.24 Horizontal output signals, stand-alone MACPACIC.
29
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
CLK_16
Y_FM1_0...7
U_FM1_1
U_FM1_0
V_FM1_1
V_FM1_0
XX
XX
XX
XX
XX
Y0
Y1
Y2
Y3
Y4
Y5
Y838
Y839
XX
XX
XX
XX
XX
U70
U60
V70
V60
U50
U40
V50
V40
U30
U20
V30
V20
U010
U00
V10
V00
U74
U64
V74
V64
U54
U44
V54
V44
U3836
U2836
V3836
V2836
U1836
U0836
V1836
V0836
MHA160
Fig.25 Horizontal timing, data from FM1.
CLK_16
Y_TO_FM1_0...7
U_TO_FM1_1
U_TO_FM1_0
V_TO_FM1_1
V_TO_FM1_0
XX
XX
XX
XX
XX
XX
XX
Y0
Y1
Y2
Y3
U010
U00
V10
V00
Y838
U3836
U2836
V3836
V2836
Y839
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
U70
U60
V70
V60
U50
U40
V50
V40
U30
U20
V30
V20
U1836
U0836
V1836
V0836
MHA161
Fig.26 Horizontal timing, data to FM1 for stand-alone MACPACIC.
30
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
CLK_16
U_FM4_1
U_FM4_0
V_FM4_1
V_FM4_0
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
U70
U60
V70
V60
U50
U40
V50
V40
U30
U20
V30
V20
U010
U00
V10
V00
U3836
U2836
V3836
V2836
U1836
U0836
V1836
V0836
XX
XX
XX
XX
MHA158
Fig.27 Horizontal timing, input signals from FM4.
CLK_16
U_TO_FM4_1
U_TO_FM4_0
V_TO_FM4_1
V_TO_FM4_0
XX
XX
XX
XX
XX
XX
U70
U60
V70
V60
U50
U40
V50
V40
U30
U20
V30
V20
U010
U00
V10
V00
U3836
U2836
V3836
V2836
U1836
U0836
V1836
V0836
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
MHA159
Fig.28 Horizontal timing, output signals to FM4.
31
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
FIELD A
line number
21
22
23
24
black and mid grey set-up reference line
wide screen signalling bits reference signals
helper (36 lines)
('black band')
59
60
letter box (215 lines)
274
275
helper (36 lines)
('black band')
310
311
FIELD B
335
336
helper (36 lines)
('black band')
371
372
letter box (215 lines)
586
587
helper (36 lines)
('black band')
622
623
624
reference signals
MHA147
Fig.29 PALplus frame.
32
1996 Oct 28
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
The rising edge of WE_FRONT marks the horizontal
location of the first active input data of MACPACIC.
7.15 Control
The control part (see Fig.2) generates all necessary
internal control signals for the MACPACIC, the external
control signals for the field memories FM1 to FM4 and the
control signals for the VERIC. All of these signals are
derived from the mode bits transmitted via the SNERT
interface or from the reference input pins.
The signal WE_MA defines the horizontal and vertical
active area in which the first field memory (FM5) of the
succeeding 100 Hz feature box stores incoming data.
The signal WE_MA is generated by comparing (via the
SNERT interface) the transmitted start and stop values
with the values of the display line counter and the pixel
counter 1.
7.15.1 INPUT REFERENCE SIGNALS
The horizontal reference signal is the rising edge of the
CLAMP input pulse generated by the 100 Hz memory
controller (see Fig.30). The rising edge of WE_FRONT
defines the first active horizontal sample of the incoming
data Y_FRONT. The vertical reference signal is the rising
edge of VA_FRONT (see Fig.32), derived from the
synchronisation IC (e.g. TDA9144).
The pixel counter 2 is preset with the rising edge of
WE_FRONT in such a way that the counter has the value
‘1’ when the first active input data pixel is valid at the
Y, UV_ADC input of MACPACIC. This counter is a 10-bit
modulo 1024 counter clocked with CLK_16I.
7.15.2.1 Memory control
For PALplus input signals line 24 is the first processed line
related to VA_FRONT. When MACP or standard input
signals are used, line 21 is the first processed line related
to VA_FRONT.
The output of pixel counter 2 is used to generate the
horizontal read and write enable signals for FM1 and FM4
and the write enable signals for the field memories FM2
and FM3. The read cycle for FM2 and FM3 is controlled by
the VERIC.
7.15.2 FUNCTIONAL DESCRIPTION
The horizontal read and write signals are different for the
full PALplus module, for stand-alone MACPACIC and for
the odd and even fields. Therefore, the signals IVericN and
EVEN_FIELD are also input to the pixel decoder.
The acquisition line counter (ACQ) is preset with the
delayed rising edge of VA_FRONT (see Fig.2). With the
‘VA_FRONT Delay’ circuit it is possible to shift the rising
edge of VA_FRONT in multiples of CLK_16 clock periods.
This feature is necessary for unambiguous odd/even field
detection. The delay can be set via the SNERT interface.
The output of the acquisition line counter is used to
generate the vertical part of the read and write enable
signals for FM1 and FM4 and the vertical part of the write
enable signals for the field memories FM2 and FM3.
The vertical read cycle for FM2 and FM3 is controlled by
the VERIC.
The ACQ line counter is preset with logic 1 at the
beginning of the odd and even fields. The counter is
enabled with the rising edge of the clamp signal.
The display line counter (DSP) is used in the event of a
stand-alone MACPACIC (IVericN = 1) and is also preset
with the delayed rising edge of VA_FRONT. If VERIC is
available the field length measurement is active.
The display line counter is preset at the beginning of a
displayed odd and even field with the rising edge of VA_AI
set to logic 1.
The horizontal and vertical component of the read and
write enable signals are different for the full PALplus
module and for the stand-alone MACPACIC. The line
values for the memory controlling are shown in Tables 6,
7 and 8.
The pixel counter 1 is preset with the rising edge of the
CLAMP pulse. The counter is clocked with the 16 MHz
clock signal CLK_16I.
1996 Oct 28
33
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
VIDEO
INPUT FROM
TDA9144
CLAMP
t
WE_F
WE_FRONT
MHA144
tWE_F: CLAMP phase to WE is programmable via SNERT-bus.
Fig.30 Timing diagram of the horizontal reference input signals.
1996 Oct 28
34
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Table 6 Pixel values for horizontal memory control
EVEN_FIELD
IVericN
H_WE_FM1 H_RE_FM1 H_WE_FM2 H_WE_FM3 H_WE_FM4 H_RE_FM4
0
0
1
1
0
1
0
1
0 to 839
2 to 841
−
−
−
−
−
−
24 to 863
0 to 839
0 to 839
−
27 to 866
−
−
27 to 866
−
−
−
9 to 848
9 to 848
0 to 839
0 to 839
26 to 865
Table 7 Line values for vertical memory control, PALplus signals
EVEN_FIELD
IVericN
V_WE_FM1 V_RE_FM1 V_WE_FM2 V_WE_FM3 V_RE_FM4 V_WE_FM4
0
0
1
0
1
0
21 to 311
21 to 311
−
−
−
−
−
−
−
−
−
−
21 to 311
20 to 310
24 to 59
60 to 166
21 to 311
21 to 311
167 to 274
275 to 310
1
1
22 to 312
20 to 310
−
−
21 to 311
21 to 311
Table 8 Line values for vertical memory control, MACP and standard signals
EVEN_FIELD
IVericN
V_WE_FM1 V_RE_FM1 V_WE_FM2 V_WE_FM3 V_RE_FM4 V_WE_FM4
0
0
1
1
0
1
0
1
21 to 311
21 to 311
−
−
−
−
−
−
21 to 311
20 to 310
20 to 310
−
21 to 166
−
−
167 to 311
−
−
−
21 to 311
21 to 311
21 to 311
21 to 311
22 to 312
The horizontal and vertical memory control signals are
combined in the H/V logic to generate the memory read
and write signals.
7.15.2.2 The output signal HREF_MA
The signal HREF_MA is generated by delaying the
CLAMP input signal two clocks CLK_16. The HREF_MA
signal is used in the VERIC as a clock pulse for the internal
line counter. The timing is illustrated in Fig.34.
In all modes, except the MultiPIP mode, the signal
VA_RES is used as a reset signal for the field memories
FM1 to FM4 (RSTW_FM23 and RST_FM14). If the
MultiPIP mode is selected, the signal VA_AI is an input
signal generated by an external memory controller. In this
event the signal VA_AI_DIFF is used as RSTW_FM23.
The signal WE_FM2 is set to logic 1 and all other read and
write enable signals are set to logic 0. If the stand-alone
MACPACIC and MultiPIP mode is selected, all memory
control signals are set to logic 0.
7.15.2.3 VERIC control output signals
In the VERIC control decoder of MACPACIC the output
signals FILM and INTPOL are generated as shown in
Table 9.
The output pins 46 to 48 have different output signals
depending on the environment in which MACPACIC is
used. If it is part of a full PALplus module these pins deliver
bits of chrominance data, in the stand-alone MACPACIC
mode they output memory control signals
(see Chapter “Pinning”). Selection of either mode is
performed by the control signal IVericN.
1996 Oct 28
35
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Table 9 Generation of the signals FILM and INTPOL
22Valid
FilmOn
Mpip
HlpM0
HlpM1
FILM
INTPOL
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
The odd/even field detection can be inverted by the
SNERT control bit InvO/E.
7.15.2.4 Field length measurement
On the full PALplus module the field length is measured in
the MACPACIC.
It is also possible to define the EVEN_FIELD signal by
software via a SNERT transmission.
The ACQ line counter counts the lines between two
succeeding vertical pulses. The one-line-long vertical
output signal VA_AI has a delay of 1.5 fields with respect
to the delayed VA_FRONT input signal and has the same
phase relationship to the CLAMP input signal for various
video input signals (VCR, NTSC).
7.15.2.6 Pins VA_FRONT and VA_AI
The signals VA_FRONT and VA_AI have bidirectional
functions. In all modes, except the MultiPIP mode, the pin
VA_FRONT is an input pin and the pin VA_AI is an output
pin. If the MultiPIP mode is selected the pin VA_AI is an
input pin and the signal is connected to the VA_FRONT pin
which now becomes an output pin (see Fig.2 and Fig.35).
For the stand-alone MACPACIC the 2.5 H signal
VA_FR_DEL is selected by the control signal IVericN as
the vertical reference output signal VA_AI.
7.15.3 SNERT INTERFACE (SEE APPLICATION NOTE
AN95XXX)
7.15.2.5 Field detection
To detect the current odd or even field, the location of the
delayed VA_FRONT (VA_RES) input signal inside a line
has to be located.
In the SNERT interface the external signals SNERT_CL
and SNERT_DA are processed to address and data.
A synchronisation to the bus performed with the reset
signal SNERT_RST. The transmitted data is valid with the
next rising edge of SNERT_RST.
For a PALplus video input signal the output signal
EVEN_FIELD is generated by enabling a register with the
VA_RES signal, which has the MSB of the pixel counter 2
at the D input.
The block diagram and the data, clock and reset timing of
the SNERT interface are shown in Fig.3 and Fig.36.
In the bypass or MultiPIP mode the toggle function of the
register is active.
1996 Oct 28
36
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
7.15.3.1 Serial interface protocol
7.15.3.2 Special SNERT transmission requirements
Power-on state: After power-on the serial interface is in
an unknown state. The information in the actual data
registers is random. When signals are applied to
SNERT_CL and SNERT_DA in this state, the behaviour is
unpredictable.
EVEN_FIELD definition:
After switching on the MACPACIC, the EVEN_FIELD
output signal toggles.
When the EVEN_FIELD signal accidentally toggles in the
right way (EVEN_FIELD = 0, odd field) and when a
PALplus input signal is present, the line 22 is detected.
Then the internal field detection is active and the normal
data processing starts up.
Initialization state: After power-on, or in any other state,
the initialization state is entered after the rising edge of the
signal SNERT_RST. The SNERT clock counter C1 is
reset with the rising edge of SNERT_RST. The data
registers remain loaded with the last transmitted values.
When the EVEN_FIELD signal toggles in the wrong way
(EVEN_FIELD = 0, even field), line 22 will never be
detected and the field detection remains in this wrong
behaviour.
Address reception state: After reset the address
reception state is entered. On each negative edge of
SNERT_CL the next data bit from SNERT_DA is shifted
into the input shift register. The counter is incremented
with each rising edge of SNERT_CL. After the 8th negative
edge of SNERT_CL the Address Latch Enable (ALE)
pulse is generated. With this enable pulse the contents of
the shift register is loaded into the address register. If an
address in the range 50H to 64H, 67H or 68H is decoded,
one of the 8-bit wide input data registers is selected.
Solution: After switching on the MACPACIC or after
switching into PALplus or MACP mode, the EVEN_FIELD
output signal has to be defined by the control bits
‘EnPreEvFld’ and ‘PreEvFld’ of the control 6 SNERT
register.
Luminance offset hysteresis control:
For luminance offset control a hysteresis function is
applied to the measured luminance offset. The hysteresis
function is controlled by the three black offset hysteresis
control bits BOH0, BOH1 and BOH2 transmitted via
SNERT (control 5 data register).
Data reception state: If a valid address is received, the
next eight bits on SNERT_DA are considered as data bits.
When the 8 data bits have been shifted into the shift
register the counter enables the loading of the data word
in one of the 23 data registers in combination with the
decoded address.
To guarantee the correct hysteresis function, the following
software actions are necessary:
There are three data register banks;
• The actual data register bank
• The acquisition data register bank
• The synchronizing register bank.
First the hysteresis has to be set to zero via SNERT
(BOH = 0). After a PALplus input signal is detected (line 22
is valid), the actual black offset is measured in the next
frame. During this time (40 ms) the software remains in the
stand-by position. One of the possible hysteresis values
can then be transmitted via SNERT.
After a SNERT transmission is completed another
SNRST pulse must follow in order to enable the
acquisition registers and make the data valid.
The synchronizing registers are enabled with the signals
‘line2_odd_every_field’ respectively ‘line2_every_field’,
which are related to the vertical reference input signal
VA_FRONT.
Data send state: If the transmitted address is 65H or 66H,
the ‘send_rcv’ signal defines the SNERT_DA pin as an
output and, with the positive edge of the next
8 SNERT_CL pulses generated by the microcontroller, the
data output register is read out.
1996 Oct 28
37
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Asndtaorview
715.3
1996 Oct 28
38
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
7.15.3.4 Command explanation
Table 11 Control1
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
50
W
7
Preset
0: normal processing
1: abandon the recursive measurement loops and load the circuits
with actual video data
6
MacpOn
0: Motion Adaptive Colour Plus decoding not activated
1: Motion Adaptive Colour Plus decoding activated
5, 4
HlpM1 and HlpM0 00: bypass mode VERIC
01: vertical up-conversion without use of helper
10: vertical enhancement with adaptive helper processing
11: vertical enhancement with helper amplitude and main
reference via SNERT interface
3
FilmOn
0: camera mode activated
1: film mode activated
2, 1 MotVis1 and MotVis0 00: don’t show motion decisions
01: show Y motion decisions
10: show C motion decisions
11: show M motion decisions
0
InvO/E
0: don’t invert EVEN_FIELD definition
1: invert EVEN_FIELD definition
Table 12 Control2
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
51
W
7
Mpip
0: MultiPIP mode not active
1: MultiPIP with the help of PIP module is activated; VA_AI is set
to input and VA_FRONT to output; the signal at the WE_FRONT
pin is used
6 to 4 VaDel2, VaDel1 and internal delay of VA_FRONT in multiples of CLK_16 clock periods;
VaDel0
range: [0, 64, 128 to 448] CLK_16 periods; this feature is required
for unambiguous Odd/Even field detection
3
FastTest
0: normal mode: activating new SNERT commands at frame
boundaries related to VA_FRONT (address 50H to 57H and 68H)
1: activating new SNERT commands immediately
2, 1
0
WeShift16_1 and
WeShift16_0
shift of WE_MA of 0 to 3 16 MHz samples related to the positive
edge of CLAMP
EnIRXR
0: disable Intelligent Residual cross-luminance Reduction
1: enable Intelligent Residual cross-luminance Reduction
1996 Oct 28
39
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Table 13 Programming of WE_MA
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
52
W
W
7 to 0 WeStrtH distance between rising edge of CLAMP and rising edge of WE_MA in
multiples of 4 CLK_16 periods
53
7 to 0 WeStpH distance between rising edge of CLAMP and falling edge of WE_MA in
multiples of 4 CLK_16 periods
54
55
56
57
W
W
W
W
7 to 0 WeStrtV0 number of lines between rising edge of VA_AI (VA_FRONT) and first active
WE_MA line
7 to 0 WeStrtV1
7 to 0 WeStpV0 number of lines between rising edge of VA_AI (VA_FRONT) and first
non-active WE_MA line
7 to 0 WeStpV1
WeStrtH, WeStpH, WeStrtV and WeStpV:
signals WeShift16_0 and WeShift16_1 shifts the active
horizontal area over 0 to 3 clock periods of 16 MHz. In this
case the positive as well as the negative edge will shift
over the same amount of samples.
The horizontal reference is the rising edge of the CLAMP
signal. The vertical reference is the rising edge of the
VA_FRONT signal. This signal is set via software. Signals
WeStrtH and WeStpH define the horizontal active area.
Signals (WeStrtV0 and WeStrtV1) and
(WeStpV0 and WeStpV1) mark the vertical active area.
The least significant bit of the start and stop address is also
the most significant bit of the data.
WeStrtV0 indicates the vertical start addresses 1 to 256
and WeStrtV1 indicates the addresses 257 to 512.
The vertical start at line 1 is not allowed. WeStpV0
indicates the vertical stop addresses 1 to 256 and
WeStpV1 indicates the addresses 257 to 512.
Because the number of 16 MHz samples in a line is 1024,
and one data byte can only define 256 positions, the
horizontal start and stop positions are defined with a
4 MHz resolution. To reach the full 16 MHz resolution the
If WeStrtH = WeStpH and WeStrtV0 = WeStpV0 or
WeStrtV1 = WeStpV1 the output control signal WE_MA is
switched to a LOW level and no data will be written into the
succeeding module (still picture).
WeStrtH
WeStpH
WeStrtV
WeStpV
MHA145
Fig.31 Boundaries of the WE_MA signal.
1996 Oct 28
40
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Table 14 Helper Reduction Thresholds
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
58
59
5A
5B
5C
W
W
W
W
W
7 to 0 HlpRedThr1 5 thresholds defining the ranges in which the 5 modes for adaptive helper
reduction will be applied (inclusive hysteresis); this adaptivity prevents
from artefacts of helper noise break through
7 to 0 HlpRedThr3
7 to 0 HlpRedThr2
7 to 0 HlpRedThr4
7 to 0 HlpRedThr5
Table 15 Definition of Y_HP Reduction Thresholds related to MACP
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
5D
W
W
W
7 to 0 MacpYhThr1 3 thresholds defining the ranges in which the 3 modes for adaptive Yhp
reduction will be applied (inclusive hysteresis)
5E
7 to 0 MacpYhThr2
5F
7 to 0 MacpYhThr3
Table 16 Definition of Y_HP Reduction Thresholds related to PLL disturbances
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
60
61
62
63
W
W
W
W
7 to 0
7 to 0
7 to 0
7 to 0
IrxrThr1
IrxrThr2
IrxrThr3
IrxrThr4
4 thresholds defining the ranges in which the 4 modes for the intelligent
residual cross-luminance reduction will be applied; this adaptivity prevents
from artefacts caused by the PLL disturbance
Table 17 Definition of fixed helper gain and relative main amplitude (FixHlpMain)
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
64
W
7 to 4
3 to 0
FixHlp3,
FixHlp2,
FixHlp1,
FixHlp0
definition of helper gain
FixMain3, definition of relative main amplitude (letter box)
FixMain2,
FixMain1,
FixMain0
1996 Oct 28
41
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Table 18 Control3
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
65
R
7 to 5
4
X
no function
22Valid
0: correct MACP and/or helper processing is not possible and is
automatically switched off; helpers are blanked and MACPACIC is forced
into camera mode; reference levels of line 22 are not valid
1: correct MACP and/or helper processing could be possible; reference
levels of line 22 are valid
3
2
623Valid 0: correct helper processing is not possible and is automatically switched
off; reference values of line 623 are not valid
1: correct helper processing could be possible; reference values of line 623
are valid
23Valid
0: correct helper processing is not possible and is automatically switched
off; reference values of line 23 are not valid
1: correct helper processing could be possible; reference values of line 23
are valid
1
0
IVericN
0: VERIC available
1: VERIC not available
IMacpacicN 0: MACPACIC available
1: MACPACIC not available
Table 19 Control4
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
66
R
7
X
no function
6, 5
SelSdYl1, indication of the Y_HP reduction factor, which is further saturation
SelSdYl0 dependent; these are deduced from the noise within full band (line 623)
4, 3
NmYl1,
NmYl0
indication of the Y_HP reduction factor deduced from the noise within the
helper (line 23)
2 to 0 Rha/Rhb2, indication of the amount of helper bandwidth reduction and helper amplitude
Rha/Rhb1, reduction; these are deduced from the noise within the helper (line 23)
Rha/Rhb0
1996 Oct 28
42
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Table 20 Control5
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
67
W
7 to 5 BOH2, BOH1, selection of black offset hysteresis:
BOH0
000: 0
001: ±1
010: ±2
011: ±3
100: ±4
101: ±5
110: ±6
111: fixed black offset (51)
4, 3
VAA1 and
VAA0
selection of the coefficients of the luminance vertical anti-alias filter
(DEC_Y_VAA): see Table 21
2, 1 SEL_SD_YL1, selection of IRXR characteristics (NAIRXR = 0): see Table 22
SEL_SD_YL0
0
NAIRXR
0: IRXR table selection dependent of SEL_SD_YL
1: noise adaptive IRXR table selection
Table 21 DEC_Y_VAA
SELECTION OF THE LUMINANCE VERTICAL ANTI-ALIAS FILTER (DEC_Y_VAA)
VAA1
VAA0
FIELD
COEFF1
COEFF2
COEFF3
0
0
0
1
1
0
0
1
0
1
odd
even
X
2
−1
2
7
7
4
2
0
−1
2
2
X
3
3
X
4
4
Table 22 IRXR
SELECTION OF IRXR CHARACTERISTICS (NAIRXR = 0)
SEL_SD_YL
0
4
4
4
4
1
4
4
4
4
2
3
4
4
4
3
2
3
4
4
4
1
2
4
4
5
0
1
3
4
6
0
0
3
4
7
0
0
2
3
8
0
0
2
3
9
0
0
1
2
A
0
0
1
2
B
0
0
0
1
C
0
0
0
0
D
E
0
0
0
0
F
0
0
0
0
0
1
2
3
0
0
0
0
1996 Oct 28
43
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
Table 23 Control6
ADDRESS
R/W BIT
NAME
FUNCTION
(HEX)
68
W
7
6
Interlace
0: incoming video signal is defined as ‘non interlaced’
1: incoming video signal is defined as ‘interlaced’
EnPreEvFld 0: EVEN_FIELD signal defined internally
1: EVEN_FIELD signal defined by SNERT transmission: PreEvFld
5
PreEvFld 0: incoming field is defined as ‘Odd’
1: incoming field is defined as ‘Even’
4 to 0
X
no function
8
TEST
8.1
Boundary scan test
Boundary Scan Test (BST) is supported. See boundary scan specification: “IEEE Standard 1149.1 - 1990, IEEE standard
test access port and boundary scan architecture”.
8.1.1
IDENTIFICATION CODES
The PALplus ICs MACPACIC and VERIC are equipped with BST identification registers. The identification codes and
their meaning are shown in Tables 24 and 25.
Table 24 Identification codes
VERSION
3322
COMPONENT
MANUFACTURER
11000000000
10987654321
00000010101
00000010101
FIXED
IDENTIFICATION
22222 22211 11111 1
76543 21098 76543 2
01101 00001 00011 0
10110 00101 10010 0
0
0
1
1
−
IC
1098
−
MACPACIC
VERIC
0001
1684602B
1B16402B
0001
Table 25 Code parts
BITS
NAME
DESCRIPTION
31 to 28
27 to 12
11 to 1
0
version number
component
manufacturer
fixed
start with 1 and increment every redesign
first 3 characters of name
JEDEC code for PHILIPS
1
1996 Oct 28
44
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM1A39
1996 Oct 28
45
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM1A43
1996 Oct 28
46
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM1A42
1996 Oct 28
47
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM4A1
1996 Oct 28
48
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
HM1A40
1996 Oct 28
49
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
9
DC CHARACTERISTICS
Tj = 0 to 125 °C unless otherwise specified.
SYMBOL PARAMETER
Supply
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
supply voltage
supply current
4.75
5.00
5.25
V
DD
I
−
−
80
−
mA
DD
DD(PD)
I
quiescent supply current all inputs to VDD or VSS
−
100
µA
Inputs
V
V
LOW level input voltage
HIGH level input voltage
input current
0
−
−
−
0.8
VDD
1.0
V
IL
2.0
−
V
IH
I
I
µA
Outputs and 3-state
V
V
LOW level output voltage IO = 20 µA
HIGH level output voltage IO = 20 µA
−
−
−
0.1
V
V
OL
V
DD − 0.1
−
OH
Outputs Y_TO_FM1, UV_TO_FM1, Y_MA, UV_MA, WE_MA, HREF_MA, UV_TO_FM4, EVEN_FIELD, INTPOL,
FILM, RST_FM14, WE_FM1, RE_FM1, WE_FM4, RE_FM4 and CLK_16B1
I
I
LOW level output current VO = 0.5 V
4
4
−
−
−
−
mA
mA
OL
HIGH level output current VO = VDD − 0.5 V
OH
Outputs CLK_32B1, CLK_32B2 and CLK_16B2
I
I
LOW level output current VO = 0.5 V
8
8
−
−
−
−
mA
mA
OL
HIGH level output current VO = VDD − 0.5 V
OH
Outputs CLK_32B3 and CLK_16B3
I
I
LOW level output current VO = 0.5 V
12
12
−
−
−
−
mA
mA
OL
HIGH level output current VO = VDD − 0.5 V
OH
3-state TDO_MA, SNERT_DA, VA_FRONT and VA_AI
input current
I
Z
−
−
10
µA
1996 Oct 28
50
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
t
t
f
r
90 %
50 %
10 %
CLK
t
t
l
h
Dn
Dn + 1
XX
DATA
t
t
oh
ih
t
t
su
od
MHA146
Data input: CLK = CLK_16.
Data output: CLK = CLK_16 for stand-alone MACPACIC and CLK = CLK_32 for full PALplus module.
Fig.37 Clock to data timing.
10 AC CHARACTERISTICS
Tj = 0 to 125 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Clock CLK_32
Tcy
cycle time
28.1
−
−
−
−
−
−
4
4
−
−
ns
t
t
t
t
rise time
fall time
2
ns
ns
ns
ns
r
f
2
HIGH time
LOW time
9.2
9.2
h
l
Clock CLK_16
TCY cycle time
56.2
2
−
−
−
−
−
−
4
4
−
−
ns
ns
ns
ns
ns
t
t
t
t
rise time
fall time
r
f
2
HIGH time
LOW time
20.5
20.5
h
l
Input set-up time
set-up time
t
all data inputs
CLK_16 w.r.t. CLK_32
6
−
−
−
−
ns
ns
su
4.5
1996 Oct 28
51
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input hold time
t
ih
input hold time
all data inputs
CLK_16 w.r.t. CLK_32
3
−
−
−
−
ns
3.5
ns
Outputs (CL = 15 pF)
CLK_16B1, CLK_16B2 AND CLK_16B3 (RISING)
t
t
hold time
6
−
−
−
ns
ns
oh
delay time
−
17
od
CLK_16B1, CLK_16B2 AND CLK_16B3 (FALLING)
t
t
hold time
9
−
−
−
ns
ns
oh
delay time
−
24
od
CLK_32B1, CLK_32B2 AND CLK_32B3 (RISING)
t
t
hold time
6
−
−
−
ns
ns
oh
delay time
−
17
od
CLK_32B1, CLK_32B2 AND CLK_32B3 (FALLING)
t
t
hold time
6
−
−
−
ns
ns
oh
delay time
−
17
od
Outputs YUV_TO_FM1, RST_FM14, WE_FM1, RE_FM1, WE_FM4, RE_FM4, HREF_MA, WE_MA, VA_AI,
VA_FRONT and YUV_MA (CLK_16; CL = 15 pF)
t
t
hold time
12
−
−
−
ns
ns
oh
od
delay time
−
38
Outputs (CLK_32; CL = 15 pF; note 1)
YUV_MA
t
t
hold time
13
−
−
−
ns
ns
oh
delay time
−
39
od
RSTW_FM23, WE_FM2 AND WE_FM3
t
t
hold time
12
−
−
−
ns
ns
oh
delay time
−
38
od
Note
1. 32 MHz output signals are related to the output clock signals CLK_32B1 and CLK_32B3.
10.1 Clock buffers
MACPACIC supplies the clocks for VERIC and the field memories on the PALplus module. Therefore the input clocks
CLK_16 and CLK_32 are buffered and output as CLK_16B1 to CLK_16B3 and CLK_32B1 to CLK_32B3. The clock
distribution is shown in Fig.5.
1996 Oct 28
52
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
11 LIST OF ABBREVIATIONS
Table 26 Abbreviations used in document
SYMBOL
DESCRIPTION
ALE
BB
Address Latch Enable
Black Bands (above and below letter box picture)
Black Offset Hysteresis (see Table 20)
Positive Edge of CLAMP Signal
BOH
CLP_DIFF
DLE
Data Latch Enable
EnlRXR
EnPreEvFld
FixHlpMain
HlpM
Enable IRXR (see Table 12)
Enable Preset Even Field (see Table 23)
Fix gain of Helper and Main Amplitude (see Table 17)
Helper mode (see Table 11)
HlpRedThr
H_RE/WE
InvO/E
Helper Reduction Threshold (see Table 14)
Horizontal part of Read Enable/Write Enable signal
Invert Odd/Even
IRXR
Intelligent Residual Cross-Luminance Reduction
IRXR Threshold (see Table 16)
IrxrThr
IVericN
VERIC Identification (active LOW) (see Table 18)
Acquisition Line Counter
LC_ACQ
LC_DSP
MACP
Display Line Counter
Motion Adaptive Colour Plus
MacpOn
MacpYhThr
MotVis
MACP on (see Table 11)
MACP Luminance Threshold (see Table 15)
Motion Visibility (see Table 11)
Mpip
MultiPIP (see Table 12)
NmYl
Noise Dependent Luminance High-Pass Reduction (see Table 19)
Preset Even Field (see Table 23)
PreEvFld
Rha/Rhb
SEL_SD_YL
VAA
Helper Bandwidth and Amplitude Reduction (see Table 19)
Select Saturation Dependent Cross-Luminance Reduction (see Table 22)
Vertical Anti-Alias Filter (see Table 21)
Positive Edge of VA_AI
VA_AI_DIFF
VaDel
Delay of VA_FRONT
VA_FR_DEL
V_RE/WE
WeStrtH
WeStpH
WeStrtV
WeStpV
XL
VA_FRONT Delayed
Vertical part of Read Enable/Write Enable signal
Horizontal Start and Stop values for WE_MA (see Table 13 and Fig.31)
Vertical Start and Stop values for WE_MA (see Table 13 and Fig.31)
Cross-Luminance
Y_HP
Luminance High-Pass Component
Luminance Low-Pass Component
Y_LP
1996 Oct 28
53
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
12 PACKAGE OUTLINE
QFP100: plastic quad flat package;
SOT317-1
100 leads (lead length 1.95 mm); body 14 x 20 x 2.7 mm; high stand-off height
y
X
A
80
51
81
50
Z
E
Q
e
A
2
H
A
E
(A )
3
E
A
1
θ
w M
p
pin 1 index
L
p
b
L
31
100
detail X
1
30
w M
Z
v
M
M
D
A
B
b
p
e
D
B
H
v
D
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
Q
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.36 2.87
0.10 2.57
0.40 0.25 20.1 14.1
0.25 0.13 19.9 13.9
24.2 18.2
23.6 17.6
1.0 1.43
0.6 1.23
0.8
0.4
1.0
0.6
mm
3.3
0.25
0.65
1.95
0.2 0.15 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-02-04
SOT317-1
1996 Oct 28
54
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
If wave soldering cannot be avoided, the following
conditions must be observed:
13 SOLDERING
13.1 Introduction
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
QFP100 (SOT382-1) or QFP160 (SOT322-1).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
13.2 Reflow soldering
Reflow soldering techniques are suitable for all QFP
packages.
The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our “Quality
Reference Handbook” (order code 9398 510 63011).
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
13.4 Repairing soldered joints
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
13.3 Wave soldering
Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
1996 Oct 28
55
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
14 DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
15 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Oct 28
56
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
NOTES
1996 Oct 28
57
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
NOTES
1996 Oct 28
58
Philips Semiconductors
Preliminary specification
Motion Adaptive Colour Plus And Control
IC (MACPACIC) for PALplus
SAA4996H
NOTES
1996 Oct 28
59
Philips Semiconductors – a worldwide company
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Tel. +7 095 247 9145, Fax. +7 095 247 9144
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04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.
Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444
Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,
Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
Middle East: see Italy
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/01/pp60
Date of release: 1996 Oct 28
Document order number: 9397 750 01434
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