BF1205C_技术文档

BF1205C

Dual N-channel dual gate MOS-FET

Rev. 01 — 18 May 2004

Product data sheet

1. Product proﬁle

1.1 General description

The BF1205C is a combination of two dual gate MOS-FET ampliﬁers with shared source

and gate 2 leads and an integrated switch. The integrated switch is operated by the gate 1

bias of ampliﬁer b.

The source and substrate are interconnected. Internal bias circuits enable

DC stabilization and a very good cross-modulation performance during AGC. Integrated

diodes between the gates and source protect against excessive input voltage surges. The

transistor has a SOT363 micro-miniature plastic package.

CAUTION

This device is sensitive to electrostatic discharge (ESD). Therefore care should be taken

during transport and handling.

MSC895

1.2 Features

■ Two low noise gain controlled ampliﬁers in a single package; one with a fully integrated

bias and one with a partly integrated bias

■ Internal switch to save external components

■ Superior cross-modulation performance during AGC

■ High forward transfer admittance

■ High forward transfer admittance to input capacitance ratio.

1.3 Applications

■ Gain controlled low noise ampliﬁers for VHF and UHF applications with 5 V supply

voltage

◆ digital and analog television tuners

◆ professional communication equipment.

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

1.4 Quick reference data

Table 1:

Quick reference data

Per MOS-FET unless otherwise speciﬁed.

Symbol Parameter Conditions

Min Typ Max Unit

V_DS

I_D

drain-source voltage

-

6

V

drain current (DC)

30

mA

[1]

P_tot

y_fs

total power dissipation

T_s≤ 107 °C

180 mW

forward transfer admittance f = 1 MHz

ampliﬁer a; I_D= 19 mA

ampliﬁer b; I_D= 13 mA

input capacitance at gate 1 f = 1 MHz

26

28

31

33

41

43

mS

C_ig1-ss

ampliﬁer a

ampliﬁer b

-

2.2 2.7 pF

2.0 2.5 pF

C_rss

NF

reverse transfer capacitance f = 1 MHz

20

-

fF

noise ﬁgure

ampliﬁer a; f = 400 MHz

ampliﬁer b; f = 800 MHz

1.3 1.9 dB

1.4 2.1 dB

X_mod

cross-modulation

input level for k = 1% at

40 dB AGC

ampliﬁer a

ampliﬁer b

100 105

100 103

-

dBµV

T_j

junction temperature

-

150 °C

[1] T_sis the temperature at the soldering point of the source lead.

2. Pinning information

Table 2:

Discrete pinning

1

Description

gate 1 (a)

gate 2

Simpliﬁed outline

Symbol

6

5

4

2

AMP a

g1

(a)

d

(a)

3

gate 1 (b)

drain (b)

source

4

s

5

g2

1

2

3

6

drain (a)

001aaa706

g1

(b)

d

(b)

AMP b

sym033

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BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

3. Ordering information

Table 3:

Ordering information

Type number Package

Name

Description

Version

BF1205C

-

plastic surface mounted package; 6 leads

SOT363

4. Marking

Table 4:

Marking

Type number

Marking code^[1]

BF1205C

M6*

[1] * = p or -: made in Hong Kong.

* = t: made in Malaysia.

* = W: made in China.

5. Limiting values

Table 5:

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

Per MOS-FET

V_DS

I_D

drain-source voltage

-

6

V

drain current (DC)

gate 1 current

-

30

mA

mW

°C

I_G1

I_G2

P_tot

T_stg

T_j

-

±10

180

+150

150

gate 2 current

-

[1]

total power dissipation

storage temperature

junction temperature

T_s≤ 107 °C

-

−65

-

°C

[1] T_sis the temperature at the soldering point of the source lead.

6. Thermal characteristics

Table 6:

Thermal characteristics

Symbol

Parameter

Conditions

Typ

240

Unit

R_th(j-s)

thermal resistance from junction

to soldering point

K/W

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Product data sheet

Rev. 01 — 18 May 2004

3 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa551

250

tot

P

(mW)

200

150

100

50

0

50

100

150

200

T

(°C)

s

Fig 1. Power derating curve.

7. Static characteristics

Table 7:

Static characteristics

T_j= 25 °C.

Symbol

Parameter

Conditions

Min Typ Max Unit

Per MOS-FET; unless otherwise speciﬁed

V_(BR)DSS

drain-source breakdown voltage

V_G1-S= V_G2-S= 0 V; I_D= 10 µA

ampliﬁer a

6

-

V

ampliﬁer b

6

-

V_(BR)G1-SS

V_(BR)G2-SS

V_(F)S-G1

V_(F)S-G2

V_G1-S(th)

V_G2-S(th)

I_DSX

gate 1-source breakdown voltage V_GS= V_DS= 0 V; I_G1-S= 10 mA

gate 2-source breakdown voltage V_GS= V_DS= 0 V; I_G2-S= 10 mA

6

10

1.5

1.0

6

forward source-gate 1 voltage

forward source-gate 2 voltage

gate 1-source threshold voltage

gate 2-source threshold voltage

drain-source current

V_G2-S= V_DS= 0 V; I_S-G1= 10 mA

V_G1-S= V_DS= 0 V; I_S-G2= 10 mA

0.5

0.3

0.4

V_DS= 5 V; V_G2-S= 4 V; I_D= 100 µA

V_DS= 5 V; V_G1-S= 5 V; I_D= 100 µA

V_G2-S= 4 V; V_DS(b)= 5 V; R_G1= 150 kΩ

ampliﬁer a; V_DS(a)= 5 V

ampliﬁer b

[1]

[2]

14

9

-

24

17

mA

I_G1-S

gate1 cut-off current

gate 2 cut-off current

V_G2-S= V_DS(a)= 0 V

ampliﬁer a; V_G1-S(a)= 5 V; I_D(b)= 0 A

ampliﬁer b; V_G1-S(b)= 5 V; V_DS(b)= 0 V

V_G2-S= 4 V;

-

50

20

nA

I_G2-S

V

_G1-S(a)= V_DS(a)= V_DS(b)= 0 V;

_G1-S(b)= 0 V;

[1] R_G1connects gate 1 (b) to V_GG= 0 V (see Figure 3).

[2] R_G1connects gate 1 (b) to V_GG= 5 V (see Figure 3).

9397 750 13005

Product data sheet

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4 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa552

20

I

D

(mA)

16

(1)

(2)

12

8

(3)

g1 (a)

g2

d (a)

s

(4)

4

(6)

(5)

g1 (b)

d (b)

R

G1

0

1

2

3

4

5

V

GG

V

(V)

001aaa553

GG

(1) I_D(b); R_G1= 120 kΩ.

(2) I_D(b); R_G1= 150 kΩ.

(3) I_D(b); R_G1= 180 kΩ.

(4) I_D(a); R_G1= 180 kΩ.

(5) I_D(a); R_G1= 150 kΩ.

(6) I_D(a); R_G1= 120 kΩ.

V_GG= 5 V: ampliﬁer a is off; ampliﬁer b is on

V_GG= 0 V: ampliﬁer a is on; ampliﬁer b is off.

Fig 2. Drain currents of MOS-FET a and b as function

of V_GG

Fig 3. Functional diagram.

.

8. Dynamic characteristics

8.1 Dynamic characteristics for ampliﬁer a

Table 8:

Common source; T_amb= 25 °C; V_G2-S= 4 V; V_DS= 5 V; I_D= 19 mA.

Dynamic characteristics for ampliﬁer a^[1]

Symbol Parameter

Conditions

T_j= 25 °C

f = 1 MHz

Min Typ Max Unit

y_fs

forward transfer admittance

26

-

31

41

mS

pF

fF

C_ig1-ss

C_ig2-ss

C_oss

C_rss

input capacitance at gate 1

input capacitance at gate 2

output capacitance

2.2 2.7

-

3.0

0.9

20

-

reverse transfer capacitance f = 1 MHz

-

G_tr

power gain

B_S= B_S(opt); B_L= B_L(opt)

f = 200 MHz; G_S= 2 mS; G_L= 0.5 mS

f = 400 MHz; G_S= 2 mS; G_L= 1 mS

f = 800 MHz; G_S= 3.3 mS; G_L= 1 mS

f = 11 MHz; G_S= 20 mS; B_S= 0 S

f = 400 MHz; Y_S= Y_S(opt)

31

26

21

-

35

30

25

3.0

39

34

29

-

dB

NF

noise ﬁgure

-

1.3 1.9

1.4 2.1

f = 800 MHz; Y_S= Y_S(opt)

-

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Product data sheet

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BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

Table 8:

Dynamic characteristics for ampliﬁer a^[1]…continued

Common source; T_amb= 25 °C; V_G2-S= 4 V; V_DS= 5 V; I_D= 19 mA.

Symbol Parameter

X_modcross-modulation

Conditions

Min Typ Max Unit

[2]

input level for k = 1%; f_w= 50 MHz; f_unw= 60 MHz

at 0 dB AGC

at 10 dB AGC

at 20 dB AGC

at 40 dB AGC

90

-

dBµV

90

99

-

100 105

[1] For the MOS-FET not in use: V_G1-S(b)= 0 V; V_DS(b)= 0 V.

[2] Measured in Figure 33 test circuit.

8.1.1 Graphs for ampliﬁer a

001aaa554

(1)

001aaa555

30

32

I

(1)

(2)

D

(2)

(3)

I

D

(mA)

(4)

(5)

24

(3)

(4)

20

16

8

(5)

(6)

(7)

10

(6)

(7)

(8)

(9)

0

0.4

0.8

1.2

1.6

V

2

(V)

0

2

4

6

V

(V)

DS

G1-S

(1) V_G2-S= 4 V.

(2) V_G2-S= 3.5 V.

(3) V_G2-S= 3 V.

(4) V_G2-S= 2.5 V.

(5) V_G2-S= 2 V.

(6) V_G2-S= 1.5 V.

(7) V_G2-S= 1 V.

(1) V_G1-S(a)= 1.8 V.

(2) V_G1-S(a)= 1.7 V.

(3) V_G1-S(a)= 1.6 V.

(4) V_G1-S(a)= 1.5 V.

(5) V_G1-S(a)= 1.4 V.

(6) V_G1-S(a)= 1.3 V.

(7) V_G1-S(a)= 1.2 V.

(8) V_G1-S(a)= 1.1 V.

(9) V_G1-S(a)= 1 V.

V_DS(a)= 5 V; V_G1-S(b)= V_DS(b)= 0 V; T_j= 25 °C.

V_G2-S= 4 V; V_G1-S(b)= V_DS(b)= 0 V; T_j= 25 °C.

Fig 4. Transfer characteristics; typical values.

Fig 5. Output characteristics; typical values.

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BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa557

001aaa556

20

(a)

40

I

D

y

fs

(mA)

16

(mS)

(1)

(2)

30

12

8

20

10

0

(3)

(4)

4

(5)

(6)

0

20

40

60

0

8

16

24

32

I

(b) (µA)

I

(mA)

D

(1) V_G2-S= 4 V.

V_DS(a)= 5 V; V_G2-S= 4 V; V_DS(b)= 5 V;

V_G1-S(b)= 0 V; T_j= 25 °C.

(2) V_G2-S= 3.5 V.

(3) V_G2-S= 3 V.

(4) V_G2-S= 2.5 V.

(5) V_G2-S= 2 V.

(6) V_G2-S= 1.5 V.

V_DS(a)= 5 V; V_G1-S(b)= V_DS(b)= 0 V; T_j= 25 °C.

Fig 6. Forward transfer admittance as a function of

drain current; typical values.

Fig 7. Drain current as a function of internal G1

current (current in pin drain (b) if MOS-FET (b)

is switched off); typical values.

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Product data sheet

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BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa558

001aaa559

20

32

I

D

I

D

(mA)

16

(mA)

24

(1)

12

8

(2)

(3)

16

8

(4)

(5)

(6)

4

0

1

2

3

4

V

5

(V)

0

2

4

6

V

(V)

G2-S

supply

V_DS(a)= V_DS(b)= V_supply, V_G2-S= 4 V, T_j= 25 °C,

R_G1(b)= 150 kΩ (connected to ground); see

Figure 3.

(1) V_DS(b)= 5 V.

(2) V_DS(b)= 4.5 V.

(3) V_DS(b)= 4 V.

(4) V_DS(b)= 3.5 V.

(5) V_DS(b)= 3 V.

(6) V_DS(b)= 2.5 V.

V_DS(a)= 5 V; V_G1-S(b)= 0 V; gate 1 (a) = open;

T_j= 25 °C.

Fig 8. Drain current of ampliﬁer a as a function of

supply voltage of a and b ampliﬁer; typical

values.

Fig 9. Drain current as a function of gate 2 and drain

supply voltage; typical values.

001aaa560

001aaa561

120

0

gain

reduction

V

unw

(dBµV)

(dB)

10

110

20

30

40

50

100

90

80

0

10

20

30

40

50

0

1

2

3

4

gain reduction (dB)

V

(V)

AGC

V_DS(a)= V_DS(b)= 5 V; V_G1-S(b)= 0 V; f_w= 50 MHz;

f_unw= 60 MHz; T_amb= 25 °C; see Figure 33.

V_DS(a)= V_DS(b)= 5 V; V_G1-S(b)= 0 V; f = 50 MHz; see

Figure 33.

Fig 10. Unwanted voltage for 1% cross-modulation as a

function of gain reduction; typical values.

Fig 11. Gain reduction as a function of AGC voltage;

typical values.

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BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa562

001aaa564

2

32

10

b , g

is is

(mS)

I

D

(mA)

24

10

b

g

is

16

8

1

is

−1

10

−2

0

10

2

3

0

20

40

60

10

gain reduction (dB)

f (MHz)

V_DS(a)= V_DS(b)= 5 V; V_G1-S(b)= 0 V; f = 50 MHz;

T_amb= 25 °C; see Figure 33.

V_DS(a)= 5 V; V_G2-S(a)= 4 V; V_DS(b)= V_G1-S(b)= 0 V;

I_D(a)= 19 mA.

Fig 12. Drain current as a function of gain reduction;

typical values.

Fig 13. Input admittance as a function of frequency;

typical values.

001aaa565

001aaa566

2

3

2

3

10

y

−ϕ

rs

(mS)

(deg)

y

−ϕ

fs

y

fs

(mS)

(deg)

−ϕ

rs

2

10

y

rs

−ϕ

fs

10

1

3

1

3

1

2

10

f (MHz)

V_DS(a)= 5 V; V_G2-S(a)= 4 V; V_DS(b)= V_G1-S(b)= 0 V;

I_D(a)= 19 mA.

V_DS(a)= 5 V; V_G2-S(a)= 4 V; V_DS(b)= V_G1-S(b)= 0 V;

I_D(a)= 19 mA.

Fig 14. Forward transfer admittance and phase as a

function of frequency; typical values.

Fig 15. Reverse transfer admittance and phase as a

function of frequency: typical values.

9397 750 13005

Product data sheet

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9 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa567

10

b , g

os os

(mS)

b

g

os

1

os

−1

10

−2

10

2

3

10

f (MHz)

V_DS(a)= 5 V; V_G2-S(a)= 4 V; V_DS(b)= V_G1-S(b)= 0 V; I_D(a)= 19 mA.

Fig 16. Output admittance as a function of frequency; typical values.

8.1.2 Scattering parameters for ampliﬁer a

Table 9:

Scattering parameters for ampliﬁer a

V_DS(a)= 5 V; V_G2-S= 4 V; I_D(a)= 19 mA; V_DS(b)= 0 V; V_G-1S(b)= 0 V; T_amb= 25 °C.

f

S₁₁

S₂₁

S₁₂

S₂₂

(MHz)

Magnitude Angle Magnitude Angle Magnitude Angle Magnitude Angle

ratio

(deg) ratio

−3.91 3.07

−7.76 3.06

−15.42 3.04

−22.99 3.01

−30.52 2.96

−37.83 2.90

−45.14 2.83

−52.31 2.76

−59.47 2.69

−66.23 2.60

−73.10 2.52

(deg) ratio

83.61 0.992

83.19 0.992

78.19 0.990

73.75 0.988

69.82 0.985

66.12 0.982

62.11 0.979

58.86 0.975

58.28 0.972

50.64 0.968

47.28 0.966

(deg)

50

0.992

0.990

0.982

0.971

0.956

0.938

0.917

0.893

0.867

0.838

0.807

175.56 0.0007

171.18 0.0017

162.42 0.0026

153.79 0.0037

145.22 0.0047

136.78 0.0055

128.46 0.0061

120.20 0.0065

111.98 0.0068

103.90 0.0067

95.875 0.0065

−1.47

100

200

300

400

500

600

700

800

900

1000

−2.93

−5.84

−8.71

−11.59

−14.48

−17.31

−20.14

−22.98

−25.85

−28.74

8.1.3 Noise data for ampliﬁer a

Table 10: Noise data for ampliﬁer a

V_DS(a)= 5 V; V_G2-S= 4 V; I_D(a)= 19 mA; V_DS(b)= 0 V; V_G-1S(b)= 0 V; T_amb= 25 °C.

f

F_min

(dB)

Γ_opt

r_n

(Ω)

(MHz)

ratio

0.718

0.677

(deg)

16.06

37.59

400

800

1.3

1.4

0.683

0.681

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BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

8.2 Dynamic characteristics for ampliﬁer b

Table 11: Dynamic characteristics for ampliﬁer b

Common source; T_amb= 25 °C; V_G2-S= 4 V; V_DS= 5 V; I_D= 13 mA.

Symbol Parameter

Conditions

Min Typ Max Unit

y_fs

forward transfer admittance T_j= 25 °C

28

-

33

43

mS

C_ig1-ss

C_ig2-ss

C_oss

C_rss

input capacitance at gate 1

input capacitance at gate 2

output capacitance

f = 1 MHz

2.0

3.4

0.85

20

2.5 pF

-

pF

fF

-

reverse transfer capacitance f = 1 MHz

-

[1]

G_tr

power gain

B_S= B_S(opt); B_L= B_L(opt)

f = 200 MHz; G_S= 2 mS; G_L= 0.5 mS

f = 400 MHz; G_S= 2 mS; G_L= 1 mS

f = 800 MHz; G_S= 3.3 mS; G_L= 1 mS

f = 11 MHz; G_S= 20 mS; B_S= 0 S

f = 400 MHz; Y_S= Y_S(opt)

31

28

24

-

35

32

28

5

39

36

32

-

dB

NF

noise ﬁgure

-

1.3

1.4

1.9 dB

2.1 dB

f = 800 MHz; Y_S= Y_S(opt)

-

[2]

X_mod

cross-modulation

input level for k = 1%; f_w= 50 MHz; f_unw= 60 MHz

at 0 dB AGC

90

-

dBµV

at 10 dB AGC

88

94

dBµV

at 20 dB AGC

-

at 40 dB AGC

100 103

[1] For the MOS-FET not in use: V_G1-S(a)= 0 V; V_DS(a)= 0 V.

[2] Measured in Figure 34 test circuit.

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Product data sheet

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BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

8.2.1 Graphs for ampliﬁer b

001aaa568

001aaa569

30

32

(1)

(4)

I

D

(2)

(3)

I

D

(1)

(2)

(mA)

24

(5)

20

(3)

(4)

(5)

16

8

(6)

(7)

10

(6)

(7)

0

0.4

0.8

1.2

1.6

V

2

(V)

0

2

4

6

V

(V)

DS

G1-S

(1) V_G2-S= 4 V.

(2) V_G2-S= 3.5 V.

(3) V_G2-S= 3 V.

(4) V_G2-S= 2.5 V.

(5) V_G2-S= 2 V.

(6) V_G2-S= 1.5 V.

(7) V_G2-S= 1 V.

(1) V_G1-S(b)= 1.6 V.

(2) V_G1-S(b)= 1.5 V.

(3) V_G1-S(b)= 1.4 V.

(4) V_G1-S(b)= 1.3 V.

(5) V_G1-S(b)= 1.2 V.

(6) V_G1-S(b)= 1.1 V.

(7) V_G1-S(b)= 1 V.

V_DS(b)= 5 V; V_DS(a)= V_G1-S(a)= 0 V; T_j= 25 °C.

V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V; T_j= 25 °C.

Fig 17. Transfer characteristics; typical values.

Fig 18. Output characteristics; typical values.

9397 750 13005

Product data sheet

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12 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa570

001aaa571

100

40

(1)

(2)

(1)

(2)

I

G1

Y

fs

(µA)

(mS)

(3)

80

30

(4)

(5)

60

40

20

0

20

10

0

(5)

(6)

(7)

(6)

(7)

0

0.4

0.8

1.2

1.6

V

2

0

8

16

24

32

(V)

I (mA)

D

G1-S

(1) V_G2-S= 4 V.

(2) V_G2-S= 3.5 V.

(3) V_G2-S= 3 V.

(4) V_G2-S= 2.5 V.

(5) V_G2-S= 2 V.

(6) V_G2-S= 1.5 V.

(7) V_G2-S= 1 V.

(1) V_G2-S= 4 V.

(2) V_G2-S= 3.5 V.

(3) V_G2-S= 3 V.

(4) V_G2-S= 2.5 V.

(5) V_G2-S= 2 V.

(6) V_G2-S= 1.5 V.

(7) V_G2-S= 1 V.

V_DS(b)= 5 V; V_DS(a)= V_G1-S(a)= 0 V; T_j= 25 °C.

Fig 19. Gate 1 current as a function of gate 1 voltage;

typical values.

Fig 20. Forward transfer admittance as a function of

drain current; typical values.

001aaa572

001aaa573

24

16

I

D

I

D

(mA)

12

16

8

4

0

8

0

10

20

30

40

I

50

(µA)

0

1

2

3

4

5

V

(V)

G1

GG

V_DS(b)= 5 V; V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V;

T_j= 25 °C.

V_DS(b)= 5 V; V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V;

T_j= 25 °C; R_G1(b)= 150 kΩ (connected to V_GG); see

Figure 3.

Fig 21. Drain current as a function of gate 1 current;

typical values.

Fig 22. Drain current as a function of gate 1 supply

voltage (V_GG); typical values.

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

13 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa574

001aaa575

24

16

(1)

(2)

(3)

I

D

(1)

(2)

I

D

(mA)

12

(4)

(5)

(3)

(4)

16

(5)

8

4

0

(6)

(7)

(8)

8

0

2

4

6

0

2

4

6

V

= V

(V)

V

(V)

G2-S

GG

DS

(1) R_G1(b)= 68 kΩ.

(2) R_G1(b)= 82 kΩ.

(1) V_GG= 5.0 V.

(2) V_GG= 4.5 V.

(3) V_GG= 4.0 V.

(4) V_GG= 3.5 V.

(5) V_GG= 3.0 V.

(3) R_G1(b)= 100 kΩ.

(4) R_G1(b)= 120 kΩ.

(5) R_G1(b)= 150 kΩ.

(6) R_G1(b)= 180 kΩ.

(7) R_G1(b)= 220 kΩ.

(8) R_G1(b)= 270 kΩ.

V_DS(b)= 5 V; V_DS(a)= V_G1-S(a)= 0 V; T_j= 25 °C;

R_G1(b)= 150 kΩ (connected to V_GG); see Figure 3.

V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V; T_j= 25 °C;

R_G1(b)is connected to V_GG; see Figure 3.

Fig 23. Drain current as a function of gate 1 (V_GG),

drain supply voltage and value of RG1; typical

values.

Fig 24. Drain current as a function of gate 2 voltage;

typical values.

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

14 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa576

001aaa577

30

120

V

unw

(1)

(2)

(3)

(4)

(5)

I

G1

(dBµV)

(µA)

110

20

100

90

10

0

80

0

2

4

6

0

20

40

60

V

(V)

gain reduction (dB)

G2-S

(1) V_GG= 5.0 V.

(2) V_GG= 4.5 V.

(3) V_GG= 4.0 V.

(4) V_GG= 3.5 V.

(5) V_GG= 3.0 V.

V_DS(b)= 5 V; V_GG= 5 V; V_DS(a)= V_G1-S(a)= 0 V;

R_G1(b)= 150 kΩ (connected to V_GG); f_w= 50 MHz;

f_unw= 60 MHz; T_amb= 25 °C; see Figure 34.

V_DS(b)= 5 V; V_DS(a)= V_G1-S(a)= 0 V; T_j= 25 °C;

R_G1(b)= 150 kΩ (connected to V_GG); see Figure 3.

Fig 25. Gate 1 current as a function of gate 2 voltage;

typical values.

Fig 26. Unwanted voltage for 1% cross-modulation as a

function of gain reduction; typical values.

001aaa578

001aaa579

0

16

gain

reduction

I

D

(dB)

(mA)

10

12

20

30

40

50

8

4

0

1

2

3

4

0

20

40

60

V

(V)

gain reduction (dB)

AGC

V_DS(b)= 5 V; V_GG= 5 V; V_DS(a)= V_G1-S(a)= 0 V;

R_G1(b)= 150 kΩ (connected to V_GG); f = 50 MHz;

T_amb= 25 °C; see Figure 34.

V_DS(b)= 5 V; V_GG= 5 V; V_DS(a)= V_G1-S(a)= 0 V;

R_G1(b)= 150 kΩ (connected to V_GG); f = 50 MHz;

T_amb= 25 °C; see Figure 34.

Fig 27. Typical gain reduction as a function of AGC

voltage.

Fig 28. Drain current as a function of gain reduction;

typical values.

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

15 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

001aaa581

001aaa582

2

10

b , g

is is

(mS)

y

fs

y

−ϕ

fs

10

(mS)

(deg)

b

g

is

1

10

−ϕ

fs

is

−1

10

−2

1

3

10

1

2

3

2

10

f (MHz)

V_DS(b)= 5 V; V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V;

I_D(b)= 13 mA.

V_DS(b)= 5 V; V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V;

I_D(b)= 13 mA.

Fig 29. Input admittance as a function of frequency;

typical values.

Fig 30. Forward transfer admittance and phase as a

function of frequency; typical values.

001aaa583

001aaa584

3

10

y

−ϕ

b , g

os os

rs

(µS)

(deg)

(mS)

−ϕ

2

rs

b

g

os

10

1

y

rs

os

−1

10

−2

1

3

1

10

2

3

10

f (MHz)

V_DS(b)= 5 V; V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V;

I_D(b)= 13 mA.

V_DS(b)= 5 V; V_G2-S= 4 V; V_DS(a)= V_G1-S(a)= 0 V;

I_D(b)= 13 mA.

Fig 31. Reverse transfer admittance and phase as a

function of frequency; typical values.

Fig 32. Output admittance as a function of frequency;

typical values.

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

16 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

8.2.2 Scattering parameters for ampliﬁer b

Table 12: Scattering parameters for ampliﬁer b

V_DS(b)= 5 V; V_G2-S= 4 V; I_D(b)= 13 mA; V_DS(a)= 0 V; V_G1-S(a)= 0 V; T_amb= 25 °C.

f

S₁₁

S₂₁

S₁₂

S₂₂

(MHz)

Magnitude Angle Magnitude Angle Magnitude Angle Magnitude Angle

ratio

(deg) ratio

−3.66 3.26

−7.01 3.24

−13.71 3.22

−20.36 3.19

−27.04 3.15

−33.62 3.10

−40.16 3.05

−46.70 2.99

−52.07 2.92

−59.48 2.84

−65.86 2.77

(deg)

ratio

(deg) ratio

84.23 0.988

84.91 0.988

83.96 0.986

82.86 0.984

81.88 0.982

80.92 0.978

80.15 0.975

79.68 0.972

78.28 0.968

78.28 0.965

78.15 0.961

(deg)

50

0.986

0.982

0.975

0.966

0.955

0.943

0.927

0.909

0.891

0.868

0.846

175.93 0.0008

172.04 0.0015

164.24 0.0029

156.53 0.0042

148.86 0.0055

141.24 0.0066

133.70 0.0076

126.13 0.0086

118.64 0.0094

111.09 0.0100

103.58 0.0107

−1.65

100

200

300

400

500

600

700

800

900

1000

−3.27

−6.50

−9.69

−12.88

−16.07

−19.21

−22.35

−25.52

−28.65

−31.85

8.2.3 Noise data for ampliﬁer b

Table 13: Noise data for ampliﬁer b

V_DS(b)= 5 V; V_G2-S= 4 V; I_D(b)= 13 mA; V_DS(a)= 0 V; V_G1-S(a)= 0 V; T_amb= 25 °C.

f

F_min

(dB)

Γ_opt

r_n

(Ω)

(MHz)

ratio

0.695

0.674

(deg)

13.11

32.77

400

800

1.3

1.4

0.694

0.674

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

17 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

9. Test information

V

(a)

DS

5V

V

AGC

4.7 nF

10 kΩ

L1

2.2 µH

4.7 nF

d (a)

S

g1 (a)

g2

R

GEN

50 Ω

R

L

50 Ω

4.7 nF

50 Ω

BF1205C

V

i

g1 (b)

d (b)

L2

2.2 µH

50 Ω

R

G1

4.7 nF

V

GG

0V

V

(b)

DS

5V

001aaa563

Fig 33. Cross-modulation test set-up for ampliﬁer a.

V

(a)

5V

V

DS

AGC

4.7 nF

10 kΩ

L1

2.2 µH

4.7 nF

d (a)

S

g1 (a)

4.7 nF

50 Ω

g2

BF1205C

4.7 nF

g1 (b)

d (b)

R

GEN

50 Ω

L2

2.2 µH

R

L

50 Ω

R

G1

4.7 nF

V

i

V

(b)

DS

5V

V

GG

5V

001aaa580

Fig 34. Cross-modulation test set-up for ampliﬁer b.

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

18 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

10. Package outline

Plastic surface mounted package; 6 leads

SOT363

D

B

E

A

X

y

H

v

M

A

E

6

5

4

Q

pin 1

index

A

1

2

3

c

e

1

b

p

L

p

w

M B

e

detail X

0

1

2 mm

scale

DIMENSIONS (mm are the original dimensions)

A

1

UNIT

A

b

c

D

E

e

H

L

Q

v

w

y

p

1

E

max

0.30

0.20

1.1

0.8

0.25

0.10

2.2

1.8

1.35

1.15

2.2

2.0

0.45

0.15

0.25

0.15

mm

0.1

1.3

0.65

0.2

0.1

REFERENCES

JEDEC

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

EIAJ

97-02-28

SOT363

SC-88

Fig 35. Package outline.

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

19 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

11. Revision history

Table 14: Revision history

Document ID

Release date Data sheet status

20040518 Product data

Change notice Order number

9397 750 13005

Supersedes

BF1205C_1

-

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

20 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

12. Data sheet status

Level Data sheet status^[1]Product status^{[2] [3]}

Deﬁnition

I

Objective data

Development

This data sheet contains data from the objective speciﬁcation for product development. Philips

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

II

Preliminary data

Qualiﬁcation

This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in

order to improve the design and supply the best possible product.

III

Product data

Production

This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

[1]

[2]

Please consult the most recently issued data sheet before initiating or completing a design.

The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3]

For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

13. Deﬁnitions

14. Disclaimers

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values deﬁnition — Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

speciﬁcation is not implied. Exposure to limiting values for extended periods

may affect device reliability.

Right to make changes — Philips Semiconductors reserves the right to

make changes in the products - including circuits, standard cells, and/or

software - described or contained herein in order to improve design and/or

performance. When the product is in full production (status ‘Production’),

relevant changes will be communicated via a Customer Product/Process

Change Notiﬁcation (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

license or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products are

free from patent, copyright, or mask work right infringement, unless otherwise

speciﬁed.

Application information — Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductors

make no representation or warranty that such applications will be suitable for

the speciﬁed use without further testing or modiﬁcation.

15. Contact information

For additional information, please visit: http://www.semiconductors.philips.com

For sales ofﬁce addresses, send an email to: sales.addresses@www.semiconductors.philips.com

9397 750 13005

Product data sheet

Rev. 01 — 18 May 2004

21 of 22

BF1205C

Philips Semiconductors

Dual N-channel dual gate MOS-FET

16. Contents

1

Product proﬁle . . . . . . . . . . . . . . . . . . . . . . . . . . 1

General description. . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data. . . . . . . . . . . . . . . . . . . . . 2

1.1

1.2

1.3

1.4

2

3

4

5

6

7

Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

Ordering information. . . . . . . . . . . . . . . . . . . . . 3

Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

Thermal characteristics. . . . . . . . . . . . . . . . . . . 3

Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

8

8.1

Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

Dynamic characteristics for ampliﬁer a. . . . . . . 5

Graphs for ampliﬁer a . . . . . . . . . . . . . . . . . . . . 6

Scattering parameters for ampliﬁer a . . . . . . . 10

Noise data for ampliﬁer a . . . . . . . . . . . . . . . . 10

Dynamic characteristics for ampliﬁer b. . . . . . 11

Graphs for ampliﬁer b . . . . . . . . . . . . . . . . . . . 12

Scattering parameters for ampliﬁer b . . . . . . . 17

Noise data for ampliﬁer b . . . . . . . . . . . . . . . . 17

8.1.1

8.1.2

8.1.3

8.2

8.2.1

8.2.2

8.2.3

9

Test information. . . . . . . . . . . . . . . . . . . . . . . . 18

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20

Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 21

Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Contact information . . . . . . . . . . . . . . . . . . . . 21

10

11

12

13

14

15

All rights are reserved. Reproduction in whole or in part is prohibited without the prior

written consent of the copyright owner. The information presented in this document does

not form part of any quotation or contract, is believed to be accurate and reliable and may

be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under

patent- or other industrial or intellectual property rights.

Date of release: 18 May 2004

Document order number: 9397 750 13005

Published in The Netherlands


型号：	BF1205C
厂家：	NXP
描述：	Dual N-channel dual gate MOS-FET 双N沟道双栅MOS -FET 栅
文件：	总22页 (文件大小：168K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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