ISL59831IRTZ [INTERSIL]
Single Supply Video Driver with Reconstruction Filter and Charge Pump; 单电源视频驱动器，带有重建滤波器和电荷泵
| 型号： | ISL59831IRTZ |
| 厂家： | 
Intersil |
| 描述： | Single Supply Video Driver with Reconstruction Filter and Charge Pump |
| 文件： | 总11页 (文件大小：613K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL59831
®
Data Sheet
March 29, 2007
FN6266.0
Single Supply Video Driver with
Features
Reconstruction Filter and Charge Pump
• 3.3V Nominal Supply, Operates Down to 3.0V
• DC-Coupled or AC-Coupled Input or Output
• Eliminates Need for Large Output Coupling Capacitor
The ISL59831 is a single supply video driver with
reconstruction filter and charge pump. It is designed to drive
SDTV displays with luma (Y) or composite video (CV)
signals. It operates on a single supply (3.0V to 3.6V) and
generates its own negative supply (-1.9V) using a regulated
charge pump. Input signal can be AC or DC coupled. When
AC coupled, the sync tip clamp sets the blank level to ground
at the output, ensuring that the sync-tip voltage level is set to
approximately -300mV at the back-termination resistor of a
standard video load. The ISL59831 is capable of driving two
AC or DC coupled standard video loads. The device also
• Internal Sync Tip Clamp Puts the Backporch to Ground at
the Output
• Drives Two Standard Video Loads
• Response Flat to 5MHz and 44dB Attenuation at 27MHz
• Pb-free Plus Anneal Available (RoHs Compliant)
Applications
• Set-Top Box Receiver
• Televisions
th
features a 4 order Butterworth reconstruction filter with
nominal -3dB frequency set to 9.1MHz, providing 44dB of
attenuation at 27MHz. When powered down, the device
draws 2µA supply current. Nominal operational current is
15mA. The ISL59831 is available in 12 Ld TDFN package
and operates from the -40°C to +85°C temperature range.
• DVD Players
• Digital Displays
• Cell Phones
ISL59831
(12 LD TDFN)
TOP VIEW
Pinout
• Digital Cameras
Simplified Block Diagram
IN
GND
1
2
3
4
5
6
12 OUT
11 VEE
IN
ISL59831
GND
10 CPVEE
OUT
LOWPASS
FILTER
VIDEO
OUT
VCC
9
8
7
CP
x 2
VIDEO IN
ENABLE
GCP
CN
CLAMP
VCP
CHARGE
PUMP
Ordering Information
PART
PART
TAPE &
PKG.
NUMBER
MARKING REEL
PACKAGE
DWG. #
ISL59831IRTZ
83IZ
-
12 Ld 4x3 TDFN L12.4x3A
12 Ld 4x3 TDFN L12.4x3A
ISL59831IRTZ-T7 83IZ
7”
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL59831
Pin Descriptions
NUMBER
NAME
FUNCTION
1
2, 3
4
IN
Video Input. AC-couple (0.1µF) or DC-couple
Ground
GND
V
Positive Power Supply. Bypass to GND with a 0.1µF capacitor.
Enable. Connect to V to enable device.
CC
5
ENABLE
GCP
VCP
CN
CC
Charge Pump Ground
6
7
Charge Pump Power Supply. Bypass with a 0.1µF capacitor to GCP.
8
Charge-Pump Flying Capacitor Negative Terminal. Connect a 56nF capacitor from CP to CN.
Charge-Pump Flying Capacitor Positive Terminal. Connect a 56nF capacitor from CP to CN.
Charge Pump Negative Output. Bypass with a 0.22µF capacitor to GCP.
9
CP
10
11
CPVEE
OUT
VEE
Negative Supply. Connect an RC filter between VEE and CPVEE
IN
. See “Block Diagram/Typical Application
OUT
IN
Circuit” on page 2.
12
OUT
EP
Video Output. Can be AC-coupled (220µF) or DC-coupled
Open or connect to VEE
IN
Block Diagram/Typical Application Circuit
3.0V TO 3.6V
VCC ENABLE
4.7μF
0.1μF
LPF
LUMA OR
CV VIDEO
SOURCE
75Ω
OUT
IN
LEVEL
SHIFT
X2
9MHz
75Ω
-
VEEIN
CLAMP
+
-593mV
20Ω
CPVEEOUT
RFIL
3.0V TO 3.6V
0.1μF
CS
VCP
CCP
CHARGE
PUMP
CFIL
0.22μF
ISL59831
4.7μF
0.1μF
GCP
GND
GND
CP
CN
56nF
CF
FN6266.0
March 29, 2007
2
ISL59831
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
V
V
to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V
Thermal Resistance (Typical, Notes 1, 2)
4x3 TDFN Package . . . . . . . . . . . . . . .
θ
(°C/W)
41
θ
JC
(°C/W)
3.5
CC
to GND . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to V
JA
+ 0.3V
IN
CC
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . ±50mA
Maximum Current into Any Pin . . . . . . . . . . . . . . . . . . . . . . . ±50mA
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3500V
Machine Model (Per EIAJ ED-4701 Method C-111). . . . . . . .350V
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
NOTES:
1. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379.
2. θ , “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
JC
Electrical Specifications
V
C
= V
= 3.3V, C = 56nF ±20%, C = 0.1µF ±20%, R
FIL
= 20Ω ±1%, C = 0.22µF ±20%,
FIL
CP
CC
F
S
= 0.1µF ±20%, R = 150Ω, C = 0pF, T = +27°C, unless otherwise specified.
IN
L
L
A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
DC CHARACTERISTICS
V
V
Supply Range
3.0
-1.1
4
3.3
-1.9
6
3.6
-2.4
8.5
20
V
V
CC, CP
CPVEE
Charge Pump Output
Supply Current
I
No load
No load
mA
mA
CC
I
Charge Pump Supply
Current
5
9
CP
I
Power Down Current
Input Pulldown Current
DC Gain
ENABLE = 0.4V
2
2
2
5
µA
µA
V/V
V
PD
I
V
= 0.5V
IN
0.5
1.9
4.5
2.06
IN
A
V
V
Max DC Input Range
DC-Coupled Input, guaranteed by output linearity
1.4
IN_MAX
V
Output Sync Tip Clamp Sync height = 293mV, V ≤ 0, AC-coupled input
-500
-550
-600
mV
CLAMPOUT
IN
Level
VCLAMPIN Input Clamp Level
Output Level Shift
Input floating
0
40
80
mV
mV
V
Sync height = 293mV, V > 0, output shifted relative to input,
-530
-592
-650
OS
IN
DC-coupled input
I
Clamp Restore Current Force V = -0.3V
IN
2
3.9
50
mA
dB
CLAMP
PSRR
Power Supply Rejection VCC = +3.0 to +3.6
35
DC
AC CHARACTERISTICS
A
A
Passband Flatness
Stopband Attenuation
Differential Gain
f = 100kHz to 5MHz relative to 100kHz
f ≥ 27MHz relative to 100kHz
5-step modulated staircase
0
2
dB
dB
%
PB
SB
25
44
0.4
0.35
59
dG
dP
Differential Phase
Signal to Noise Ratio
5-step modulated staircase
°
SNR
Peak signal (1.4V
) to RMS noise, f = 10Hz to 50MHz
P-P
dB
FN6266.0
March 29, 2007
3
ISL59831
Electrical Specifications
V
C
= V
= 3.3V, C = 56nF ±20%, C = 0.1µF ±20%, R
FIL
= 20Ω ±1%, C = 0.22µF ±20%,
FIL
CP
CC
F
S
= 0.1µF ±20%, R = 150Ω, C = 0pF, T = +27°C, unless otherwise specified. (Continued)
IN
L
L
A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
56
MAX
UNIT
ns
tg
DC Group Delay
Group delay at 100kHz
Δtg
Group Delay Deviation Deviation from 100kHz to 3.58MHz
10
ns
H
Line Time Distortion
Field Time Distortion
Clamp Settling Time
Power Supply Rejection V
18µs, 100 IRE
0.1
0.1
50
%
DIST
DIST
V
130 Lines, 18µs, 100 IRE
Back porch to ±1% of final value
%
t
Lines
dB
CLAMP
PSRR
+ 100mV
sine, f = 100kHz to 5MHz
P-P
32
CC
LOGIC
V
Logic Low Input Voltage
Logic High Input Voltage
0.8
10
V
V
IL
V
2.0
-10
IH
I
Logic Input Current
Source
µA
I
CHARGE PUMP
f
Charge Pump Clock
Frequency
15
MHz
CP
V
Charge Pump Noise
Coupling
R
= 20Ω, C
FIL
= 0.22µF, measured at output
10.8
mV
P-P
OUTCP
FIL
FN6266.0
March 29, 2007
4
ISL59831
Typical Performance Curves V = V = 3.3V, C = 56nF ±20%, C = 0.1µF ±20%, R = 20Ω ±1%, C = 0.22µF ±20,
CP
CC
F
S
FIL
FIL
C
= 0.1µF ±20%, R = 150Ω, C = 0pF, unless otherwise noted.
IN
L L
2
0
10
0
-10
-20
-30
-40
-50
-60
-70
C
= 220pF
L
-2
C
= 150pF
R
= 500Ω
L
L
-4
R
= 1000Ω
L
-6
C
= 10pF
L
R
= 150Ω
L
-8
V
C
= 2V
P-P
OUT
= 0pF
R
= 75Ω
L
L
-10
0.1M
1M
FREQUENCY (Hz)
10M
100M
0.1M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 1. GAIN vs FREQUENCY FOR VARIOUS R
FIGURE 2. GAIN vs FREQUENCY FOR VARIOUS C
LOAD
LOAD
9.16
9.15
9.14
9.13
9.12
9.11
9.10
2.0
V
C
= 2V
= 11pF
OUT
P-P
1.5
1.0
L
RL = 150Ω
0.5
0.0
-0.5
-1.0
-1.5
-2.0
0.1M
1M
10M
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
FIGURE 3. GAIN FLATNESS vs FREQUENCY
FIGURE 4. 3dB ROLL-OFF vs SUPPLY VOLTAGE
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
C
= 220pF
L
R
= 150Ω
L
3.0
3.1
3.2
3.3
3.4
3.5
3.6
0.1M
1M
FREQUENCY (Hz)
10M
100M
SUPPLY VOLTAGE (V)
FIGURE 5. PEAKING vs SUPPLY VOLTAGE (C = 220pF)
L
FIGURE 6. INPUT TO OUTPUT ISOLATION vs FREQUENCY
FN6266.0
March 29, 2007
5
ISL59831
Typical Performance Curves V = V = 3.3V, C = 56nF ±20%, C = 0.1µF ±20%, R = 20Ω ±1%, C = 0.22µF ±20,
CP
CC
F
S
FIL
FIL
C
= 0.1µF ±20%, R = 150Ω, C = 0pF, unless otherwise noted. (Continued)
IN
L L
18
16
14
12
10
8
9.4
9.3
9.2
9.1
9.0
8.9
8.8
NO LOAD
INPUT FLOATING
6
4
2
0
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
-40
-15
10
35
60
85
100M
10M
SUPPLY VOTLAGE (V)
TEMPERATURE (°C)
FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 8. BANDWIDTH vs TEMPERATURE
50
45
40
35
30
25
20
15
10
5
15.3
15.2
15.1
15.0
14.9
14.8
14.7
14.6
14.5
NO LOAD
INPUT FLOATING
14.4
0
14.3
0.01M
0.1M
1M
10M
-40
-15
10
35
60
85
FREQUENCY (Hz)
TEMPERATURE (°C)
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE
FIGURE 10. OUTPUT IMPEDANCE vs FREQUENCY
4000
0
-10
-20
-30
-40
-50
-60
-70
-80
3500
3000
2500
2000
1500
1000
500
0
100
1k
10k
FREQUENCY (Hz)
FIGURE 12. INPUT VOLTAGE NOISE vs FREQUENCY
100k
1M
0.01M
0.1M
FREQUENCY (Hz)
1M
10M
FIGURE 11. PSRR vs FREQUENCY
FN6266.0
March 29, 2007
6
ISL59831
Typical Performance Curves V = V = 3.3V, C = 56nF ±20%, C = 0.1µF ±20%, R = 20Ω ±1%, C = 0.22µF ±20,
CP
CC
F
S
FIL
FIL
C
= 0.1µF ±20%, R = 150Ω, C = 0pF, unless otherwise noted. (Continued)
IN
L L
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
V
= V
= +3.3V
CP
V
= V
= +3.3V
= 150Ω
CC
CC
CP
R
-10
-20
-30
-40
-50
-60
-70
-80
-90
V
= 2V , SINE WAVE
OUT
P-P
L
THD
R
= 150Ω
L
f
= 5MHz
IN
RD
3
HD
ND
2
HD
f
= 500kHz
2.5
IN
0.5
1.0
1.5
2.0
3.0
0.5M 1.0M 1.5M 2.0M 2.5M 3.0M 3.5M 4.0M 4.5M 5.0M
OUTPUT VOLTAGE (V
)
P-P
FREQUENCY (Hz)
FIGURE 13. HARMONIC DISTORTION vs FREQUENCY
FIGURE 14. THD (dBc) vs OUTPUT VOLTAGE (V
)
P-P
0.02
0.4
WAVEFORM = MODULATED RAMP
0 IRE to 100 IRE
0.01
0.00
0.3
0.2
0.1
0.0
-0.1
-0.01
-0.02
-0.03
-0.04
-0.05
-0.06
-0.07
-0.08
WAVEFORM = MODULATED RAMP
0 IRE to 100 IRE
0
1
2
3
4
5
6
7
8
9
10
11
0
1
2
3
4
5
6
7
8
9
10
11
STEP
STEP
FIGURE 15. DIFFERENTIAL GAIN
FIGURE 16. DIFFERENTIAL PHASE
CH1 = ENABLE SIGNAL
TIME SCALE = 20ns/DIV
CH1 = 1V/DIV
CH2 = 1V/DIV
ΔTIME = 29.5µs
CH1 = DISABLE SIGNAL
CH2 = OUTPUT SIGNAL
TIME SCALE = 5µs/DIV
CH1 = 1V/DIV
CH2 = 1V/DIV
CH2 = OUTPUT SIGNAL
FIGURE 17. DISABLE TIME
FIGURE 18. ENABLE TIME (WORST CASE)
FN6266.0
March 29, 2007
7
ISL59831
Typical Performance Curves V = V = 3.3V, C = 56nF ±20%, C = 0.1µF ±20%, R = 20Ω ±1%, C = 0.22µF ±20,
CP
CC
F
S
FIL
FIL
C
= 0.1µF ±20%, R = 150Ω, C = 0pF, unless otherwise noted. (Continued)
IN
L L
TIME SCALE = 500ns/DIV
IN = CH1 = 200mV/DIV
OUT = CH2 = 500mV/DIV
TIME SCALE = 100ns/DIV
IN = CH1 = 200mV/DIV
OUT = CH2 = 500mV/DIV
INPUT
INPUT
OUTPUT
OUTPUT
FIGURE 19. 12.5T RESPONSE
FIGURE 20. 2T RESPONSE
3.2
3.1
3.0
2.9
2.8
2.7
INPUT
TIME SCALE = 10µs/DIV
IN = CH1 = 500mV/DIV
OUT = CH2 = 1V/DIV
OUTPUT
f
= 500kHz
IN
AC-COUPLED INPUT
2.6
0
100 200 300 400 500 600 700 800 900 1000
LOAD RESISTANCE (Ω)
FIGURE 21. NTSC COLORBAR
FIGURE 22. MAXIMUM OUTPUT MAGNITUDE vs LOAD
RESISTANCE
100
80
60
40
20
0
TIME SCALE = 50ns
VERTICAL SCALE = 5mV/DIV
-20
0.1M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 23. GROUP DELAY vs FREQUENCY
FIGURE 24. AMPLIFIER OUTPUT NOISE (CHARGE PUMP
OSCILLATION)
FN6266.0
March 29, 2007
8
ISL59831
Video Performance
Description of Operation and Application
Information
DIFFERENTIAL GAIN/PHASE
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency and phase response as DC levels are changed at
the output. This is especially difficult when driving a standard
video load of 150Ω because of the change in output current
with changing DC levels. Special circuitry has been
incorporated into the ISL59831 for the reduction of output
impedance variation with the current output. This results in
outstanding differential gain and differential phase
specifications of 0.04% and 0.35°, while driving 150Ω at a
gain of +2V/V. Driving higher impedance loads would result
in similar or better differential gain and differential phase
performance.
Theory of Operation
The ISL59831 is a single supply video driver with a
reconstruction filter and an on-board charge pump. It is
designed to drive SDTV displays with luma (Y) or composite
video (CV) signals. The input signal can be AC-coupled or
DC-coupled. When AC-coupled, the sync tip clamp sets the
blank level to ground at the output. The ISL59831 is capable
of driving two AC-coupled or DC-coupled standard video
th
loads and has a 4 order Butterworth reconstruction filter
with nominal -3dB frequency set to 9.1MHz, providing 44dB
of attenuation at 27MHz. The ISL59831 is designed to
operate with a single supply voltage range ranging from 3.0V
to 3.6V. This eliminates the need for a split supply with the
incorporation of a charge pump capable of generating a
bottom rail as much as 1.9V below ground; providing a 5.2V
range on a single 3.3V supply. This performance is ideal for
NTSC video with negative-going sync pulses.
NTSC
The ISL59831, generating a negative rail internally, is ideally
suited for NTSC video with its accompanying negative-going
sync signals.
Output Amplifier
Driving Capacitive Loads and Cables
The ISL59831 output amplifier provides a gain of +6dB. The
output amplifier is able to drive a 2.8V
150Ω load to ground.
The ISL59831, internally-compensated to drive 75Ω cables,
will drive 220pF loads in parallel with 150Ω with less than
1.5dB of peaking.
video signal into a
P-P
The output is a highly-stable, low distortion, low power, high
frequency amplifier capable of driving moderate capacitive
loads.
AC-Coupled Inputs
SYNC TIP CLAMP
The ISL59831 features a sync tip clamp that sets the black
level of the output video signal to ground. This ensures that
the sync-tip voltage level is set to approximately -300mV at
the back-termination resistor of a standard video load. The
clamp is activated whenever the input voltage falls below 0V.
The correction voltage required to do this is stored across
the input AC-coupling capacitor. Refer to “Block
Diagram/Typical Application Circuit” on page 2 for a detailed
diagram.
Input/Output Range
The ISL59831 has a recommended dynamic input range of
0V
to 1.4V . This allows the device to handle the
P-P
P-P
maximum possible video signal input. As the input signal
moves outside the specified range, the output signal will
exhibit increasingly higher levels of harmonic distortion. As
the load resistance becomes lower, the current drive
capability of the device will be challenged and its ability to
drive close to each rail is reduced.
DC-Coupled Inputs
The Charge Pump
When DC-coupling the inputs ensure that the lowest signal
level is greater than +50mV to prevent the clamp from
turning on and distorting the output. When DC-coupled the
ISL59831 shifts the signal by -550mV from input to output.
The ISL59831 charge pump provides a bottom rail up to
1.9V below ground while operating on a 3.0V to 3.6V power
supply. The charge pump is internally regulated and is driven
by an internal 15MHz clock.
Amplifier Disable
To reduce the noise on the power supply generated by the
charge pump, connect a low pass RC-network between
The ISL59831 can be disabled and its output placed in a
high impedance state. The turn-off time is around 10ns and
the turn-on time is around 30µs. The turn-on time is greater
in length because extra time is given for the charge pump to
settle before the amplifier is enabled. When disabled, the
amplifier's supply current is reduced to 2µA typically,
reducing power consumption. The amplifier's power-down
can be controlled by standard TTL or CMOS signal levels at
the ENABLE pin. The applied logic signal is relative to the
GND pin. Applying a signal that is less than 0.8V above
CPVEE
and VEE . See “Block Diagram/Typical
OUT
IN
Application Circuit” on page 2 for further information.
The CPVEE Pin
OUT
is the output pin for the charge pump. Keep in
CPVEE
OUT
mind that the output of this pin is generated by the internal
charge pump and a fully regulated supply that must be
properly bypassed. Bypass this pin with a 0.1µF ceramic
capacitor placed as close to the pin and connected to the
ground plane of the board.
FN6266.0
March 29, 2007
9
ISL59831
GND will disable the amplifier. The amplifier will be enabled
By setting the two P
equations equal to each other, we
DMAX
when the signal at ENABLE pin is 2V above GND.
can solve the output current and R
overheat.
to avoid the device
LOAD
Output Drive Capability
Power Supply Bypassing and Printed Circuit
Board Layout
The maximum output current for the ISL59831 is set at
±50mA. Maximum reliability is maintained if the output
current never exceeds ±50mA, after which the electro-
migration limit of the process will be exceeded and the part
will be damaged. This limit is set by the design of the internal
metal interconnections.
Strip line design techniques are recommended for the input
and output signal traces. As with any high frequency device,
a good printed circuit board layout is necessary for optimum
performance. Lead lengths should be as short as possible.
The power supply pin must be well bypassed to reduce the
risk of oscillation. For normal single supply operation, a
single 4.7µF tantalum capacitor in parallel with a 0.1µF
Power Dissipation
With the high output drive capability of the ISL59831, it is
possible to exceed the +150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
ceramic capacitor from V
and V to GND will suffice.
CP
CC
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance can result in
The maximum power dissipation allowed in a package is
determined according to Equation 1:
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is also very important.
T
– T
AMAX
JMAX
--------------------------------------------
PD
=
MAX
Θ
JA
(EQ. 1)
Where:
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
T
AMAX
Θ
= Thermal resistance of the package
JA
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
V
i
OUT
R i
L
-----------------
i) ×
OUT
PD
= V × I
+ (V – V
MAX
S
SMAX
S
(EQ. 2)
(EQ. 3)
for sinking:
PD
= V × I
+ (V
i – V ) × I
i
LOAD
MAX
S
SMAX
OUT
S
Where:
V = Supply voltage
S
I
= Maximum quiescent supply current
SMAX
V
= Maximum output voltage of the application
OUT
R
= Load resistance tied to ground
LOAD
I
= Load current
LOAD
i = Number of output channels
FN6266.0
March 29, 2007
10
ISL59831
Thin Dual Flat No-Lead Plastic Package (TDFN)
L12.4x3A
12 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-229-WGED-4 ISSUE C)
2X
0.15
C
A
A
D
MILLIMETERS
2X
SYMBOL
MIN
0.70
NOMINAL
0.75
MAX
0.80
NOTES
0.15
C B
A
A1
A3
b
-
-
0.18
3.15
1.55
-
0.05
-
0.20 REF
0.23
-
E
6
0.30
3.40
1.80
5,8
INDEX
AREA
D
4.00 BSC
3.30
-
D2
E
7,8
TOP VIEW
B
3.00 BSC
1.70
-
E2
e
7,8
0.50 BSC
-
-
//
0.10
0.08
C
k
0.20
0.30
-
-
A
L
0.40
0.50
8
C
N
12
2
SIDE VIEW
D2
A3
C
Nd
6
3
SEATING
PLANE
Rev. 0 1/06
NOTES:
7
8
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
(DATUM B)
D2/2
3. Nd refers to the number of terminals on D.
1
2
6
4. All dimensions are in millimeters. Angles are in degrees.
INDEX
AREA
NX k
E2
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
(DATUM A)
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
E2/2
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
NX L
N
N-1
e
NX b
0.10
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
8
5
(Nd-1)Xe
REF.
M
C A B
BOTTOM VIEW
C
L
(A1)
NX (b)
5
L
e
SECTION "C-C"
TERMINAL TIP
FOR EVEN TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6266.0
March 29, 2007
11
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