HGTG20N120E2 [INTERSIL]
34A, 1200V N-Channel IGBT; 34A ， 1200V N沟道IGBT
| 型号： | HGTG20N120E2 |
| 厂家： | 
Intersil |
| 描述： | 34A, 1200V N-Channel IGBT |
| 文件： | 总5页 (文件大小：171K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Semiconductor
HGTG20N120E2
34A, 1200V N-Channel IGBT
April 1995
Features
• 34A, 1200V
Package
JEDEC STYLE TO-247
• Latch Free Operation
• Typical Fall Time - 780ns
• High Input Impedance
• Low Conduction Loss
EMITTER
COLLECTOR
GATE
COLLECTOR
(BOTTOM SIDE
METAL)
Description
The HGTG20N120E2 is a MOS gated, high voltage switch-
ing device combining the best features of MOSFETs and
bipolar transistors. The device has the high input impedance
of a MOSFET and the low on-state conduction loss of a
bipolar transistor. The much lower on-state voltage drop
varies only moderately between +25oC and +150oC.
Terminal Diagram
C
IGBTs are ideal for many high voltage switching applications
operating at frequencies where low conduction losses are
essential, such as: AC and DC motor controls, power
supplies and drivers for solenoids, relays and contactors.
The development type number for this device is TA49009.
G
PACKAGING AVAILABILITY
E
PART NUMBER
PACKAGE
TO-247
BRAND
G20N120E2
HGTG20N120E2
o
Absolute Maximum Ratings T = +25 C, Unless Otherwise Specified
C
HGTG20N120E2
1200
UNITS
V
V
Collector-Emitter Breakdown Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BV
CES
CGR
Collector-Gate Breakdown Voltage R = 1MΩ. . . . . . . . . . . . . . . . . . . . . . . . . . . BV
1200
GE
Collector Current Continuous
o
At T = +25 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
34
20
100
±20
±30
A
A
A
V
V
-
C
C25
o
At T = +90 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
C90
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Gate-Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Gate-Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Switching SOA at T = +150 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .SSOA
Power Dissipation Total at T = +25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Power Dissipation Derating T > +25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . .T , T
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
(0.125" from case for 5 seconds)
CM
GES
GEM
o
100A at 0.8 BV
150
C
CES
o
W
C
D
o
o
1.20
-55 to +150
260
W/ C
C
o
C
C
J
STG
o
L
Short Circuit Withstand Time (Note 2)
At V = 15V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t
3
15
µs
µs
GE
SC
SC
At V = 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t
GE
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
o
2. V
= 720V, T = +125 C, R = 25Ω
CE(PEAK)
C
GE
HARRIS SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS:
4,364,073
4,417,385
4,598,461
4,644,637
4,801,986
4,883,767
4,430,792
4,605,948
4,682,195
4,803,533
4,888,627
4,443,931
4,618,872
4,684,413
4,809,045
4,890,143
4,466,176
4,620,211
4,694,313
4,809,047
4,901,127
4,516,143
4,631,564
4,717,679
4,810,665
4,904,609
4,532,534
4,639,754
4,743,952
4,823,176
4,933,740
4,567,641
4,639,762
4,783,690
4,837,606
4,963,951
4,587,713
4,641,162
4,794,432
4,860,080
4,969,027
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
File Number 3370.2
Copyright © Harris Corporation 1995
3-98
Specifications HGTG20N120E2
o
Electrical Specifications T = +25 C, Unless Otherwise Specified
C
LIMITS
PARAMETERS
SYMBOL
BV
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Collector-Emitter Breakdown
Voltage
I
= 250µA, V = 0V
1200
-
-
V
CES
C
GE
o
Collector-Emitter Leakage Current
I
V
V
= BV
T
T
T
T
T
T
T
= +25 C
-
-
250
1.0
3.5
3.6
3.8
4.0
6.0
µA
mA
V
CES
CE
CE
CES
C
C
C
C
C
C
C
o
= 0.8 BV
= +125 C
-
-
CES
o
Collector-Emitter Saturation
Voltage
V
I
I
I
= I , V = 15V
= +25 C
-
2.9
3.0
3.1
3.3
4.5
CE(SAT)
C
C
C
C90
GE
o
= +125 C
-
-
V
o
= I , V = 10V
= +25 C
V
C90
GE
o
= +125 C
-
V
o
Gate-Emitter Threshold Voltage
V
= 500µA,
= +25 C
3.0
V
GE(TH)
V
= V
GE
CE
Gate-Emitter Leakage Current
Gate-Emitter Plateau Voltage
On-State Gate Charge
I
V
= ±20V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
±250
nA
V
GES
GE
V
I
I
= I , V = 0.5 BV
7.0
-
150
200
-
GEP
C
C90
CE
CES
Q
= I
,
V
V
= 15V
= 20V
110
150
100
150
520
780
7.0
nC
nC
ns
ns
ns
ns
mJ
ns
ns
ns
ns
mJ
G(ON)
C
C90
GE
GE
V
= 0.5 BV
CES
CE
Current Turn-On Delay Time
Current Rise Time
t
R = 48Ω
I = I , V = 15V,
C C90 GE
D(ON)
L
V
= 0.8 BV
,
CE
CES
t
-
R
= 25Ω,
R
G
o
T = +125 C
J
Current Turn-Off Delay Time
Current Fall Time
t
L = 50µH
620
1000
-
D(OFF)I
t
FI
Turn-Off Energy (Note 1)
Current Turn-On Delay Time
Current Rise Time
W
OFF
t
R = 48Ω
I
= I , V = 10V,
100
150
420
780
7.0
-
D(ON)
L
C
C90
= 0.8 BV
GE
V
,
CE
CES
t
-
R
= 25Ω,
R
G
o
T = +125 C
J
Current Turn-Off Delay Time
Current Fall Time
t
L = 50µH
520
1000
-
D(OFF)I
t
FI
Turn-Off Energy (Note 1)
Thermal Resistance
NOTE:
W
R
OFF
o
0.70
0.83
C/W
θJC
1. Turn-Off Energy Loss (W
) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and
OFF
ending at the point where the collector current equals zero (I = 0A). The HGTG20N120E2 was tested per JEDEC standard No. 24-1
CE
Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
3-99
HGTG20N120E2
Typical Performance Curves
FIGURE 1. TRANSFER CHARACTERISTICS (TYPICAL)
FIGURE 2. SATURATION CHARACTERISTICS (TYPICAL)
FIGURE 3. MAXIMUM DC COLLECTOR CURRENT AS A
FUNCTION OF CASE TEMPERATURE
FIGURE 4. FALL TIME AS A FUNCTION OF COLLECTOR-
EMITTER CURRENT
FIGURE 5. CAPACITANCE AS A FUNCTION OF COLLECTOR-
EMITTER VOLTAGE
FIGURE 6. NORMALIZED SWITCHING WAVEFORMS AT
CONSTANT GATE CURRENT. (REFER TO
APPLICATION NOTES AN7254 AND AN7260)
3-100
HGTG20N120E2
Typical Performance Curves (Continued)
FIGURE 7. SATURATION VOLTAGE AS A FUNCTION OF
COLLECTOR-EMITTER CURRENT
FIGURE 8. TURN-OFF SWITCHING LOSS AS A FUNCTION OF
COLLECTOR-EMITTER CURRENT
FIGURE 9. TURN-OFF DELAY AS A FUNCTION OF COLLECTOR-
EMITTER CURRENT
FIGURE 10. OPERATING FREQUENCY AS A FUNCTION OF
COLLECTOR-EMITTER CURRENT AND VOLTAGE
FIGURE 11. COLLECTOR-EMITTER SATURATION VOLTAGE
3-101
HGTG20N120E2
Test Circuit
L = 50µH
1/RG = 1/RGEN + 1/RGE
RGEN = 50Ω
+
-
VCC
960V
20V
0V
RGE = 50Ω
FIGURE 12. INDUCTIVE SWITCHING TEST CIRCUIT
Operating Frequency Information
Handling Precautions for IGBTs
Operating frequency information for a typical device (Figure Insulated Gate Bipolar Transistors are susceptible to gate-
10) is presented as a guide for estimating device performance insulation damage by the electrostatic discharge of energy
for a specific application. Other typical frequency vs collector through the devices. When handling these devices, care
current (ICE) plots are possible using the information shown should be exercised to assure that the static charge built in
for a typical unit in Figures 7, 8 and 9. The operating the handler’s body capacitance is not discharged through
frequency plot (Figure 10) of a typical device shows fMAX1 or the device. With proper handling and application procedures,
fMAX2 whichever is smaller at each point. The information is however, IGBTs are currently being extensively used in
based on measurements of a typical device and is bounded production by numerous equipment manufacturers in
by the maximum rated junction temperature.
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
fMAX1 is defined by fMAX1 = 0.05/tD(OFF)I. tD(OFF)I deadtime
(the denominator) has been arbitrarily held to 10% of the on-
state time for a 50% duty factor. Other definitions are
possible. tD(OFF)I is defined as the time between the 90% 1. Prior to assembly into a circuit, all leads should be kept
point of the trailing edge of the input pulse and the point
where the collector current falls to 90% of its maximum
value. Device turn-off delay can establish an additional fre-
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “† ECCOSORBD LD26” or equivalent.
quency limiting condition for an application other than TJMAX
tD(OFF)I is important when controlling output ripple under a
lightly loaded condition. fMAX2 is defined by fMAX2 = (Pd - Pc)/
.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
W
OFF. The allowable dissipation (Pd) is defined by Pd =
(TJMAX - TC)/RθJC. The sum of device switching and conduc-
tion losses must not exceed Pd. A 50% duty factor was used
(Figure 10) and the conduction losses (Pc) are approximated
by Pc = (VCE • ICE)/2. WOFF is defined as the integral of the
instantaneous power loss starting at the trailing edge of the
input pulse and ending at the point where the collector
current equals zero (ICE = 0A).
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
The switching power loss (Figure 10) is defined as fMAX2
•
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup
on the input capacitor due to leakage currents or pickup.
W
OFF. Turn-on switching losses are not included because
they can be greatly influenced by external circuit conditions
and components.
7. Gate Protection - These devices do not have an internal
monolithic zener diode from gate to emitter. If gate
protection is required an external zener is recommended.
† Trademark Emerson and Cumming, Inc.
3-102
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