IRFH7085PBF_15 [INFINEON]
Half-bridge and full-bridge topologies;
| 型号： | IRFH7085PBF_15 |
| 厂家： | 
Infineon |
| 描述： | Half-bridge and full-bridge topologies |
| 文件： | 总11页 (文件大小：508K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
StrongIRFET™
IRFH7085PbF
HEXFET® Power MOSFET
Application
VDSS
60V
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
DC/DC converters
RDS(on) typ.
max
2.6m
3.2m
147A
DC/AC Inverters
ID (Silicon Limited)
ID (Package Limited)
100A
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant
Base part number
Package Type
Standard Pack
Orderable Part Number
Form
Tape and Reel
Quantity
4000
IRFH7085TRPbF
IRFH7085PbF
PQFN 5mm x 6mm
8.0
7.0
6.0
5.0
4.0
3.0
2.0
150
125
100
75
I
= 75A
D
Limited By Package
T
= 125°C
= 25°C
J
50
T
J
25
0
4
6
8
10 12 14 16 18 20
25
50
T
75
100
125
150
, Case Temperature (°C)
C
V
Gate -to -Source Voltage (V)
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
1
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IRFH7085PbF
Absolute Maximum Rating
Symbol
Parameter
Max.
23
Units
ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V
ID @ TC(Bottom) = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC(Bottom) = 100°C Continuous Drain Current, VGS @ 10V
147
A
93
100
590
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
A
W
W/°C
V
PD @ TC = 25°C
Maximum Power Dissipation
Linear Derating Factor
156
1.25
± 20
VGS
Gate-to-Source Voltage
TJ
TSTG
Operating Junction and
Storage Temperature Range
-55 to + 150
°C
Avalanche Characteristics
Symbol
EAS (Thermally limited)
EAS (Thermally limited)
IAR
Max.
319
554
Units
Parameter
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
mJ
See Fig 15, 16, 23a, 23b
EAR
Repetitive Avalanche Energy
Thermal Resistance
Parameter
Junction-to-Case
Typ.
0.5
Max.
0.8
20
Units
RJC (Bottom)
RJC (Top)
RJA
Junction-to-Case
–––
–––
–––
°C/W
Junction-to-Ambient
Junction-to-Ambient
34
RJA (<10s)
22
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Min.
60
Typ.
–––
43
Max.
–––
–––
3.2
Units
Conditions
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
VGS = 0V, ID = 250µA
V
mV/°C
m
Reference to 25°C, ID = 1.0mA
V(BR)DSS/TJ
–––
–––
–––
2.1
V
GS = 10V, ID = 75A
GS = 6.0V, ID = 38A
2.6
RDS(on)
Static Drain-to-Source On-Resistance
V
3.6
–––
3.7
VGS(th)
IDSS
Gate Threshold Voltage
VDS = VGS, ID = 150µA
VDS = 60V, VGS = 0V
–––
–––
–––
–––
–––
1.4
V
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
1.0
µA
V
DS = 60V,VGS = 0V,TJ = 125°C
VGS = 20V
GS = -20V
150
100
-100
–––
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
nA
V
RG
Notes:
Calculated continuous current based on maximum allowable junction temperature. Package is limited to 100A by
production test capability.
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 113µH, RG = 50, IAS = 75A, VGS = 10V.
ISD 75A, di/dt 1280A/µs, VDD V(BR)DSS, TJ 150°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 33A, VGS =10V.
When mounted on 1 inch square PCB (FR-4). Please refer to AN-994 for more details:
http://www.irf.com/technical-info/appnotes/an-994.pdf
2
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IRFH7085PbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 10V, ID = 75A
ID = 75A
140 ––– –––
––– 110 165
S
Qg
V
DS = 30V
GS = 10V
Qgs
Gate-to-Source Charge
–––
–––
–––
–––
30
36
74
13
–––
–––
–––
–––
nC
V
Qgd
Gate-to-Drain Charge
Qsync
td(on)
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
VDD = 30V
ID = 30A
tr
Rise Time
–––
–––
–––
25
63
23
–––
–––
–––
ns
td(off)
Turn-Off Delay Time
RG = 2.7
V
GS = 10V
VGS = 0V
DS = 25V
tf
Fall Time
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 6460 –––
––– 560 –––
––– 380 –––
V
ƒ = 1.0MHz
pF
Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 570 –––
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Coss eff.(TR) Output Capacitance (Time Related)
––– 715 –––
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
––– ––– 147
A
––– ––– 590
G
ISM
S
VSD
Diode Forward Voltage
––– –––
1.2
V
TJ = 25°C,IS = 75A,VGS = 0V
dv/dt
Peak Diode Recovery dv/dt
–––
3.0
––– V/ns TJ = 150°C,IS = 75A,VDS = 60V
–––
–––
–––
–––
31
30
39
33
–––
–––
–––
–––
TJ = 25°C
VDD = 51V
IF = 75A,
trr
Reverse Recovery Time
ns
TJ = 125°C
TJ = 25°C di/dt = 100A/µs
Qrr
Reverse Recovery Charge
Reverse Recovery Current
nC
A
TJ = 125°C
IRRM
TJ = 25°C
–––
1.9
–––
3
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IRFH7085PbF
10000
1000
100
10
1000
100
10
VGS
15V
10V
7.0V
6.0V
5.0V
4.5V
4.3V
4.0V
VGS
15V
10V
7.0V
6.0V
5.0V
4.5V
4.3V
4.0V
TOP
TOP
BOTTOM
BOTTOM
4.3V
1
60µs PULSE WIDTH
Tj = 150°C
60µs PULSE WIDTH
4.0V
Tj = 25°C
10
, Drain-to-Source Voltage (V)
0.1
1
0.1
1
100
0.1
1
10
100
V
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
1000
2.4
2.0
1.6
1.2
0.8
0.4
I
= 75A
D
V
= 10V
GS
100
T
= 150°C
J
T
= 25°C
V
10
J
= 25V
DS
60µs PULSE WIDTH
1.0
3
4
5
6
7
8
-60 -40 -20
0
20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
14.0
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 75A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
12.0
= C
rss
oss
gd
= C + C
V
V
= 48V
= 30V
DS
DS
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
C
oss
rss
C
100
0
20 40 60 80 100 120 140 160
1
10
100
Q , Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
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IRFH7085PbF
1000
100
10
1000
100
10
100µsec
1msec
T
= 150°C
J
Limited by
package
OPERATION
IN THIS
AREA
1
LIMITED BY
R
(on)
T
= 25°C
DS
J
10msec
DC
0.1
0.01
Tc = 25°C
Tj = 150°C
Single Pulse
V
= 0V
GS
1.0
0.1
1
10
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
V
SD
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
1.2
76
Id = 1.0mA
1.0
0.8
0.6
0.4
0.2
0.0
74
72
70
68
66
64
0
10
20
30
40
50
60
70
-60 -40 -20
0
20 40 60 80 100 120 140 160
, Temperature ( °C )
T
J
V
Drain-to-Source Voltage (V)
DS,
Fig 12. Typical Coss Stored Energy
Fig 11. Drain-to-Source Breakdown Voltage
3.4
V
V
V
V
= 6.0V
GS
GS
GS
GS
= 7.0V
= 10V
= 15V
3.2
3.0
2.8
2.6
2.4
2.2
0
20 40 60 80 100 120 140 160 180 200
, Drain Current (A)
I
D
Fig 13. Typical On-Resistance vs. Drain Current
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March 17, 2015
IRFH7085PbF
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 125°C and
Tstart =25°C (Single Pulse)
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 125°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs. Pulse Width
200
160
120
80
TOP
Single Pulse
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
22a, 22b.
BOTTOM 1.0% Duty Cycle
I
= 75A
D
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
40
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 16).
0
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
25
50
75
100
125
150
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
I
av = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy vs. Temperature
EAS (AR) = PD (ave)· av
t
6
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IRFH7085PbF
4.5
4.0
3.5
3.0
2.5
2.0
1.5
12
10
8
I
= 45A
= 51V
F
V
R
T = 25°C
J
T = 125°C
J
6
I
I
I
I
= 150µA
= 250µA
= 1.0mA
= 1.0A
D
D
D
D
4
2
0
-75 -50 -25
0
25 50 75 100 125 150
0
200
400
600
800
1000
T
, Temperature ( °C )
di /dt (A/µs)
J
F
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
12
200
160
120
80
I
= 75A
= 51V
I
= 45A
= 51V
R
F
F
V
V
R
10
8
T = 25°C
J
T = 125°C
J
T = 25°C
J
T = 125°C
J
6
4
40
2
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt
200
I
= 75A
F
V
= 51V
R
160
120
80
40
0
T = 25°C
J
T = 125°C
J
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig 21. Typical Stored Charge vs. dif/dt
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IRFH7085PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
I
0.01
t
p
AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
Fig 25a. Gate Charge Test Circuit
8
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IRFH7085PbF
PQFN 5x6 Outline "B" Package Details
For more information on board mounting, including footprint and stencil recommendation, please refer to application note
AN-1136: http://www.irf.com/technical-info/appnotes/an-1136.pdf
For more information on package inspection techniques, please refer to application note AN-1154:
http://www.irf.com/technical-info/appnotes/an-1154.pdf
PQFN 5x6 Part Marking
INTERNATIONAL
RECTIFIER LOGO
DATE CODE
PART NUMBER
XXXX
(“4 or 5 digits”)
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
MARKING CODE
XYWWX
XXXXX
(Per Marking Spec)
PIN 1
IDENTIFIER
LOT CODE
(Eng Mode - Min last 4 digits of EATI#)
(Prod Mode - 4 digits of SPN code)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFH7085PbF
PQFN 5x6 Tape and Reel
REEL DIMENSIONS
TAPE DIMENSIONS
CODE
Ao
DESCRIPTION
Dimension design to accommodate the component width
Dimension design to accommodate the component lenght
Dimension design to accommodate the component thickness
Overall width of the carrier tape
Bo
Ko
W
P
1
Pitch between successive cavity centers
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Note: All dimension are nominal
Package
Type
Reel
Diameter
(Inch)
QTY
Reel
Width
W1
Ao
Bo
Ko
P1
W
Pin 1
(mm)
(mm)
(mm)
(mm)
(mm)
Quadrant
(mm)
5 X 6 PQFN
13
4000
12.4
6.300
5.300
1.20
8.00
12
Q1
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRFH7085PbF
Qualification Information†
Qualification level
Industrial
(per JEDEC JESD47F †† guidelines )
MSL1
PQFN 5mm x 6mm
Moisture Sensitivity Level
RoHS Compliant
(per JEDEC J-STD-020D††)
Yes
†
††
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comments
Added EAS (L =1mH) = 554mJ on page 2
Added note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 33A, VGS =10V”. on page 2
Added Pd @ Tc = 25°C on Absolute Max Rating table on page 2
11/7/2014
3/17/2015
Updated package outline and tape and reel on pages 9 and 10.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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March 17, 2015
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