BCP69T1/D [ETC]
PNP Epitaxial Transistor ; PNP晶体管外延\n
| 型号： | BCP69T1/D |
| 厂家： | 
ETC |
| 描述： | PNP Epitaxial Transistor
|
| 文件： | 总8页 (文件大小：52K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ON Semiconductort
BCP69T1
ON Semiconductor Preferred Device
PNP Silicon
Epitaxial Transistor
This PNP Silicon Epitaxial Transistor is designed for use in low
voltage, high current applications. The device is housed in the
SOT-223 package, which is designed for medium power surface
mount applications.
MEDIUM POWER
PNP SILICON
HIGH CURRENT
TRANSISTOR
SURFACE MOUNT
• High Current: I = –1.0 Amp
C
• The SOT-223 Package can be soldered using wave or reflow.
• SOT-223 package ensures level mounting, resulting in improved
thermal conduction, and allows visual inspection of soldered joints.
The formed leads absorb thermal stress during soldering, eliminating
the possibility of damage to the die.
4
1
2
3
• Available in 12 mm Tape and Reel
Use BCP69T1 to order the 7 inch/1000 unit reel.
Use BCP69T3 to order the 13 inch/4000 unit reel.
CASE 318E-04, STYLE 1
TO-261AA
• NPN Complement is BCP68
COLLECTOR 2,4
BASE
1
EMITTER 3
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Rating
Symbol
Value
–25
Unit
Vdc
Vdc
Vdc
Adc
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
Collector Current
V
CEO
V
CBO
V
EBO
–20
–5.0
–1.0
I
C
(1)
Total Power Dissipation @ T = 25°C
Derate above 25°C
P
D
1.5
12
Watts
mW/°C
A
Operating and Storage Temperature Range
DEVICE MARKING
T , T
–65 to 150
°C
J
stg
CE
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance — Junction-to-Ambient (surface mounted)
R
83.3
°C/W
θ
JA
L
Lead Temperature for Soldering, 0.0625″ from case
Time in Solder Bath
T
260
10
°C
Sec
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min. 0.93 sq. in.
Preferred devices are ON Semiconductor recommended choices for future use and best overall value.
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
March, 2001 – Rev. 3
BCP69T1/D
BCP69T1
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristics
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector-Emitter Breakdown Voltage (I = –100 µAdc, I = 0)
V
–25
–20
–5.0
—
—
—
—
—
—
—
—
Vdc
Vdc
C
E
(BR)CES
(BR)CEO
(BR)EBO
Collector-Emitter Breakdown Voltage (I = –1.0 mAdc, I = 0)
V
V
C
B
Emitter-Base Breakdown Voltage (I = –10 µAdc, I = 0)
—
Vdc
E
C
Collector-Base Cutoff Current (V = –25 Vdc, I = 0)
I
CBO
–10
–10
µAdc
µAdc
CB
E
Emitter-Base Cutoff Current (V = –5.0 Vdc, I = 0)
I
EBO
—
EB
C
ON CHARACTERISTICS
DC Current Gain
h
FE
—
(I = –5.0 mAdc, V = –10 Vdc)
50
85
60
—
—
—
—
375
—
C
CE
(I = –500 mAdc, V = –1.0 Vdc)
C
CE
(I = –1.0 Adc, V = –1.0 Vdc)
C
CE
Collector-Emitter Saturation Voltage (I = –1.0 Adc, I = –100 mAdc)
V
CE(sat)
—
—
—
—
–0.5
–1.0
Vdc
Vdc
C
B
Base-Emitter On Voltage (I = –1.0 Adc, V = –1.0 Vdc)
V
BE(on)
C
CE
DYNAMIC CHARACTERISTICS
Current-Gain — Bandwidth Product
f
T
—
60
—
MHz
(I = –10 mAdc, V = –5.0 Vdc)
C
CE
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2
BCP69T1
TYPICAL ELECTRICAL CHARACTERISTICS
300
200
100
200
70
50
100
V
= -10 V
CE
T = 25°C
V
= -1.0 V
CE
T = 25°C
70
50
J
f = 30 MHz
J
20
-10
30
-100
-1000
-10
-100
-1000
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 6. DC Current Gain
Figure 7. Current Gain Bandwidth Product
160
120
80
40
0
-1.0
-ā0.8
T = 25°C
J
T = 25°C
J
V
@ I /I = 10
C B
(BE)sat
-ā0.6
-ā0.4
V
@ V = -1.0 V
CE
(BE)on
C
ib
-ā0.2
0
V
@ I /I = 10
C B
(CE)sat
Cob
-1.0
-10
-100
-1000
C
-ā5.0
-1.0
-1.0
-ā2.0
-1.5
-ā3.0
-ā2.0
-ā4.0
-ā2.5
-ā5.0
ob
C
I , COLLECTOR CURRENT (mA)
C
ib
V , REVERSE VOLTAGE (VOLTS)
R
Figure 8. Saturation and “ON” Voltages
Figure 9. Capacitances
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3
BCP69T1
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
POWER DISSIPATION
The power dissipation of the SOT-223 is a function of the
input pad size. These can vary from the minimum pad size
for soldering to the pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
the equation for an ambient temperature T of 25°C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
A
150°C – 25°C
determined by T , the maximum rated junction
J(max)
PD
=
= 1.5 watts
83.3°C/W
temperature of the die, R , the thermal resistance from the
θJA
device junction to ambient; and the operating temperature,
The 83.3°C/W for the SOT-223 package assumes the
recommended collector pad area of 965 sq. mils on a glass
epoxy printed circuit board to achieve a power dissipation of
1.5 watts. If space is at a premium, a more realistic approach
T . Using the values provided on the data sheet for the
A
SOT-223 package, P can be calculated as follows.
D
TJ(max) – TA
is to use the device at a P of 833 mW using the footprint
PD
=
D
Rθ
JA
shown. Using a board material such as Thermal Clad, a
power dissipation of 1.6 watts can be achieved using the
same footprint.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
MOUNTING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the maximum
temperature gradient should be 5°C or less.
• After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Always preheat the device.
• The delta temperature between the preheat and soldering
should be 100°C or less.*
• Mechanical stress or shock should not be applied during
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference should be a maximum of 10°C.
cooling
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.15
3.8
0.079
2.0
0.248
6.3
0.091
2.3
0.091
2.3
0.079
2.0
inches
mm
0.059
1.5
0.059
1.5
0.059
1.5
SOT-223
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4
BCP69T1
PACKAGE DIMENSIONS
SOT–223 (TO–261)
CASE 318E–04
ISSUE K
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
2
INCHES
DIM MIN MAX
MILLIMETERS
S
B
MIN
6.30
3.30
1.50
0.60
2.90
2.20
MAX
6.70
3.70
1.75
0.89
3.20
2.40
0.100
0.35
2.00
1.05
10
1
3
A
B
C
D
F
0.249
0.130
0.060
0.024
0.115
0.087
0.263
0.145
0.068
0.035
0.126
0.094
D
G
H
J
L
0.0008 0.0040 0.020
G
0.009
0.060
0.033
0
0.014
0.078
0.041
10
0.24
1.50
0.85
0
J
K
L
C
M
S
_
_
_
_
0.08 (0003)
0.264
0.287
6.70
7.30
M
H
K
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
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5
BCP69T1
Notes
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6
BCP69T1
Notes
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7
BCP69T1
Thermal Clad is a trademark of the Bergquist Company
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
CENTRAL/SOUTH AMERICA:
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P.O. Box 5163, Denver, Colorado 80217 USA
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
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Toll Free from Hong Kong & Singapore:
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001–800–4422–3781
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Email: ONlit–french@hibbertco.com
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JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)
Email: ONlit@hibbertco.com
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EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
For additional information, please contact your local
Sales Representative.
*Available from Germany, France, Italy, UK, Ireland
BCP69T1/D
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