CEP01N6 [CET]
N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
| 型号： | CEP01N6 |
| 厂家： | 
CHINO-EXCEL TECHNOLOGY |
| 描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 文件： | 总4页 (文件大小：86K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CEP01N6/CEB01N6
CEI01N6/CEF01N6
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
Type
VDSS
650V
650V
650V
650V
RDS(ON)
15Ω
ID
@VGS
10V
CEP01N6
CEB01N6
CEI01N6
CEF01N6
1A
1A
1A
1A e
15Ω
10V
15Ω
10V
15Ω
10V
D
Super high dense cell design for extremely low RDS(ON)
High power and current handing capability.
Lead free product is acquired.
.
TO-220 & TO-263 & TO-262 package & TO-220F full-pak for through hole.
G
CEB SERIES
TO-263(DD-PAK)
CEI SERIES
TO-262(I2-PAK)
S
CEF SERIES
TO-220F
CEP SERIES
TO-220
ABSOLUTE MAXIMUM RATINGS T = 25 C unless otherwise noted
c
Limit
Parameter
Symbol
Units
TO-220/263/262 TO-220F
650
Drain-Source Voltage
VDS
VGS
ID
V
V
Gate-Source Voltage
±30
1
4
1 e
4 e
Drain Current-Continuous
Drain Current-Pulsed a
A
f
IDM
A
Maximum Power Dissipation @ TC = 25 C
- Derate above 25 C
Single Pulsed Avalanche Energy d
Repetitive Avalanche Current
Operating and Store Temperature Range
36
0.29
28
W
W/ C
mJ
A
PD
0.22
EAS
IAS
60
0.8
TJ,Tstg
-55 to 150
C
Thermal Characteristics
Parameter
Symbol
RθJC
Limit
Units
C/W
C/W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
3.5
62.5
4.5
65
RθJA
Rev 1. 2005.December
http://www.cetsemi.com
1
CEP01N6/CEB01N6
CEI01N6/CEF01N6
Electrical Characteristics T = 25 C unless otherwise noted
c
Parameter
Off Characteristics
Symbol
Test Condition
Min
Typ
Max
Units
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics
BVDSS
IDSS
VGS = 0V, ID = 250µA
VDS = 600V, VGS = 0V
VGS = 30V, VDS = 0V
VGS = -30V, VDS = 0V
650
V
1
µA
µA
µA
IGSSF
IGSSR
10
-10
6
Gate Threshold Voltage
Static Drain-Source
VGS(th)
RDS(on)
VGS = VDS, ID = 250µA
VGS = 10V, ID = 0.4A
2
4
V
12
15
Ω
On-Resistance
Dynamic Characteristics c
Forwand Transconductance
Input Capacitance
b
gFS
VDS = 20V, ID = 0.4A
0.5
136
46
S
Ciss
Coss
Crss
pF
pF
pF
VDS = 25V, VGS = 0V
f = 1.0MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics c
Turn-On Delay Time
19
td(on)
tr
td(off)
tf
19
13
24
35
6
38
26
48
70
8
ns
ns
VDD = 300V, ID = 0.4A,
VGS = 10V, RGEN = 4.7Ω
Turn-On Rise Time
Turn-Off Delay Time
ns
Turn-On Fall Time
ns
Total Gate Charge
Qg
nC
nC
nC
VDS = 480V, ID = 0.8A,
VGS = 10V
Gate-Source Charge
Qgs
Qgd
1.0
4.4
Gate-Drain Charge
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage b
IS
0.8
1.6
A
V
VSD
VGS = 0V, IS = 0.8A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature .
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% .
c.Guaranteed by design, not subject to production testing.
d.L = 190mH, I = 0.8A, V = 50V, R = 25Ω, Starting T = 25 C .
AS
DD
G
J
e.Limited only by maximum temperature allowed .
f .Pulse width limited by safe operating area .
2
CEP01N6/CEB01N6
CEI01N6/CEF01N6
2.5
1.5
1.2
0.9
0.6
0.3
0.0
25 C
VGS=10,9,8V
2.0
1.5
1.0
0.5
V
GS=6V
V
GS=5V
-55 C
TJ=125 C
0.0
0
5
10
15
20
25
1
2
3
4
5
6
7
VDS, Drain-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0.0
240
200
160
120
80
ID=0.4A
VGS=10V
C
iss
C
oss
40
C
rss
0
0
5
10
15
20
25
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
VDS=VGS
ID=250µA
V
GS=0V
100
10-1
10-2
-50 -25
0
25 50 75 100 125 150
0.2
0.6
1.0
1.4
1.8
2.2
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
CEP01N6/CEB01N6
CEI01N6/CEF01N6
101
10
8
VDS=480V
ID=0.8A
4
RDS(ON)Limit
100ms
1ms
100
10ms
DC
6
4
10-1
2
TC=25 C
TJ=150 C
Single Pulse
10-2
0
100
101
102
103
0
1
2
3
4
5
6
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
on
t
toff
d(off)
t
r
t
d(on)
OUT
RL
t
f
t
VIN
90%
10%
90%
D
OUT
V
V
VGS
10%
INVERTED
RGEN
G
90%
50%
50%
S
IN
V
10%
PULSE WIDTH
Figure 10. Switching Waveforms
Figure 9. Switching Test Circuit
100
D=0.5
0.2
0.1
10-1
PDM
0.05
t1
t2
0.02
0.01
1. RθJC (t)=r (t) * RθJC
2. RθJC=See Datasheet
3. TJM-TC = P* RθJC (t)
4. Duty Cycle, D=t1/t2
Single Pulse
10-2
10-5
10-4
10-3
10-2
10-1
100
101
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4 - 5
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