CEP01N6G [CET]
N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
| 型号： | CEP01N6G |
| 厂家： | 
CHINO-EXCEL TECHNOLOGY |
| 描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 文件： | 总4页 (文件大小：370K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CEP01N6G/CEB01N6G
CEF01N6G
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
Type
VDSS
600V
600V
600V
RDS(ON)
9.3Ω
ID
@VGS
10V
CEP01N6G
CEB01N6G
CEF01N6G
1A
1A
1A d
9.3Ω
10V
9.3Ω
10V
D
Super high dense cell design for extremely low RDS(ON)
High power and current handing capability.
Lead free product is acquired.
.
G
CEB SERIES
CEP SERIES
TO-263(DD-PAK)
TO-220
CEF SERIES
TO-220F
S
ABSOLUTE MAXIMUM RATINGS T = 25 C unless otherwise noted
c
Limit
Parameter
Symbol
Units
TO-220/263
TO-220F
Drain-Source Voltage
VDS
VGS
ID
600
V
V
Gate-Source Voltage
±30
1
4
1 d
4 d
Drain Current-Continuous
Drain Current-Pulsed a
A
e
IDM
A
Maximum Power Dissipation @ TC = 25 C
- Derate above 25 C
41
0.33
27
W
PD
0.22
W/ C
C
Operating and Store Temperature Range
TJ,Tstg
-55 to 150
Thermal Characteristics
Parameter
Symbol
RθJC
Limit
Units
C/W
C/W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
3
4.5
65
RθJA
62.5
Rev 1. 2009.July
Details are subject to change without notice .
http://www.cetsemi.com
1
CEP01N6G/CEB01N6G
CEF01N6G
Electrical Characteristics T = 25 C unless otherwise noted
c
4
Parameter
Off Characteristics
Symbol
Test Condition
Min
Typ
Max
Units
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics b
BVDSS
IDSS
VGS = 0V, ID = 250µA
VDS = 600V, VGS = 0V
VGS = 30V, VDS = 0V
VGS = -30V, VDS = 0V
600
V
20
µA
nA
nA
IGSSF
IGSSR
100
-100
Gate Threshold Voltage
Static Drain-Source
VGS(th)
RDS(on)
VGS = VDS, ID = 250µA
VGS = 10V, ID = 0.6A
2
4
V
7.3
9.3
Ω
On-Resistance
Dynamic Characteristics c
Forward Transconductance
Input Capacitance
gFS
Ciss
Coss
Crss
VDS = 15V, ID = 0.5A
10
S
210
55
pF
pF
pF
VDS = 25V, VGS = 0V,
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics c
Turn-On Delay Time
25
td(on)
tr
td(off)
tf
20
11
ns
ns
26
VDD = 300V, ID = 1A,
VGS = 10V, RGEN =10Ω
14.3
Turn-On Rise Time
Turn-Off Delay Time
26
ns
33.8
24
Turn-Off Fall Time
18.5
7.2
1.7
4
ns
9.4
Total Gate Charge
Qg
nC
nC
nC
VDS = 300V, ID = 1A,
VGS = 10V
Gate-Source Charge
Qgs
Qgd
Gate-Drain Charge
Drain-Source Diode Characteristics and Maximun Ratings
f
IS
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage b
1
A
V
VGS = 0V, IS = 0.5A g
1.5
VSD
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature .
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% .
c.Guaranteed by design, not subject to production testing.
d.Limited only by maximum temperature allowed .
e.Pulse width limited by safe operating area .
f.Full package I
= 0.9A .
S(max)
g.Full package V test condition I = 0.9A .
SD
S
2
CEP01N6G/CEB01N6G
CEF01N6G
1.2
1.0
0.8
0.6
0.4
0.2
0
2.4
2.0
1.6
1.2
VGS=10,8,7V
0.8
25 C
V
GS=4V
0.4
0
TJ=125 C
3
-55 C
0.0
4
8
12
16
20
24
1
2
4
5
6
7
VDS, Drain-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0.0
300
250
200
150
100
50
ID=0.6A
VGS=10V
C
iss
C
oss
C
rss
0
0
5
10
15
20
25
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
VDS=VGS
ID=250µA
V
GS=0V
100
10-1
10-2
-50 -25
0
25 50 75 100 125 150
0.2
0.6
1.0
1.4
1.8
2.2
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
CEP01N6G/CEB01N6G
CEF01N6G
101
10
8
VDS=300V
ID=1A
4
100µs
RDS(ON)Limit
1ms
100
10ms
6
DC
4
10-1
2
TC=25 C
TJ=150 C
Single Pulse
10-2
0
100
101
102
103
0
1.5
3
4.5
6
7.5
9
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
on
t
toff
d(off)
t
r
t
d(on)
OUT
RL
t
f
t
VIN
90%
10%
90%
D
OUT
V
V
VGS
10%
INVERTED
RGEN
G
90%
50%
50%
S
IN
V
10%
PULSE WIDTH
Figure 10. Switching Waveforms
Figure 9. Switching Test Circuit
100
D=0.5
0.2
0.1
PDM
10-1
0.05
0.02
0.01
t1
t2
1. Rθ JC (t)=r (t) * Rθ JC
2. Rθ JC=See Datasheet
3. TJM-TC = P* Rθ JC (t)
4. Duty Cycle, D=t1/t2
Single Pulse
10-2
10-2
10-1
100
101
102
103
104
Square Wave Pulse Duration (msec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
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