AOL1413 [AOS]

P-Channel Enhancement Mode Field Effect Transistor; P沟道增强型场效应晶体管
AOL1413
型号: AOL1413
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

P-Channel Enhancement Mode Field Effect Transistor
P沟道增强型场效应晶体管

晶体 晶体管 功率场效应晶体管 开关 脉冲 光电二极管
文件: 总6页 (文件大小:226K)
中文:  中文翻译
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AOL1413  
P-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOL1413 uses advanced trench technology to  
provide excellent RDS(ON) and ultra-low low gate charge  
with a 25V gate rating. This device is suitable for use as  
a load switch or in PWM applications. The device is  
ESD protected.  
VDS (V) = -30V  
ID = -20A (VGS = -10V)  
RDS(ON) < 17m(VGS = -10V)  
RDS(ON) < 36m(VGS = -5V)  
-RoHS Compliant  
-Halogen and Antimony Free Green Device*  
ESD Protected!  
D
S
Ultra SO-8TM Top View  
D
G
Bottom tab  
connected to  
drain  
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
VDS  
-30  
V
Gate-Source Voltage  
Continuous Drain  
Current B  
VGS  
±25  
-38  
V
TC=25°C  
TC=100°C  
ID  
-27  
Pulsed Drain Current C  
Continuous Drain  
Current A  
IDM  
-70  
A
TA=25°C  
TA=70°C  
TC=25°C  
TC=100°C  
TA=25°C  
TA=70°C  
-9  
IDSM  
PD  
-7  
38  
W
Power Dissipation B  
19  
2.1  
PDSM  
W
Power Dissipation A  
1.3  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
18  
Max  
25  
60  
4
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t ≤ 10s  
RθJA  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
Steady-State  
Steady-State  
49  
RθJC  
2.9  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1413  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=-250uA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
-30  
V
V
DS=-30V, VGS=0V  
-1  
IDSS  
Zero Gate Voltage Drain Current  
µA  
-5  
TJ=55°C  
V
DS=0V, VGS= ±25V  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
±10  
-3.5  
uA  
V
VDS=VGS ID=-250µA  
VGS(th)  
ID(ON)  
-1.5  
-70  
-2.5  
VGS=-10V, VDS=-5V  
A
V
GS=-10V, ID=-20A  
13.5  
18.5  
28  
17  
24  
36  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
V
GS=-5V, ID=-20A  
VDS=-5V, ID=20A  
IS=1A,VGS=0V  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
27  
S
V
A
-0.72  
-1  
Maximum Body-Diode Continuous Current  
-40  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1760 2200  
pF  
pF  
pF  
V
GS=0V, VDS=-15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
360  
255  
VGS=0V, VDS=0V, f=1MHz  
6.4  
8
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
Qg(4.5V) Total Gate Charge  
30  
11  
7
38  
nC  
nC  
nC  
nC  
ns  
VGS=-10V, VDS=-15V, ID=-20A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
8
11.5  
8
V
GS=-10V, VDS=-15V, RL=0.75,  
ns  
RGEN=3Ω  
tD(off)  
tf  
35  
18.5  
24  
16  
ns  
ns  
trr  
IF=-20A, dI/dt=100A/µs  
IF=-20A, dI/dt=100A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
30  
ns  
Qrr  
nC  
A. The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The  
Power dissipation PDSM is based on t<10s R θJA and the maximum allowed junction temperature of 150°C. The value in any given application  
depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 us pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C.  
* This device is guaranteed green after date code 8P11 (June 1 ST 2008)  
Rev2: Dec 2008  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1413  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
70  
60  
50  
40  
30  
20  
10  
0
25  
20  
15  
10  
5
VDS=-5V  
125°C  
-10V  
-5V  
-4.5V  
25°C  
VGS=-4V  
4
0
0
1
2
3
5
2
2.5  
3
3.5  
4
4.5  
5
VDS (Volts)  
VGS(Volts)  
Figure 1: On-Region Characteristics  
Figure 2: Transfer Characteristics  
40.0  
30.0  
20.0  
10.0  
0.0  
1.8  
1.6  
1.4  
1.2  
1
ID=-20A  
VGS=-10V  
VGS=-5V  
VGS=-5V  
VGS=-10V  
0.8  
0
5
10  
15  
20  
25  
0
50  
100  
150  
200  
ID (A)  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
Figure 4: On-Resistance vs. Junction  
Temperature  
50  
40  
30  
20  
10  
0
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
ID=20A  
125°C  
125°C  
25°C  
1.0E-03  
25°C  
1.0E-04  
1.0E-05  
0.0  
0.2  
0.4  
VSD (Volts)  
Figure 6: Body-Diode Characteristics  
0.6  
0.8  
1.0  
0
5
10  
15  
20  
V
GS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1413  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
2500  
10  
8
VDS=-15V  
ID=-20A  
Ciss  
2000  
1500  
1000  
500  
0
6
4
Coss  
2
Crss  
0
0
5
10  
15  
Qg (nC)  
Figure 7: Gate-Charge Characteristics  
20  
25  
30  
35  
0
5
10  
15  
20  
25  
30  
V
DS (Volts)  
Figure 8: Capacitance Characteristics  
1000  
100  
10  
100  
TJ(Max)=175°C  
TC=25°C  
80  
60  
40  
20  
10µs  
RDS(ON)  
limited  
100µs  
1ms  
DC  
1
10ms  
TJ(Max)=175°C  
0.1  
TC=25°C  
0.01  
0.01  
0.1  
1
10  
100  
0.0001 0.001  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
V
DS (Volts)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
D=Ton/T  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
TJ,PK=TA+PDM.ZθJC.RθJC  
RθJC=2.9°C/W  
PD  
0.1  
Ton  
T
Single Pulse  
0.0001  
0.01  
0.00001  
0.001  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1413  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
50  
40  
30  
20  
10  
0
50  
40  
30  
20  
10  
0
0
25  
50  
75  
CASE (°C)  
Figure 13: Power De-rating (Note B)  
100  
125  
150  
175  
0
25  
50  
75  
CASE (°C)  
Figure 14: Current De-rating (Note B)  
100  
125  
150  
175  
T
T
100  
80  
60  
40  
20  
0
0.0001  
0.001  
0.01  
0.1  
Pulse Width (s)  
1
10  
100  
1000  
Figure 15: Single Pulse Power Rating Junction-to-Ambient (Note H)  
10  
1
D=Ton/T  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
T
J,PK=TA+PDM.ZθJA.RθJA  
RθJA=49°C/W  
0.1  
PD  
0.01  
Ton  
T
Single Pulse  
0.01  
0.001  
0.00001  
0.0001  
0.001  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1413  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
-
-10V  
-
VDC  
Qgs  
Qgd  
+
Vds  
VDC  
+
DUT  
Vgs  
Ig  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
toff  
ton  
t
td(off)  
td(on)  
t
r
f
Vgs  
-
90%  
10%  
DUT  
Vdd  
Vgs  
VDC  
+
Rg  
Vgs  
Vds  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
EAR= 1/2 LIA2R  
L
Vds  
Id  
Vgs  
Vds  
-
BVDSS  
Vgs  
Vdd  
VDC  
+
Id  
Rg  
I AR  
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
-Isd  
-IF  
Isd  
Vgs  
dI/dt  
-IRM  
+
Vdd  
VDC  
Vdd  
-
-Vds  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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