IRFR420TRLPBF [VISHAY]
Power Field-Effect Transistor, 2.4A I(D), 500V, 3ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA,;
| 型号： | IRFR420TRLPBF |
| 厂家： | 
VISHAY |
| 描述： | Power Field-Effect Transistor, 2.4A I(D), 500V, 3ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, 开关 脉冲 晶体管 |
| 文件： | 总11页 (文件大小：1238K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRFR420, IRFU420, SiHFR420, SiHFU420
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
• Dynamic dV/dt rating
VDS (V)
DS(on) ()
Qg max. (nC)
500
• Repetitive avalanche rated
R
VGS = 10 V
3.0
• Surface mount (IRFR420, SiHFR420)
19
3.3
13
• Straight lead (IRFU420, SiHFU420)
Q
gs (nC)
gd (nC)
Available
Q
• Available in tape and reel
• Fast switching
Configuration
Single
D
• Ease of paralleling
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DPAK
(TO-252)
IPAK
(TO-251)
D
D
DESCRIPTION
G
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU, SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
are possible in typical surface mount applications.
S
G
S
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
DPAK (TO-252) DPAK (TO-252)
DPAK (TO-252)
DPAK (TO-252)
IPAK (TO-251)
Lead (Pb)-free and Halogen-free SiHFR420-GE3 SiHFR420TR-GE3 a SiHFR420TRL-GE3 a SiHFR420TRR-GE3 a SiHFU420-GE3
Lead (Pb)-free
Note
a. See device orientation.
IRFR420PbF
IRFR420TRPbF a
IRFR420TRLPbF a
IRFR420TRRPbF a
IRFU420PbF
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
500
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
V
VGS
20
T
C = 25 °C
2.4
Continuous Drain Current
VGS at 10 V
ID
TC = 100 °C
1.5
A
Pulsed Drain Current a
IDM
8.0
Linear Derating Factor
0.33
0.020
400
W/°C
Linear Derating Factor (PCB mount) e
Single Pulse Avalanche Energy b
Repetitive Avalanche Current a
EAS
IAR
mJ
A
2.4
Repetitive Avalanche Energy a
EAR
4.2
mJ
Maximum Power Dissipation
T
C = 25 °C
42
PD
W
V/ns
°C
Maximum Power Dissipation (PCB mount) e
Peak Diode Recovery dV/dt c
TA = 25 °C
2.5
dV/dt
3.5
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak temperature) d
TJ, Tstg
-55 to +150
260
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 124 mH, Rg = 25 , IAS = 2.4 A (see fig. 12).
c. ISD 2.4 A, dI/dt 50 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
S16-1522-Rev. E, 08-Aug-16
Document Number: 91275
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR420, IRFU420, SiHFR420, SiHFU420
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
RthJA
TYP
MAX.
110
50
UNIT
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient (PCB mount) a
-
-
-
RthJA
°C/W
Maximum Junction-to-Case (Drain)
RthJC
3.0
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
VDS
VDS/TJ
VGS(th)
IGSS
VGS = 0 V, ID = 250 μA
Reference to 25 °C, ID = 1 mA
VDS = VGS, ID = 250 μA
500
-
-
-
V
V/°C
V
VDS Temperature Coefficient
-
2.0
-
0.59
Gate-Source Threshold Voltage
Gate-Source Leakage
-
-
-
-
-
-
4.0
100
25
250
3.0
-
VGS
=
20 V
nA
VDS = 500 V, VGS = 0 V
-
Zero Gate Voltage Drain Current
IDSS
μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
RDS(on)
gfs
VGS = 10 V
ID =1.4 A b
-
VDS = 50 V, ID = 1.4 A
1.5
S
Input Capacitance
Ciss
Coss
Crss
-
-
-
360
92
-
-
-
VGS = 0 V,
Output Capacitance
V
DS = 25 V,
pF
f = 1.0 MHz, see fig. 5
Reverse Transfer Capacitance
37
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
Qgs
Qgd
-
-
-
-
-
-
19
3.3
13
ID = 2.1 A, VDS = 400 V,
see fig. 6 and 13 b
VGS = 10 V
nC
Turn-On Delay Time
Rise Time
td(on)
tr
td(off)
tf
-
-
-
-
8.0
8.6
33
-
-
-
-
VDD = 250 V, ID = 2.1 A,
ns
Rg = 18 , RD = 120 , see fig. 10 b
Turn-Off Delay Time
Fall Time
16
D
Between lead,
Internal Drain Inductance
LD
LS
-
-
4.5
7.5
-
-
6 mm (0.25") from
package and center of
die contact
nH
G
Internal Source Inductance
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
IS
-
-
-
-
2.4
8.0
A
G
Pulsed Diode Forward Current a
ISM
S
Body Diode Voltage
VSD
trr
TJ = 25 °C, IS = 2.4 A, VGS = 0 V b
-
-
-
-
1.6
520
1.4
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
260
0.70
ns
μC
TJ = 25 °C, IF = 2.1 A, dI/dt = 100 A/μs b
Qrr
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
S16-1522-Rev. E, 08-Aug-16
Document Number: 91275
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR420, IRFU420, SiHFR420, SiHFU420
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
S16-1522-Rev. E, 08-Aug-16
Document Number: 91275
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR420, IRFU420, SiHFR420, SiHFU420
www.vishay.com
Vishay Siliconix
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S16-1522-Rev. E, 08-Aug-16
Document Number: 91275
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR420, IRFU420, SiHFR420, SiHFU420
www.vishay.com
Vishay Siliconix
RD
VDS
VGS
D.U.T.
Rg
+
V
-
DD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on) tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
VDS
VDS
Vary tp to obtain
required IAS
tp
VDD
D.U.T.
Rg
+
-
VDD
VDS
IAS
10 V
0.01 Ω
tp
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
S16-1522-Rev. E, 08-Aug-16
Document Number: 91275
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR420, IRFU420, SiHFR420, SiHFU420
www.vishay.com
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
-
VDS
D.U.T.
VG
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
S16-1522-Rev. E, 08-Aug-16
Document Number: 91275
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR420, IRFU420, SiHFR420, SiHFU420
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
-
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
D.U.T.
+
-
-
+
Rg
• dV/dt controlled by Rg
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS = 10 Va
D.U.T. lSD waveform
D.U.T. VDS waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
VDD
Re-applied
voltage
Body diode forward drop
Inductor current
ISD
Ripple ≤ 5 %
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91275.
S16-1522-Rev. E, 08-Aug-16
Document Number: 91275
7
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
TO-252AA Case Outline
E
A
MILLIMETERS
INCHES
MAX.
C2
b3
DIM.
A
MIN.
MAX.
2.38
0.127
0.88
1.14
5.46
0.61
0.89
6.22
-
MIN.
0.086
-
2.18
-
0.094
0.005
0.035
0.045
0.215
0.024
0.035
0.245
-
A1
b
0.64
0.76
4.95
0.46
0.46
5.97
4.10
6.35
4.32
9.40
0.025
0.030
0.195
0.018
0.018
0.235
0.161
0.250
0.170
0.370
b2
b3
C
C2
D
D1
E
6.73
-
0.265
-
E1
H
b
C
b2
e
10.41
0.410
A1
e1
e
2.28 BSC
4.56 BSC
1.40
0.090 BSC
0.180 BSC
e1
L
1.78
1.27
1.02
1.52
0.055
0.070
0.050
0.040
0.060
L3
L4
L5
0.89
-
0.035
-
1.01
0.040
ECN: T16-0236-Rev. P, 16-May-16
DWG: 5347
E1
Notes
Dimension L3 is for reference only.
•
Revision: 16-May-16
Document Number: 71197
1
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TO-251AA (HIGH VOLTAGE)
4
3
A
E1
E
Thermal PAD
A
4
0.010
M
A B
C
0.25
c2
b4
L2
4
A
θ1
θ2
D1
4
B
C
3
Seating
plane
5
C
B
C
L3
L1
(Datum A)
L
B
A
A1
3 x b2
3 x b
c
View A - A
M
0.010
C A B
0.25
2 x e
Base
metal
5
Plating
(c)
b1, b3
Lead tip
5
c1
(b, b2)
Section B - B and C - C
MILLIMETERS
INCHES
MILLIMETERS
INCHES
MAX.
DIM.
A
MIN.
2.18
0.89
0.64
0.65
0.76
0.76
4.95
0.46
0.41
0.46
5.97
MAX.
2.39
1.14
0.89
0.79
1.14
1.04
5.46
0.61
0.56
0.86
6.22
MIN.
0.086
0.035
0.025
0.026
0.030
0.030
0.195
0.018
0.016
0.018
0.235
MAX.
0.094
0.045
0.035
0.031
0.045
0.041
0.215
0.024
0.022
0.034
0.245
DIM.
D1
E
MIN.
5.21
6.35
4.32
MAX.
MIN.
0.205
0.250
0.170
-
6.73
-
-
0.265
-
A1
b
E1
e
b1
b2
b3
b4
c
2.29 BSC
2.29 BSC
L
8.89
1.91
0.89
1.14
0'
9.65
2.29
1.27
1.52
15'
0.350
0.075
0.035
0.045
0'
0.380
0.090
0.050
0.060
15'
L1
L2
L3
θ1
θ2
c1
c2
D
25'
35'
25'
35'
ECN: S-82111-Rev. A, 15-Sep-08
DWG: 5968
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension are shown in inches and millimeters.
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at the
outermost extremes of the plastic body.
4. Thermal pad contour optional with dimensions b4, L2, E1 and D1.
5. Lead dimension uncontrolled in L3.
6. Dimension b1, b3 and c1 apply to base metal only.
7. Outline conforms to JEDEC outline TO-251AA.
Document Number: 91362
Revision: 15-Sep-08
www.vishay.com
1
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR DPAK (TO-252)
0.224
(5.690)
0.180
0.055
(1.397)
(4.572)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 72594
Revision: 21-Jan-08
www.vishay.com
3
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Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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Revision: 08-Feb-17
Document Number: 91000
1
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