L8200G-P16-R [UTC]

SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION;
L8200G-P16-R
型号: L8200G-P16-R
厂家: Unisonic Technologies    Unisonic Technologies
描述:

SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION

文件: 总6页 (文件大小:149K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
UNISONIC TECHNOLOGIES CO., LTD  
L8200  
LINEAR INTEGRATED CIRCUIT  
SINGLE LNB-BIAS, CONTROL  
AND POWER MANAGEMENT  
SOLUTION  
DESCRIPTION  
The UTC L8200 is a single chip power management and  
control solution for LNB’s. The highly integrated solution provides  
all the required FET and mixer bias, control detection and  
decoding, local oscillator switching and a stable power supply for  
the IF amplifier, and additional support functions. Packaged in a  
small 16 pin QFN package or 16 pin TSSOP package the UTC  
L8200 only requires 3 external components providing a very small  
compact solution. Being at the heart of the LNB monitoring the  
control, power management and environmental conditions the  
UTC L8200 is able to provide reliable solution eliminating effects  
such as false switching and over loading.  
FEATURES  
* Single chip LNB bias, control and power management  
* Integrated regulated supply for LNB  
* Zero Gate FET switching  
* Voltage detection for polarization switching  
* 22kHz tone detector with signal rejection for band switching  
* Programmable mixer and FET bias  
ORDERING INFORMATION  
Ordering Number  
Package  
Packing  
Lead Free  
L8200L-P16-R  
Halogen Free  
L8200G-P16-R  
TSSOP-16  
Tape Reel  
Tape Reel  
L8200L-Q16-3030-R  
L8200G-Q16-3030-R  
QFN-16(3×3)  
L8200G-P16-R  
(1) R: Tape Reel  
(1)Packing Type  
(2)Package Type  
(3)Green Package  
(2) P16: TSSOP-16, Q16-3030: QFN-16(3×3)  
(3) G: Halogen Free and Lead Free, L: Lead Free  
MARKING  
TSSOP-16  
QFN-16(3×3)  
www.unisonic.com.tw  
Copyright © 2018 Unisonic Technologies Co., Ltd  
1 of 6  
QW-R123-017.G  
L8200  
LINEAR INTEGRATED CIRCUIT  
PIN CONFIGURATION  
Top View  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
G1  
D1  
D2  
RCALA  
RCALM  
16 15 14 13  
12  
11  
10  
1
2
3
4
G1  
D1  
VOUT  
HB  
GND  
VIN  
G2  
D3  
GND  
LB  
D2  
G2  
12 VOUT  
9
CSUB  
11  
G3  
HB  
5
6
8
7
10  
9
LB  
DM  
GM  
CSUB  
QFN-16(3×3)  
PIN DESCRIPTION  
Pin No.  
PIN NAME  
DESCRIPTION  
TSSOP-16  
QFN-16(3×3)  
1
2
1
2
G1  
D1  
To G of fet 1  
To D of fet 1  
3
3
D2  
To D of fet 2  
4
4
G2  
To G of fet 2  
5
5
D3  
To D of fet 3  
6
6
G3  
To G of fet 3  
7
7
DM  
To Drain of mix fet  
To Gate of mix fet  
8
8
GM  
9
9
CSUB  
LB  
connect an external cap to produce -2.5V  
To LB OSC.  
10  
11  
12  
13  
14  
15  
16  
10  
11  
12  
13  
14  
15  
16  
HB  
To HB OSC.  
VOUT  
VIN  
5V voltage output terminal  
Power supplyinclude both voltage and tone signalꢁ  
GND  
GND  
RCALM  
RCALA  
Connect 22kohm to set Idm to 10mA  
Connect 22kohm to set Id1, Id2, Id3 to 10mA  
UNISONIC TECHNOLOGIES CO., LTD  
www.unisonic.com.tw  
2 of 6  
QW-R123-017.G  
L8200  
LINEAR INTEGRATED CIRCUIT  
ABSOLUTE MAXIMUM RATING  
PARAMETER  
SYMBOL  
RATINGS  
UNIT  
V
Supply Voltage  
Supply Current  
VIN  
IIN  
-0.6 ~ 25 continuous  
120  
1.3  
mA  
W
TSSOP-16  
Power Dissipation  
PD  
QFN-16(3×3)  
2
W
Operating Temperature Range  
Storage Temperature Range  
TOPR  
TSTG  
-40 ~ +85  
-40 ~ +150  
°C  
°C  
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.  
Absolute maximum ratings are stress ratings only and functional device operation is not implied.  
ELECTRICAL CHARACTERISTICS  
Measured at TA=25°C, VIN=13V, RCALA=RCALM=22k(setting lds to 10 mA) unless otherwise specified.  
PARAMETER  
Supply Voltage Operating Range  
Supply Current  
SYMBOL  
VIN  
TEST CONDITIONS  
MIN  
8
TYP  
MAX  
22  
UNIT  
V
No Load Supply Current (Note 1)  
Max Total Load Current  
Max Bias Load Current (Note 2)  
Max Osc Load Current (Note 2)  
Max Iout Load Current (Note 2)  
VOUT  
ID1=ID2=IDM=0mA  
2
3
80  
mA  
mA  
mA  
mA  
mA  
V
QFN-16(3×3)  
ID1 or ID2+ ID3+IDM  
LB or HB  
ICC  
40  
50  
50  
VOUT  
VSUB  
VIN=10.5V~21V, IOUT=30mA  
(Internally generated)  
ISUB=0mA  
4.75  
-3.0  
5
5.25  
-2.5  
-2.0  
V
Substrate Voltage  
ISUB=-20uA  
-2.0  
15.4  
1
V
V
VPOL Threshold  
Pol Switching Speed  
Output Noise  
VPOL  
TPOL  
Applied via VIN pin  
VIN_Low=13V, VIN_High=18V  
14.1  
14.7  
ms  
C
C
GATE-GND =4.7nF  
DRAIN-GND =10nF  
Drain Voltage  
Gate Voltage  
0.02 Vpk-pk  
0.005 Vpk-pk  
ICGATE-GND =4.7nF  
DRAIN-GND =10nF  
C
Tone Detector  
Tdetect Threshold  
VTONE  
Test Circuit 1  
100  
1.0  
170  
7.5  
300  
mV  
Test Circuit 1,  
V(AC)IN=1Vp/p sq.w.  
Rejection Freq (Note 3)  
LO Output Stage  
LB VOUT Low  
kHz  
II=0, Test Circuit 1  
Tone enabled  
-0.05  
4.5  
0
0.05  
5.25  
0.05  
5.25  
V
V
V
V
VLB  
II=50mA, Test Circuit 1  
Tone enabled  
LB VOUT High  
HB VOUT Low  
HB VOUT High  
5.0  
0
II=0, Test Circuit 1  
Tone enabled  
-0.05  
4.5  
VHB  
II=50mA, Test Circuit 1  
Tone enabled  
5.0  
UNISONIC TECHNOLOGIES CO., LTD  
www.unisonic.com.tw  
3 of 6  
QW-R123-017.G  
L8200  
LINEAR INTEGRATED CIRCUIT  
ELECTRICAL CHARACTERISTICS (Cont.)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Gate Characteristics  
G1 Output  
Voltage Off  
VGIO  
VGIL  
VGIH  
ID1=0, VIN=14V, IG1=0  
-0.05  
-3.0  
0
0.05  
-2.0  
1.0  
V
V
V
VIN=15.5V, ID112mA,  
Voltage Low  
-2.5  
0.5  
I
G1=-10uA  
Voltage High  
G2 Output  
Voltage Off  
VIN=15.5V, ID18mA, IG1=0  
0.35  
VG2O  
VG2L  
VG2H  
VIN =15.5V, ID2=0, IG2=0  
-0.05  
-3.0  
0
0.05  
-2.0  
1.0  
V
V
V
VIN=14V, ID212mA,  
Voltage Low  
-2.5  
0.5  
I
G2=-10uA  
Voltage High  
VIN=14V, ID28mA, IG2=0  
0.35  
G3/Gm Output  
Voltage Low  
VG3L/VGmL ID3/m12mA, IG3/m=-10uA  
VG3H/VGmH ID3/m8mA,IG3/m=0  
-3.0  
-2.5  
0.5  
-2.0  
1.0  
V
V
Voltage High  
0.35  
Drain Characteristics  
D1 Output  
Voltage High  
VD1  
VIN=15.5V, ID1=10mA  
VIN=14V, VD1=0.5  
1.8  
1.8  
2.0  
2.0  
2.2  
10  
V
Leakage Current  
D2 Output  
ILEAK1  
uA  
Voltage High  
VD2  
VIN=14V, ID2=10mA  
VIN=15.5V, VD2=0.5  
2.2  
10  
V
Leakage Current  
D3 Output  
ILEAK2  
uA  
Voltage High  
VD3  
VIN=15.5V, ID3=10mA  
IDM=10mA  
1.8  
0.5  
2.0  
0.6  
2.2  
0.7  
V
V
Dm Output  
Voltage High  
VDM  
D1, 2, 3 and M  
Delta VD vs. VIN  
Delta VD vs. TJ  
FET Current Range  
Mixer Current Range  
VDV  
VDT  
VIN=9~21V  
TJ= -40 ~ +85°C  
ID1, ID2 & ID3  
IDM  
0.5  
50  
%/V  
ppm  
mA  
0
0
15  
10  
mA  
ID1, ID2, ID3 & IDM  
,
Drain Current  
ID  
8
10  
12  
mA  
RCALA & RCALM=22kΩ  
Delta ID vs. VCC  
Delta ID vs. TJ  
IDV  
IDT  
VCC=9~21V  
0.5  
%/V  
TJ=-40~+85°C  
0.05  
%/°C  
Notes: 1. These parameters are related to RCAL values.  
2. The total combined load currents should not exceed the stated maximum load current.  
3. The UTC L8200 series will also reject DiSEqC and other common switching tone bursts.  
UNISONIC TECHNOLOGIES CO., LTD  
www.unisonic.com.tw  
4 of 6  
QW-R123-017.G  
L8200  
LINEAR INTEGRATED CIRCUIT  
TYPICAL APPLICATION CIRCUIT  
L*  
22kΩ  
22kΩ  
C1  
10nF  
C*  
LNB power and tone signal  
JF1  
L*  
Power supply for IF Amps  
VOUT  
HB  
G1  
D1  
D2  
G2  
RH1  
CL1  
C2  
10nF  
C*  
UTC L8200  
RL1  
LB  
CSUB  
CH1  
RH2  
RL2  
47nF  
QH  
QL  
To other FET stages  
* Stripline Elements  
9.75GHz Local Osc.  
10.6GHz Local Osc.  
Capacitors C1 and C2 ensure that residual power supply and substrate generator noise is not allowed to affect  
other external circuits which may be sensitive to RF interference. They also serve to suppress any potential RF feed  
through between stages via the UTC L8200. These capacitors are required for all stages used. Values of 10nF and  
4.7nF respectively are recommended however this is design dependent and any value between 1nF and 100nF  
could be used. The capacitor CSUB is an integral part of the UTC L8200 ’s negative supply generator. The negative  
bias voltage is generated on-chip using an internal oscillator. The required value of capacitor CSUB is 47nF. This  
generator produces a low current supply of approximately -3V. Although this generator is intended purely to bias the  
external FETs, it can be used to power other external low current circuits via the CSUB pin. Resistor RCALA sets the  
drain current at which all external amplifier FETs are operated and RCALM sets the mixer bias current. If any bias  
control circuit is not required, its related drain and gate connections may be left open circuit without affecting the  
operation of the remaining bias circuits. The UTC L8200 have been designed to protect the external FETs form  
adverse operating conditions. With a JFET connected to any bias circuit, the gate output voltage of the bias circuit  
can not exceed the range -3.0V~1V under any conditions, including power up and power down transients. Should  
the negative bias generator be shorted or overloaded so that the drain current of the external FETs can no longer be  
controlled, the drain supply to FETs is shut down to avoid damage to the FETs by excessive drain current. UTC  
L8200 incorporates over and under voltage protection so is the receiver or installation develops a fault the LNB will  
shut down and restart once operating conditions are back to normal.  
UNISONIC TECHNOLOGIES CO., LTD  
www.unisonic.com.tw  
5 of 6  
QW-R123-017.G  
L8200  
LINEAR INTEGRATED CIRCUIT  
SINGLE UNIVERSAL BLOCK DIAGRAM  
The following block diagram below shows the main elements of a single universal LNB. A single chip solution  
provides all the FET and mixer bias, control signal detect for polarization and band selection and all the necessary  
power management functions required within a single universal LNB.  
IF Gain Stage  
Gain Stages  
Active  
Mixer  
GaAs/HEMT FET  
Set-top Box  
Receiver  
Vertical  
UTC  
L8200  
LB Osc  
HB Osc  
VOUT  
Horizontal  
VIN  
Polarization and band switching on the UTC L8200 uses the standard 13~17V and 22kHz as defined by Astra.  
The exception is that the devices voltage detector has a much tighter tolerance than required to increase field  
reliability.  
The single VIN pin is used internally for three functions, LNB and IC power supply, voltage detection and tone  
detection. The IC’s is self powering via an internal regulator which utilizes the 13~17V control voltage from the  
satellite receiver. The regulated voltage is used to supply the IC and is also outputted to the VOUT pin to provide the  
power supply for the remaining element of the LNB such as the IF amplifiers. The 13~17V from the receiver is feed  
via a tight tolerance voltage detector with integrated filtering which removes unwanted signals or interference. The  
results from the detectors output enables one of 2 bias circuits to turn one of either Fet1 or FET2 on. The internal  
tone detector allows the device to detect the 22kHz tone which is superimposed on the LNB power line (13~17V  
signal), this is achieved with no external filtering components. The tone detector rejects all unwanted signals  
including transients from other parts of the LNB system. The tone detector controls a drive circuits which powers and  
one of two oscillators, normally used to switch between low and high band in universal applications. The functional  
table below shows the operation of the FET and Mixer bias, oscillator output and the LNB power supply.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
MIXER  
Active  
VIN (V)  
FIN (kHZ)  
FET1  
FET2  
Active  
FET3  
Active  
Active  
Active  
Active  
LB(V)  
5.0  
5.0  
0
HB(V)  
0
VOUT (V)  
5.0  
<14.1  
>15.4  
<14.1  
>15.4  
0
0
Disabled  
Active  
Disabled  
Active  
Active  
5.0  
22  
22  
Disabled  
Active  
Active  
5.0  
5.0  
5.0  
Disabled  
Active  
0
5.0  
UTC assumes no responsibility for equipment failures that result from using products at values that  
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other  
parameters) listed in products specifications of any and all UTC products described or contained herein.  
UTC products are not designed for use in life support appliances, devices or systems where malfunction  
of these products can be reasonably expected to result in personal injury. Reproduction in whole or in  
part is prohibited without the prior written consent of the copyright owner. UTC reserves the right to  
make changes to information published in this document, including without limitation specifications and  
product descriptions, at any time and without notice. This document supersedes and replaces all  
information supplied prior to the publication hereof.  
UNISONIC TECHNOLOGIES CO., LTD  
www.unisonic.com.tw  
6 of 6  
QW-R123-017.G  

相关型号:

L8200G-Q16-3030-R

SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8200L-N20-R

CONFIDENTIAL, SUPPLIDE UNDE NDA SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8200L-P16-R

SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8200L-Q16-3030-R

SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8200_15

SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8200_18

SINGLE LNB-BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8202

MULTIFUNCTION ANALOG ASIC
STMICROELECTR

L8219P

STEPPER MOTOR CONTROLLER, 2.5A, PDSO36, POWER, SO-36
STMICROELECTR

L8221

SINGLE LNB–BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8221G-SH2-R

SINGLE LNB–BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8221L-SH2-R

SINGLE LNB–BIAS, CONTROL AND POWER MANAGEMENT SOLUTION
UTC

L8229

Dual DMOS full bridge stepper/DC motor driver
STMICROELECTR