ATR0625-PYQW [U-BLOX]

Telecom IC, CMOS, PQCC56,;
ATR0625-PYQW
型号: ATR0625-PYQW
厂家: u-blox AG    u-blox AG
描述:

Telecom IC, CMOS, PQCC56,

文件: 总20页 (文件大小:305K)
中文:  中文翻译
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ꢀ  
u-blox AG  
Zürcherstrasseꢀ68ꢀ  
8800ꢀThalwilꢀ  
Switzerlandꢀ  
www.u-blox.comꢀ  
Phoneꢀ+41ꢀ1722ꢀ7444ꢀ  
Faxꢀ+41ꢀ1722ꢀ7447ꢀ  
info@u-blox.comꢀ  
ATR0622, ATR0625  
ANTARIS 4 GPS Baseband Processors  
Data Sheet  
PRELIMINARYꢀ  
ꢀꢀ  
Features  
16ꢀchannelꢀANTARISꢀ4ꢀpositioningꢀengineꢀ  
®
ATR0625:ꢀSuperSense ꢀIndoorꢀGPS:ꢀdownꢀtoꢀ–158ꢀdBmꢀ  
Ultra-lowꢀpowerꢀconsumption:ꢀ22ꢀmWꢀ  
AssistedꢀGPSꢀandꢀAutonomousꢀGPSꢀoperation,ꢀAssistNow™ꢀreadyꢀ  
Minimumꢀbillꢀofꢀmaterialꢀ  
4ꢀHzꢀpositionꢀupdateꢀrateꢀ  
1ꢀUSBꢀandꢀ2ꢀUARTꢀportsꢀ  
SupportsꢀDGPS,ꢀWAAS,ꢀEGNOSꢀandꢀMSASꢀ  
RoHSꢀCompliantꢀ(lead-free)ꢀ  
your position is our focus  
your position is our focus  
Title  
ATR0622,ꢀATR0625ꢀ  
Subtitle  
Doc Type  
Doc Id  
ANTARISꢀ4ꢀGPSꢀBasebandꢀProcessorsꢀ  
DataꢀSheetꢀ  
Preliminaryꢀ  
GPS.G4-X-06008-P2ꢀ  
Revision  
Index  
Date  
Name  
GzBꢀ  
Status / Comments  
P1ꢀ  
P2ꢀ  
02.ꢀJuneꢀ2006ꢀ  
24.ꢀJulyꢀ2006ꢀ  
Basis:ꢀATR0622:ꢀ04/06ꢀATR0625:ꢀ02/06ꢀ  
Basis:ꢀATR0622:ꢀ06/06ꢀATR0625:ꢀ06/06ꢀꢀModifiedꢀTableꢀ5.1ꢀ(P9,ꢀP13,ꢀP22,ꢀP31),ꢀSectionꢀ5.3,ꢀ  
Tableꢀ8.2ꢀ(No.ꢀ1.19,ꢀ1.30…1.36)ꢀ,ꢀSectionꢀ8.4ꢀ  
GzBꢀ  
Weꢀreserveꢀallꢀrightsꢀinꢀthisꢀdocumentꢀandꢀinꢀtheꢀinformationꢀcontainedꢀtherein.ꢀReproduction,ꢀuseꢀorꢀdisclosureꢀtoꢀthirdꢀpartiesꢀwithoutꢀexpressꢀauthorityꢀisꢀstrictlyꢀforbidden.ꢀ  
Forꢀmostꢀrecentꢀdocuments,ꢀpleaseꢀvisitꢀwww.u-blox.comꢀ  
Data Sheet  
Identification of applicable hardware  
Comments  
Revisions  
P1,ꢀP2ꢀ  
ATR0622N-PYQW,ꢀATR0625-PYQWꢀ  
Firmwareꢀ5.0ꢀinꢀROMꢀ  
Productsꢀ markedꢀ withꢀ thisꢀ lead-freeꢀ symbolꢀ onꢀ theꢀ productꢀ labelꢀ complyꢀ withꢀ theꢀ  
"Directive2002/95/ECoftheEuropeanParliamentandꢀtheꢀCouncilꢀonꢀtheꢀRestrictionꢀofꢀ  
UseꢀofꢀcertainꢀHazardousꢀSubstancesꢀinꢀElectricalꢀandꢀElectronicꢀEquipment"ꢀ(RoHS).ꢀ  
ThisꢀisꢀanꢀElectrostaticꢀSensitiveꢀDeviceꢀ(ESD).ꢀ  
Observeꢀprecautionsꢀforꢀhandling.ꢀ  
SemiconductorꢀtechnologyꢀprovidedꢀbyꢀATMEL.ꢀ  
Theꢀspecificationsꢀinꢀthisꢀdocumentꢀareꢀsubjectꢀtoꢀchangeꢀatꢀu-blox'sꢀdiscretion.ꢀu-bloxꢀassumesꢀnoꢀresponsibilityꢀforꢀanyꢀclaimsꢀorꢀdamagesꢀ  
arisingꢀoutꢀofꢀtheꢀuseꢀofꢀthisꢀdocument,ꢀorꢀfromꢀtheꢀuseꢀofꢀproductsꢀandꢀservicesꢀmentionedꢀinꢀthisꢀdocument,ꢀincludingꢀbutꢀnotꢀlimitedꢀtoꢀ  
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expressedꢀorꢀimpliedꢀwithꢀrespectꢀtoꢀtheꢀinformationꢀandꢀspecificationsꢀcontainedꢀinꢀthisꢀdocument.ꢀu-bloxꢀdoesꢀnotꢀsupportꢀanyꢀapplicationsꢀ  
inꢀ connectionꢀ withꢀ activeꢀ weaponꢀ systems,ꢀ ammunition,ꢀ lifeꢀ supportꢀ andꢀ commercialꢀ aircraft.ꢀ Performanceꢀ characteristicsꢀ listedꢀ inꢀ thisꢀ  
documentꢀareꢀestimatesꢀonlyꢀandꢀdoꢀnotꢀconstituteꢀaꢀwarrantyꢀorꢀguaranteeꢀofꢀproductꢀperformance.ꢀ  
Theꢀ copying,ꢀ distributionꢀ andꢀ utilizationꢀ ofꢀ thisꢀ documentꢀ asꢀ wellꢀ asꢀ theꢀ communicationꢀ ofꢀ itsꢀ contentsꢀ toꢀ othersꢀ withoutꢀ expressedꢀ  
authorizationꢀisꢀprohibited.ꢀꢀOffendersꢀwillꢀbeꢀheldꢀliableꢀforꢀtheꢀpaymentꢀofꢀdamages.ꢀꢀAllꢀrightsꢀreserved,ꢀinꢀparticularꢀtheꢀrightꢀtoꢀcarryꢀoutꢀ  
patent,ꢀutilityꢀmodelꢀandꢀornamentalꢀdesignꢀregistrations.ꢀ  
u-blox,ꢀtheꢀu-bloxꢀlogo,ꢀtheꢀTIMꢀtypeꢀGPSꢀmodule,ꢀAntaris,ꢀSuperSense,ꢀ"yourꢀpositionꢀisꢀourꢀfocus",ꢀNavLox,ꢀu-center,ꢀAssistNow,ꢀFixNowꢀ  
andꢀ EKFare(registered)ꢀ trademarksꢀ ofꢀ u-bloxAG.Theꢀ u-bloxꢀ softwareasꢀ wellꢀ asꢀ theꢀ designꢀ ofꢀ theꢀ LEAꢀ typeꢀ modulesꢀ isꢀ protectedꢀ byꢀ  
intellectualꢀpropertyꢀrightsꢀinꢀSwitzerlandꢀandꢀabroad.ꢀꢀFurtherꢀinformationꢀavailableꢀatꢀinfo@u-blox.com.ꢀꢀCopyrightꢀ©ꢀ2006,ꢀu-bloxꢀAGꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
Page 2ꢀ  
your position is our focus  
Contents  
1 Description....................................................................................................................4  
1.1  
1.2  
1.3  
1.4  
1.5  
1.6  
Overview .............................................................................................................................................. 4  
Features................................................................................................................................................ 4  
BlockꢀDiagram ...................................................................................................................................... 5  
OperatingꢀModes.................................................................................................................................. 6  
Protocols .............................................................................................................................................. 6  
AssistedꢀGPSꢀ(A-GPS)............................................................................................................................ 6  
2 Architectural Overview................................................................................................7  
2.1  
Description ........................................................................................................................................... 8  
3 Performance Specification...........................................................................................9  
4 Mechanical Specification ...........................................................................................10  
5 Pin Configuration.......................................................................................................10  
5.1  
5.2  
5.3  
5.4  
Pinout................................................................................................................................................. 10  
SignalꢀDescription............................................................................................................................... 12  
Boot-TimeꢀGPSMODEꢀConfiguration................................................................................................... 14  
ActiveꢀAntennaꢀSupervisor.................................................................................................................. 14  
6 Power Supply .............................................................................................................15  
7 Oscillators ...................................................................................................................15  
7.1  
7.2  
GPSꢀOscillator..................................................................................................................................... 15  
RTCꢀOscillator..................................................................................................................................... 15  
8 Electrical Specifications..............................................................................................16  
8.1  
8.2  
8.3  
8.4  
8.5  
8.6  
AbsoluteꢀMaximumꢀRatings ................................................................................................................ 16  
OperatingꢀConditions ......................................................................................................................... 16  
PowerꢀConsumption........................................................................................................................... 18  
LDO18................................................................................................................................................ 18  
LDOBATꢀandꢀBackupꢀDomain ............................................................................................................. 18  
ESDꢀCharacteristics ............................................................................................................................. 19  
9 Ordering Information.................................................................................................19  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2  
Preliminaryꢀ  
Contentsꢀ  
Page 3ꢀ  
your position is our focus  
1 Description  
1.1 Overview  
TheꢀATR0622ꢀandꢀATR0625ꢀareꢀlow-power,ꢀcompactꢀGPSꢀbasebandꢀprocessors,ꢀespeciallyꢀdesignedꢀtoꢀmeetꢀtheꢀ  
requirementsꢀofꢀautomotiveꢀandꢀmobileꢀterminalꢀapplications.ꢀTheyꢀareꢀbasedꢀonꢀtheꢀultraꢀlowꢀpowerꢀANTARlSꢀ4ꢀ  
technologyꢀandꢀareꢀpackedꢀinꢀaꢀsmallꢀandꢀcost-efficientꢀ8ꢀmmꢀxꢀ8ꢀmmꢀ56-pinꢀQFNꢀpackage.ꢀꢀTheꢀGPSꢀbasebandꢀ  
processorsꢀincludeꢀaꢀ16-channelꢀGPSꢀcorrelatorꢀandꢀtheꢀARM7TDMIꢀcore,ꢀaꢀ32-bitꢀRISCꢀarchitecture.ꢀꢀFollowingꢀ  
interfacesꢀareꢀprovidedꢀUSBꢀdeviceꢀport,ꢀtwoꢀUSARTsꢀandꢀtheꢀSPIꢀinterfaceꢀ(forꢀoptionalꢀserialꢀEEPROM).ꢀ  
BothꢀATR0622ꢀandꢀATR0625ꢀincludeꢀaꢀcompleteꢀANTARISꢀ4ꢀGPSꢀfirmwareꢀrunningꢀdirectlyꢀfromꢀon-chipꢀROM.ꢀꢀ  
®
Theꢀ ATR0625ꢀ featuresꢀ SuperSense ꢀ whichꢀ providesꢀ exceptionallyꢀ highꢀ sensitivity.ꢀ ꢀ Theꢀ firmwareꢀ performsꢀ  
acquisition,tracking,navigationandpositiondataoutput.TheNMEAprotocol,thebinaryUBXprotocolandꢀ  
RTCMꢀforꢀdifferentialꢀGPSꢀareꢀsupported.ꢀꢀTheꢀfirmwareꢀprovidesꢀfullꢀsupportꢀofꢀSBASꢀsatellitesꢀ(WAAS,ꢀEGNOSꢀ  
andꢀMSAS)ꢀandꢀassistedꢀGPSꢀ(A-GPS).ꢀꢀForꢀnormalꢀPVTꢀ(Positionꢀ/ꢀVelocityꢀ/ꢀTime)ꢀapplications,ꢀthereꢀisꢀnoꢀneedꢀ  
forꢀexternalꢀFlash-ꢀorꢀROM-memory.ꢀꢀTheꢀfirmwareꢀsupportsꢀtheꢀpossibilityꢀtoꢀstoreꢀtheꢀconfigurationꢀsettingsꢀinꢀ  
anꢀoptionalꢀexternalꢀEEPROMꢀorꢀon-chipꢀbatteryꢀbackedꢀSRAM.ꢀ  
TheꢀATR0622ꢀandꢀATR0625ꢀareꢀmanufacturedꢀusingꢀtheꢀAtmelꢀhigh-densityꢀCMOSꢀtechnology.ꢀꢀForꢀmaximumꢀ  
performance,werecommendtousethesesinglechipGPSreceiverstogetherwithalownoiseamplifier(e.g.ꢀ  
ATR0610).ꢀ  
1.2 Features  
16ꢀchannelꢀANTARISꢀ4ꢀpositioningꢀengineꢀ  
®
ATR0625:ꢀSuperSense ꢀIndoorꢀGPS:ꢀdownꢀtoꢀ-158ꢀdBmꢀ  
Ultra-lowꢀpowerꢀconsumption:ꢀ22ꢀmWꢀ  
AssistedꢀGPSꢀandꢀAutonomousꢀGPSꢀoperation,ꢀAssistNow™ꢀreadyꢀ  
Minimumꢀbillꢀofꢀmaterialꢀ  
4ꢀHzꢀpositionꢀupdateꢀrateꢀ  
1ꢀUSBꢀandꢀ2ꢀUARTꢀportsꢀ  
SupportsꢀDGPS,ꢀWAAS,ꢀEGNOSꢀandꢀMSASꢀ  
Powerꢀsavingꢀmodesꢀ  
5ꢀµAꢀbackupꢀcurrentꢀ  
SPIꢀMasterꢀ&ꢀSlaveꢀ(suitableꢀforꢀoptionalꢀserialꢀEEPROMs)ꢀ  
RealꢀTimeꢀClockꢀ(RTC)ꢀ  
Supportsꢀpassiveꢀandꢀactiveꢀantennasꢀ  
Antennaꢀshortꢀandꢀopenꢀcircuitꢀdetectionꢀandꢀprotectionꢀ  
Operatingꢀtemperatureꢀrange:ꢀ–40ꢀtoꢀ85°Cꢀ  
RoHSꢀcompliantꢀ(lead-free)ꢀ  
SemiconductorꢀtechnologyꢀprovidedꢀbyꢀATMELꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
Descriptionꢀ  
Page 4ꢀ  
your position is our focus  
1.3 Block Diagram  
Figure 1-1: Block Diagram  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
Descriptionꢀ  
Page 5ꢀ  
your position is our focus  
1.4 Operating Modes  
TheꢀANTARISꢀ4ꢀGPSꢀTechnologyꢀsupportsꢀfollowingꢀOperatingꢀModes:ꢀ  
Operating Modes  
Description  
Inꢀthisꢀmode,ꢀtheꢀAutonomousꢀPowerꢀManagementꢀ(APM)ꢀ  
automaticallyꢀoptimizesꢀpowerꢀconsumption.ꢀꢀItꢀpowersꢀoffꢀpartsꢀofꢀ  
theꢀreceiverꢀwhenꢀtheyꢀareꢀnotꢀused.ꢀꢀAlso,ꢀtheꢀCPUꢀspeedꢀisꢀ  
reducedꢀwhenꢀtheꢀCPUꢀworkloadꢀisꢀlow.ꢀ  
Continuous Tracking Mode (CTM)  
AꢀconfigurableꢀpowerꢀsavingꢀmodeꢀisꢀavailableꢀwhereꢀtheꢀGPSꢀisꢀputꢀ  
intoꢀsleepꢀmodeꢀandꢀactivatedꢀupꢀonꢀaꢀselectableꢀtimeꢀintervalꢀorꢀ  
uponꢀexternalꢀrequestꢀ(signalꢀactivityꢀonꢀserialꢀportꢀorꢀEXTINTꢀinput).ꢀꢀ  
Thisꢀmodeꢀisꢀideallyꢀsuitedꢀinꢀapplicationsꢀwithꢀstringentꢀpowerꢀ  
budgetꢀrequirementsꢀinꢀmobileꢀandꢀbatteryꢀoperatedꢀendꢀproducts.ꢀ  
Power Saving Modes  
Table 1: Operating Modes  
ForꢀmoreꢀinformationꢀseeꢀtheꢀANTARIS 4 Receiver Descriptionꢀ[1].ꢀ  
1.5 Protocols  
TheꢀLEA-4Aꢀsupportsꢀdifferentꢀserialꢀprotocols.ꢀ  
Protocol  
Type  
Runs on  
NMEAꢀ  
UBXꢀ  
Input/output,ꢀASCII,ꢀ0183,ꢀ2.3ꢀ(compatibleꢀtoꢀ3.0)ꢀ  
Input/output,ꢀbinary,ꢀu-bloxꢀproprietaryꢀ  
Input,ꢀmessageꢀ1,2,3,9ꢀ  
AllꢀserialꢀportsꢀandꢀUSBꢀ  
AllꢀserialꢀportsꢀandꢀUSBꢀ  
AllꢀserialꢀportsꢀandꢀUSBꢀ  
RTCMꢀ  
Table 2: Available Protocols  
ForꢀspecificationꢀofꢀtheꢀvariousꢀprotocolsꢀseeꢀtheꢀProtocol Specificationꢀ[2].ꢀ  
1.6 Assisted GPS (A-GPS)  
Theꢀ ANTARISꢀ 4ꢀ GPSꢀ engineꢀ supportsꢀ bothꢀ MSꢀ assistedꢀ (outputꢀ ofꢀ rawꢀ trackingꢀ informationꢀ forꢀ positionꢀ  
computationꢀbyꢀtheꢀserviceꢀprovider)ꢀandꢀMSꢀbasedꢀ(acceleratedꢀacquisitionꢀandꢀpositionꢀcomputationꢀinꢀtheꢀGPSꢀ  
receiver)ꢀA-GPS.ꢀꢀSupplyꢀofꢀaidingꢀinformationꢀlikeꢀephemeris,ꢀalmanac,ꢀroughꢀlastꢀpositionꢀandꢀtimeꢀandꢀsatelliteꢀ  
statusꢀandꢀanꢀoptionalꢀtimeꢀsynchronizationꢀsignalꢀwillꢀreduceꢀtimeꢀtoꢀfirstꢀfixꢀsignificantly.ꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
Descriptionꢀ  
Page 6ꢀ  
your position is our focus  
2 Architectural Overview  
Feature  
Description  
ARM7TDMIꢀ  
ROMꢀ  
Processorꢀ  
Highꢀperformanceꢀ32-bitꢀRISCꢀarchitectureꢀ  
On-chipꢀmemoryꢀ  
384.ꢀKbytesꢀ  
RAMꢀ  
128ꢀKbytesꢀ  
BackupꢀRAMꢀ  
USBꢀ  
4ꢀKbytesꢀ  
SerialꢀI/Oꢀ  
USBꢀV1.2ꢀ(V2.0ꢀcompatible)ꢀ  
2ꢀ  
USARTsꢀ  
SPIꢀ(Masterꢀ+ꢀSlave)ꢀ  
GPIOꢀ  
4ꢀSPIꢀChipꢀselectsꢀ  
24ꢀ  
DigitalꢀI/Oꢀ  
Interruptꢀcapable:ꢀ  
LDOꢀRegulatorsꢀ  
2ꢀ(EXTINT0,ꢀEXTINT1)ꢀ  
LDO18ꢀ(generatesꢀinternalꢀ1.8ꢀV)ꢀ  
LDOBATꢀ(regulatesꢀbackupꢀvoltage)ꢀ  
Powerꢀsupplyꢀsystemꢀ  
Padsꢀ  
User-definableꢀI/OꢀvoltagesꢀforꢀseveralꢀGPIOsꢀwithꢀ  
5Vꢀtoleranceꢀ  
Otherꢀfeaturesꢀ  
6ꢀchannelꢀperipheralꢀdataꢀcontrollerꢀ(PDC)ꢀ  
8-levelꢀpriority,ꢀindividuallyꢀmaskable,ꢀvectoredꢀinterruptꢀcontrollerꢀ  
Programmableꢀwatchdogꢀtimerꢀ  
Advancedꢀpowerꢀmanagementꢀcontrollerꢀ(APMC)ꢀ  
Real-timeꢀclockꢀ(RTC)ꢀ  
Table 2-1: Features  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
ArchitecturalꢀOverviewꢀ  
Page 7ꢀ  
your position is our focus  
2.1 Description  
TheGPSbasebandcoreincludesa16-channelꢀcorrelatorꢀisbasedonanꢀARM7TDMIꢀARMprocessorcorewithꢀ  
veryꢀlowꢀpowerꢀconsumption.ꢀItꢀhasꢀaꢀhigh-performanceꢀ32-bitꢀRISCꢀarchitectureꢀandꢀusesꢀaꢀhigh-densityꢀ16-bitꢀ  
instructionꢀset.ꢀTheꢀARMꢀstandardꢀIn-CircuitꢀEmulationꢀdebugꢀinterfaceꢀisꢀsupportedꢀviaꢀtheꢀJTAG/ICEꢀport.ꢀꢀTheꢀ  
ARM7TDMIꢀprocessorꢀoperatesꢀinꢀlittle-endianꢀmode.ꢀ  
Theꢀ basebandꢀ architectureꢀ consistsꢀ ofꢀ twoꢀ mainꢀ buses,ꢀ theꢀ Advancedꢀ Systemꢀ Busꢀ (ASB)ꢀ andꢀ theꢀ Advancedꢀ  
PeripheralBus(APB).TheASBisdesignedformaximumperformance.Itinterfacestheprocessorwiththeon-  
chipꢀ32-bitꢀmemories.ꢀTheꢀAPBꢀisꢀdesignedꢀforꢀaccessesꢀtoꢀon-chipꢀperipheralsꢀandꢀisꢀoptimizedꢀforꢀlowꢀpowerꢀ  
consumption.ꢀTheꢀAMBA™ꢀBridgeꢀprovidesꢀanꢀinterfaceꢀbetweenꢀtheꢀASBꢀandꢀtheꢀAPB.ꢀ  
Anon-chipPeripheralDataController(PDC2)transfersdatabetweentheon-chipUSARTs/SPIandtheon-chipꢀ  
andꢀ off-chipꢀ memoriesꢀ withoutꢀ processorꢀ intervention.ꢀ Mostꢀ importantly,ꢀ theꢀ PDC2ꢀ removesꢀ theꢀ processorꢀ  
interruptꢀhandlingꢀoverheadꢀandꢀsignificantlyꢀreducesꢀtheꢀnumberꢀofꢀclockꢀcyclesꢀrequiredꢀforꢀaꢀdataꢀtransfer.ꢀItꢀ  
canꢀ transferꢀ upꢀ toꢀ 64Kꢀ contiguousꢀ bytesꢀ withoutꢀ reprogrammingꢀ theꢀ startingꢀ address.ꢀ Asꢀ aꢀ result,ꢀ theꢀ  
performanceꢀofꢀtheꢀmicrocontrollerꢀisꢀincreasedꢀandꢀtheꢀpowerꢀconsumptionꢀreduced.ꢀ  
AnAdvancedPowerManagementController(APMC)allowsfortheperipheralstobedeactivatedindividually.ꢀ  
Automaticmasterclockgearingreducespowerconsumption.ASleepModeisavailablewithdisabled23.104ꢀ  
MHzꢀmasterꢀclock,ꢀasꢀwellꢀasꢀaꢀBackupꢀModeꢀoperatingꢀ32.768ꢀkHzꢀmasterꢀclock.ꢀ  
Aꢀ 32.768ꢀ kHzꢀ Realꢀ Timeꢀ Clockꢀ (RTC),ꢀ togetherꢀ withꢀ aꢀ built-inꢀ batteryꢀ back-upꢀ SRAM,ꢀ allowsꢀ forꢀ storageꢀ ofꢀ  
Almanac,ꢀEphemeris,ꢀsoftwareꢀconfigurationsꢀtoꢀmakeꢀquickꢀhot-ꢀandꢀwarmꢀstarts.ꢀ  
TheꢀfunctionalityꢀofꢀtheꢀROM-basedꢀfirmwareꢀisꢀdescribedꢀinꢀtheꢀANTARIS 4 Receiver Descriptionꢀ[1].ꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
ArchitecturalꢀOverviewꢀ  
Page 8ꢀ  
your position is our focus  
3 Performance Specification  
Parameter  
Specification  
ReceiverꢀTypeꢀ  
L1ꢀfrequency,ꢀC/AꢀCode,ꢀꢀ  
16-Channelsꢀ  
8192ꢀtimeꢀ/ꢀfrequencyꢀsearchꢀwindowsꢀ  
MaxꢀNavigationꢀUpdateꢀRateꢀ  
Accuracyꢀ  
4ꢀHz  
2
3
Positionꢀ  
2.5ꢀmꢀCEP ꢀ  
5.0ꢀmꢀSEP ꢀ  
1
PositionꢀDGPSꢀ/ꢀSBAS ꢀ  
2.0ꢀmꢀCEPꢀ  
3.0ꢀmꢀSEPꢀ  
4,ꢀ5  
GPSꢀModeꢀ(UBX-CFGꢀMsg):ꢀ  
FastꢀAcqui-ꢀ  
sitionꢀModeꢀ  
Normalꢀ  
HighꢀSensi-ꢀ  
tivityꢀModeꢀ  
Autoꢀ  
Acquisition ꢀ  
Modeꢀ  
Modeꢀ  
34ꢀsꢀ  
33ꢀsꢀ  
<3.5ꢀsꢀ  
5ꢀsꢀ  
36ꢀsꢀ  
41ꢀsꢀ  
34ꢀsꢀ  
ColdꢀStartꢀ  
WarmꢀStartꢀ  
HotꢀStartꢀ  
6
AidedꢀStart ꢀ  
<1ꢀsꢀ  
Reacquisitionꢀ  
7
FastꢀAcqui-ꢀ  
sitionꢀModeꢀ  
Normalꢀ  
Modeꢀ  
HighꢀSensi-ꢀ  
tivityꢀModeꢀ  
Autoꢀ  
Modeꢀ  
8
Sensitivity ꢀ  
(ATR0622)ꢀ  
Acquisitionꢀ  
Trackingꢀ  
-134ꢀdBmꢀ -138ꢀdBmꢀ -140ꢀdBmꢀ Seeꢀ ꢀ  
-143ꢀdBmꢀ -146ꢀdBmꢀ -150ꢀdBmꢀ -150ꢀdBmꢀ  
-158ꢀdBmꢀ  
9
Sensitivity ꢀ  
Trackingꢀꢀ  
(ATR0625ꢀwithꢀSuperSense)ꢀ  
Acquisitionꢀ&ꢀ  
Reacquisitionꢀ  
-148ꢀdBmꢀ  
ColdꢀStartsꢀ  
RMSꢀ  
-142dBmꢀ  
50ꢀnsꢀ  
AccuracyꢀofꢀTimepulseꢀSignalꢀ  
99%ꢀ  
<100ꢀnsꢀ  
43ꢀnsꢀ  
Granularityꢀ  
Strongꢀsignalsꢀ  
Dynamicsꢀꢀ  
ꢀ4ꢀgꢀ  
OperationalꢀLimitsꢀ(COCOM)ꢀ  
Altitudeꢀ  
Velocityꢀ  
18,000ꢀmꢀ  
515ꢀm/sꢀ  
Oneꢀofꢀtheꢀlimitsꢀmayꢀbeꢀexceededꢀbutꢀnotꢀboth.ꢀ  
Table 3-1: Performance Specification  
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ  
1
ꢀDependsꢀonꢀaccuracyꢀofꢀcorrectionꢀdataꢀofꢀDGPSꢀorꢀSBASꢀserviceꢀ  
2
3
4
5
6
7
8
9
ꢀCEPꢀ=ꢀCircularꢀErrorꢀProbability:ꢀTheꢀradiusꢀofꢀaꢀhorizontalꢀcircle,ꢀcenteredꢀatꢀtheꢀantenna’sꢀtrueꢀposition,ꢀcontainingꢀ50%ꢀofꢀtheꢀfixes.ꢀ  
ꢀSEPꢀ=ꢀSphericalꢀErrorꢀProbability.ꢀꢀTheꢀradiusꢀofꢀtheꢀsphere,ꢀcenteredꢀatꢀtheꢀtrueꢀposition,ꢀcontainsꢀ50%ꢀofꢀtheꢀfixes.ꢀ  
ꢀTheꢀdifferentꢀstart-upꢀmodesꢀlikeꢀcold,ꢀwarmꢀandꢀhotꢀstartꢀareꢀdescribedꢀinꢀtheꢀANTARIS 4 Receiver Descriptionꢀ[1].ꢀ  
ꢀMeasuredꢀwithꢀgoodꢀvisibilityꢀandꢀ-125ꢀdBmꢀsignalꢀstrengthꢀ  
ꢀTimeꢀsynch.ꢀsignalꢀfromꢀaidingꢀsourceꢀmustꢀbeꢀsuppliedꢀtoꢀEXTINT0ꢀorꢀEXTINT1ꢀpin,ꢀhavingꢀaccuracyꢀofꢀbetterꢀthanꢀ200ꢀµsꢀ  
ꢀDemonstratedꢀwithꢀaꢀgoodꢀactiveꢀantennaꢀ  
ꢀSensitivityꢀforꢀfindingꢀfirstꢀsatellite:ꢀ-134ꢀdBm.ꢀꢀSensitivityꢀincreasesꢀupꢀtoꢀ–150ꢀdBmꢀforꢀsearchingꢀadditionalꢀsatellites.ꢀ  
ꢀDemonstratedꢀwithꢀaꢀgoodꢀactiveꢀantennaꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
PerformanceꢀSpecificationꢀ  
Page 9ꢀ  
your position is our focus  
4 Mechanical Specification  
Figure 4-1: Package Information  
5 Pin Configuration  
5.1 Pinout  
Figure 5-1: Pinout QFN56 (Top View)  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
MechanicalꢀSpecificationꢀ  
Page 10ꢀ  
your position is our focus  
Pin Name  
QFN56  
Pin  
Pull Resistor Firmware  
PIO Bank A  
PIO Bank B  
Type  
(Reset  
Value)  
Label  
1
CLK23ꢀ  
37ꢀ  
8ꢀ  
INꢀ  
DBG_ENꢀ  
GNDꢀ  
INꢀ  
PDꢀ  
2
Seeꢀ ꢀ  
INꢀ  
LDOBAT_INꢀ  
LDO_ENꢀ  
LDO_INꢀ  
LDO_OUTꢀ  
NRESETꢀ  
21ꢀ  
25ꢀ  
20ꢀ  
19ꢀ  
41ꢀ  
INꢀ  
INꢀ  
INꢀ  
OUTꢀ  
I/Oꢀ  
OpenꢀDrainꢀ  
PUꢀ  
NSHDNꢀ  
NSLEEPꢀ  
NTRSTꢀ  
P0ꢀ  
26ꢀ  
24ꢀ  
13ꢀ  
40ꢀ  
47ꢀ  
OUTꢀ  
OUTꢀ  
INꢀ  
PDꢀ  
PDꢀ  
I/Oꢀ  
NANTSHORTꢀ  
P1ꢀ  
I/Oꢀ  
Configurableꢀ GPSMODE0ꢀ  
(PD)ꢀ  
AGCOUT1ꢀ  
P2ꢀ  
46ꢀ  
48ꢀ  
29ꢀ  
49ꢀ  
32ꢀ  
1ꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
Configurableꢀ BOOT_-  
"0"ꢀ  
"0"ꢀ  
(PD)ꢀ  
Configurableꢀ STATUSLEDꢀ  
(PD)ꢀ  
PUꢀ  
toꢀVBAT18ꢀ  
Configurableꢀ GPSMODE2ꢀ  
(PU)ꢀ  
PUꢀ  
toꢀVBAT18ꢀ  
Configurableꢀ NAADET1ꢀ  
(PD)ꢀ  
PDꢀ  
MODEꢀ  
P8ꢀ  
P9ꢀ  
EXTINT0ꢀ  
EXTINT0ꢀ  
P12ꢀ  
P13ꢀ  
P14ꢀ  
NPCS2ꢀ  
GPSMODE3ꢀ  
EXTINT1ꢀ  
"0"ꢀ  
P15ꢀ  
P16ꢀ  
17ꢀ  
6ꢀ  
I/Oꢀ  
I/Oꢀ  
ANTONꢀ  
Configurableꢀ NEEPROMꢀ  
(PU)ꢀ  
SIGHI1ꢀ  
NWD_OVFꢀ  
P17ꢀ  
P18ꢀ  
P19ꢀ  
P20ꢀ  
P21ꢀ  
P22ꢀ  
P23ꢀ  
P24ꢀ  
P25ꢀ  
P26ꢀ  
P27ꢀ  
P29ꢀ  
2ꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
I/Oꢀ  
Configurableꢀ GPSMODE5ꢀ  
(PD)ꢀ  
SCK1ꢀ  
SCK1ꢀ  
TXD1ꢀ  
45ꢀ  
53ꢀ  
4ꢀ  
Configurableꢀ TXD1ꢀ  
(PU)ꢀ  
"0"ꢀ  
Configurableꢀ GPSMODE6ꢀꢀ SIGLO1ꢀ  
(PU)ꢀ  
"0"ꢀ  
Configurableꢀ TIMEPULSEꢀꢀ  
(PD)ꢀ  
SCK2ꢀ  
SCK2ꢀ  
TXD2ꢀ  
TIMEPULSEꢀ  
52ꢀ  
30ꢀ  
3ꢀ  
Configurableꢀ TXD2ꢀ  
(PU)ꢀꢀ  
"0"ꢀ  
PUꢀ  
toꢀVBAT18ꢀ  
RXD2ꢀ  
RXD2ꢀ  
SCKꢀ  
MOSIꢀ  
MISOꢀ  
Configurableꢀ GPSMODE7ꢀ  
(PU)ꢀꢀ  
SCKꢀ  
MCLK_OUTꢀ  
5ꢀ  
Configurableꢀ GPSMODE8ꢀ  
(PU)ꢀꢀ  
MOSIꢀ  
MISOꢀ  
NPCS0ꢀ  
NPCS1ꢀ  
NPCS3ꢀ  
"0"ꢀ  
"0"ꢀ  
"0"ꢀ  
55ꢀ  
44ꢀ  
54ꢀ  
50ꢀ  
Configurableꢀ NAADET0ꢀ  
(PD)ꢀꢀ  
Configurableꢀ GPSMODE10ꢀ NSSꢀ  
(PU)ꢀꢀ  
Configurableꢀ GPSMODE11ꢀ  
(PU)ꢀꢀ  
Configurableꢀ GPSMODE12ꢀ  
(PU)ꢀꢀ  
P30ꢀ  
P31ꢀ  
16ꢀ  
31ꢀ  
I/Oꢀ  
I/Oꢀ  
PDꢀ  
AGCOUT0ꢀ  
RXD1ꢀ  
AGCOUT0ꢀ  
"0"ꢀ  
PUꢀ  
RXD1ꢀ  
toꢀVBAT18ꢀ  
RF_ONꢀ  
15ꢀ  
OUTꢀ  
PDꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
PinꢀConfigurationꢀ  
Page 11ꢀ  
your position is our focus  
Pin Name  
QFN56  
Pin  
Pull Resistor Firmware  
PIO Bank A  
PIO Bank B  
Type  
(Reset  
Value)  
Label  
1
SIGHI0ꢀ  
SIGLO0ꢀ  
TCKꢀ  
38ꢀ  
INꢀ  
39ꢀ  
INꢀ  
9ꢀ  
INꢀ  
PUꢀ  
TDIꢀ  
10ꢀ  
INꢀ  
PUꢀ  
TDOꢀ  
11ꢀ  
OUTꢀ  
INꢀ  
TMSꢀ  
12ꢀ  
PUꢀ  
USB_DMꢀ  
USB_DPꢀ  
VBATꢀ  
34ꢀ  
I/Oꢀ  
I/Oꢀ  
INꢀ  
35ꢀ  
22ꢀ  
3
VBAT18ꢀ ꢀ  
23ꢀ  
OUTꢀ  
INꢀ  
VDD18ꢀ  
VDD18ꢀ  
VDD18ꢀ  
7,ꢀ14ꢀ  
18,ꢀ36ꢀ  
51ꢀ  
INꢀ  
INꢀ  
4
VDDIOꢀ ꢀ  
43,ꢀ56ꢀ  
33ꢀ  
INꢀ  
5
VDD_USBꢀ ꢀ  
XT_INꢀ  
INꢀ  
28ꢀ  
INꢀ  
XT_OUTꢀ  
27ꢀ  
OUTꢀ  
-ꢀ  
6
NCꢀ ꢀ  
42ꢀ  
1
2
3
4
Notes:ꢀ  
ꢀꢀPDꢀ=ꢀinternalꢀpull-downꢀresistor,ꢀPUꢀ=ꢀinternalꢀpull-upꢀresistor,ꢀOHꢀ=ꢀswitchedꢀtoꢀOutputꢀHighꢀatꢀresetꢀ  
ꢀꢀGroundꢀplaneꢀ  
ꢀꢀVBAT18ꢀrepresentꢀtheꢀinternalꢀpowerꢀsupplyꢀofꢀtheꢀbackupꢀpowerꢀdomain,ꢀseeꢀsectionꢀ6,ꢀ"PowerꢀSupply"ꢀ  
ꢀꢀVDDIOꢀisꢀtheꢀsupplyꢀvoltageꢀforꢀtheꢀfollowingꢀGPIOꢀpins:ꢀP1,ꢀP2,ꢀP8,ꢀP12,ꢀP14,ꢀP16,ꢀP17,ꢀP18,ꢀP19,ꢀP20,ꢀP21,ꢀP23,ꢀP24,ꢀ  
P25,ꢀP26,ꢀP27ꢀandꢀP29,ꢀseeꢀsectionꢀ6,ꢀ"PowerꢀSupply"ꢀ  
5
ꢀꢀVDD_USBꢀisꢀtheꢀsupplyꢀvoltageꢀforꢀtheꢀfollowingꢀUSBꢀpins:ꢀUSB_DMꢀandꢀUSB_DP,ꢀseeꢀsectionꢀ6,ꢀ"PowerꢀSupply".ꢀꢀForꢀ  
operationꢀofꢀtheꢀUSBꢀinterface,ꢀsupplyꢀofꢀ3.0ꢀtoꢀ3.6ꢀVꢀisꢀrequired.ꢀ  
6
ꢀꢀThisꢀpinꢀisꢀnotꢀconnectedꢀ  
Table 5-1: Pin Description  
5.2 Signal Description  
Module  
Name  
Function  
Type  
Active Level Comment  
EBIꢀ  
BOOT_MODEꢀ  
Bootꢀmodeꢀinputꢀ  
Inputꢀ  
-ꢀ  
PIO-controlledꢀafterꢀreset,ꢀ  
internalꢀpull-downꢀresistorꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
USARTꢀ  
TXD1…2ꢀ  
RXD1…2ꢀ  
SCK1…2ꢀ  
Transmitꢀdataꢀoutputꢀ  
Receiveꢀdataꢀinputꢀ  
Outputꢀ  
Inputꢀ  
I/Oꢀ  
-ꢀ  
-ꢀ  
-ꢀ  
Externalꢀsynchronousꢀserialꢀ  
clockꢀ  
USBꢀ  
USB_DPꢀ  
USBꢀdataꢀ(D+)ꢀ  
USBꢀdataꢀ(D-)ꢀ  
I/Oꢀ  
-ꢀ  
-ꢀ  
-ꢀ  
USB_DMꢀ  
RF_ONꢀ  
I/Oꢀ  
APMCꢀ  
AICꢀ  
Outputꢀ  
Inputꢀ  
InterfaceꢀtoꢀATR0601ꢀ  
EXTINT0…1ꢀ  
Externalꢀinterruptꢀrequestꢀ  
Highꢀ/ꢀLowꢀ/ꢀ  
Edgeꢀ  
PIO-controlledꢀafterꢀresetꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
PinꢀConfigurationꢀ  
Page 12ꢀ  
your position is our focus  
Module  
Name  
Function  
Type  
Active Level Comment  
AGCꢀ  
AGCOUT0…1ꢀ  
Automaticꢀgainꢀcontrolꢀ  
Outputꢀ  
-ꢀ  
InterfaceꢀtoꢀATR0601,ꢀ  
PIO-controlledꢀafterꢀresetꢀ  
RTCꢀ  
NSLEEPꢀ  
Sleepꢀoutputꢀ  
Outputꢀ  
Outputꢀ  
Inputꢀ  
Outputꢀ  
I/Oꢀ  
Lowꢀ  
Lowꢀ  
-ꢀ  
InterfaceꢀtoꢀATR0601ꢀ  
ConnectꢀtoꢀpinꢀLDO_ENꢀ  
RTCꢀoscillatorꢀ  
NSHDNꢀ  
Shutdownꢀoutputꢀ  
Oscillatorꢀinputꢀ  
Oscillatorꢀoutputꢀ  
SPIꢀclockꢀ  
XT_INꢀ  
XT_OUTꢀ  
SCKꢀ  
-ꢀ  
RTCꢀoscillatorꢀ  
SPIꢀ  
-ꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
Inputꢀafterꢀresetꢀ  
MOSIꢀ  
Slaveꢀinꢀmasterꢀoutꢀ  
Masterꢀinꢀslaveꢀoutꢀ  
SlaveꢀSelectꢀ  
I/Oꢀ  
-ꢀ  
MISOꢀ  
I/Oꢀ  
-ꢀ  
NSS/NPCS0ꢀ  
NPCS1...3ꢀ  
NWD_OVFꢀ  
P0…31ꢀ  
I/Oꢀ  
Lowꢀ  
Lowꢀ  
-ꢀ  
SlaveꢀSelectꢀ  
Outputꢀ  
Outputꢀ  
I/Oꢀ  
WDꢀ  
PIOꢀ  
GPSꢀ  
Watchdogꢀtimerꢀoverflowꢀ  
ProgrammableꢀI/OꢀPortꢀ  
DigitalꢀIFꢀ  
-ꢀ  
SIGHI0ꢀ  
Inputꢀ  
Inputꢀ  
Inputꢀ  
Inputꢀ  
Outputꢀ  
Inputꢀ  
Outputꢀ  
Inputꢀ  
Outputꢀ  
-ꢀ  
InterfaceꢀtoꢀATR0601ꢀ  
InterfaceꢀtoꢀATR0601ꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
SIGLO0ꢀ  
DigitalꢀIFꢀ  
-ꢀ  
SIGHI1ꢀ  
DigitalꢀIFꢀ  
-ꢀ  
SIGLO1ꢀ  
DigitalꢀIFꢀ  
-ꢀ  
TIMEPULSEꢀ  
GPSMODE0…12ꢀ  
STATUSLEDꢀ  
NEEPROMꢀ  
ANTONꢀ  
GPSꢀsynchronizedꢀGPSꢀsignalꢀ  
GPSꢀmodeꢀ  
-ꢀ  
CONFIGꢀ  
-ꢀ  
StatusꢀLEDꢀ  
-ꢀ  
EnableꢀEEPROMꢀsupportꢀ  
Lowꢀ  
-ꢀ  
Activeꢀantennaꢀpowerꢀonꢀ  
outputꢀ  
NANTSHORTꢀ  
NAADET0…1ꢀ  
Activeꢀantennaꢀshortꢀcircuitꢀ  
detectionꢀinputꢀ  
Inputꢀ  
Inputꢀ  
Lowꢀ  
Lowꢀ  
PIO-controlledꢀafterꢀresetꢀ  
PIO-controlledꢀafterꢀresetꢀ  
Activeꢀantennaꢀdetectionꢀ  
inputꢀ  
JTAGꢀ/ꢀICEꢀ  
TMSꢀ  
Testꢀmodeꢀselectꢀ  
Testꢀdataꢀinꢀ  
Inputꢀ  
Inputꢀ  
Outputꢀ  
Inputꢀ  
Inputꢀ  
Inputꢀ  
Inputꢀ  
-ꢀ  
Internalꢀpull-upꢀresistorꢀ  
Internalꢀpull-upꢀresistorꢀ  
OutputꢀhighꢀinꢀRESETꢀstateꢀ  
Internalꢀpull-upꢀresistorꢀ  
Internalꢀpull-downꢀresistorꢀ  
Internalꢀpull-downꢀresistorꢀ  
TDIꢀ  
-ꢀ  
TDOꢀ  
Testꢀdataꢀoutꢀ  
Testꢀclockꢀ  
-ꢀ  
TCKꢀ  
-ꢀ  
NTRSTꢀ  
DBG_ENꢀ  
CLK23ꢀ  
Testꢀresetꢀinputꢀ  
Debugꢀenableꢀ  
Clockꢀinputꢀ  
Lowꢀ  
Highꢀ  
-ꢀ  
CLOCKꢀ  
InterfaceꢀtoꢀATR0601,ꢀ  
Schmittꢀtriggerꢀinputꢀ  
MCLK_OUTꢀ  
NRESETꢀ  
Masterꢀclockꢀoutputꢀ  
Resetꢀinputꢀ  
Outputꢀ  
I/Oꢀ  
-ꢀ  
PIO-controlledꢀafterꢀresetꢀ  
RESETꢀ  
Lowꢀ  
Openꢀdrainꢀwithꢀinternalꢀpull-  
upꢀresistorꢀ  
POWERꢀ  
VDD18ꢀ  
VDDIOꢀ  
Powerꢀ  
Powerꢀ  
-ꢀ  
-ꢀ  
Coreꢀvoltageꢀ1.8Vꢀ  
VariableꢀI/Oꢀvoltageꢀ  
1.65...3.6Vꢀ  
VDD_USBꢀ  
Powerꢀ  
-ꢀ  
USBꢀvoltageꢀ0...2.0Vꢀorꢀ  
1
3.0...3.6Vꢀ ꢀ  
GNDꢀ  
Powerꢀ  
Powerꢀ  
Powerꢀ  
Outꢀ  
-ꢀ  
-ꢀ  
-ꢀ  
-ꢀ  
-ꢀ  
-ꢀ  
Groundꢀ  
LDOBATꢀ  
LDOBAT_INꢀ  
VBATꢀ  
2.3...3.6Vꢀ  
1.5...3.6Vꢀ  
VBAT18ꢀ  
LDO_INꢀ  
LDO_OUTꢀ  
1.8Vꢀbackupꢀvoltageꢀ  
2.3...3.6Vꢀ  
LDO18ꢀ  
LDOꢀinꢀ  
LDOꢀoutꢀ  
Powerꢀ  
Powerꢀ  
1.8Vꢀcoreꢀvoltage,ꢀ  
maximumꢀ80ꢀmAꢀ  
LDO_ENꢀ  
LDOꢀenableꢀ  
Inputꢀ  
-ꢀ  
1
Notes:ꢀ  
ꢀꢀTheꢀUSBꢀtransceiverꢀisꢀdisabledꢀifꢀVDD_USBꢀ<ꢀ2.0ꢀV.ꢀꢀInꢀthisꢀcaseꢀtheꢀpinsꢀUSB_DMꢀandꢀUSB_DPꢀareꢀconnectedꢀtoꢀGNDꢀ  
(internalꢀpull-downꢀresistors).ꢀꢀTheꢀUSBꢀtransceiverꢀisꢀenabledꢀifꢀVDD_USBꢀisꢀwithinꢀ3.0Vꢀandꢀ3.6V.ꢀ  
Table 5-2: Signal Description  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
PinꢀConfigurationꢀ  
Page 13ꢀ  
your position is our focus  
5.3 Boot-Time GPSMODE Configuration  
Theꢀstart-upꢀconfigurationꢀofꢀaꢀROM-basedꢀsystemꢀwithoutꢀexternalꢀnon-volatileꢀmemoryꢀisꢀdefinedꢀbyꢀtheꢀstatusꢀ  
ofꢀ theꢀ GPSMODEꢀ pinsꢀ afterꢀ systemꢀ reset.ꢀ Alternatively,ꢀ theꢀ systemꢀ canꢀ beꢀ configuredꢀ throughꢀ messageꢀ  
commandsꢀpassedꢀthroughꢀtheꢀserialꢀinterfaceꢀafterꢀstart-up.ꢀThisꢀconfigurationꢀcanꢀbeꢀstoredꢀinꢀanꢀexternalꢀnon-  
volatileꢀmemoryꢀlikeꢀEEPROM.ꢀꢀDefaultꢀdesignatesꢀsettingsꢀusedꢀbyꢀROMꢀfirmwareꢀifꢀGPSMODEꢀconfigurationꢀisꢀ  
disabledꢀ(GPSMODE0ꢀ=ꢀ0).ꢀ  
Module  
Name  
GPSMODE0ꢀ(P1)ꢀ  
GPSMODE1ꢀ(P9)ꢀ  
GPSMODE2ꢀ(P12)ꢀ  
GPSMODE3ꢀ(P13)ꢀ  
GPSMODE4ꢀ(P14)ꢀ  
EnableꢀconfigurationꢀwithꢀGPSMODEꢀpinsꢀ  
Thisꢀpinꢀ(EXTINT0)ꢀisꢀusedꢀforꢀFixNow™ꢀfunctionalityꢀandꢀnotꢀusedꢀforꢀGPSMODEꢀconfigurationꢀ  
GPSꢀsensitivityꢀsettingsꢀ  
Thisꢀpinꢀ(NAADET1)ꢀisꢀusedꢀasꢀactiveꢀantennaꢀsupervisorꢀinputꢀandꢀnotꢀusedꢀforꢀGPSMODEꢀconfiguration.ꢀ  
ThisꢀisꢀtheꢀdefaultꢀselectionꢀifꢀGPSMODEꢀconfigurationꢀisꢀdisabledꢀ  
GPSMODE5ꢀ(P17)ꢀ  
GPSMODE6ꢀ(P19)ꢀ  
GPSMODE7ꢀ(P23)ꢀ  
GPSMODE8ꢀ(P24)ꢀ  
GPSMODE9ꢀ(P25)ꢀ  
GPSMODE10ꢀ(P26)ꢀ  
GPSMODE11ꢀ(P27)ꢀ  
GPSMODE12ꢀ(P29)ꢀ  
SerialꢀI/Oꢀconfigurationꢀ  
USBꢀpowerꢀmodeꢀ  
GeneralꢀI/Oꢀconfigurationꢀ  
Thisꢀpinꢀ(NAADET0)ꢀisꢀusedꢀasꢀactiveꢀantennaꢀsupervisorꢀinputꢀandꢀnotꢀusedꢀforꢀGPSMODeꢀconfigurationꢀ  
GeneralꢀI/Oꢀconfigurationꢀ  
SerialꢀI/Oꢀconfigurationꢀ  
Table 5-3: GPSMODE Functions  
Inꢀ theꢀ caseꢀ tatꢀ GPSMODEꢀ pinsꢀ withꢀ internalꢀ pull-upꢀ orꢀ pull-downꢀ resistorsꢀ areꢀ connectedꢀ toꢀ GND/VDD18,ꢀ  
additionalꢀcurrentꢀisꢀdrawnꢀoverꢀtheseꢀresistors.ꢀꢀEspeciallyꢀGPSMODE3ꢀcanꢀimpactꢀtheꢀbackupꢀcurrent.ꢀꢀForꢀmoreꢀ  
informationꢀseeꢀtheꢀANTARIS 4 Receiver Descriptionꢀ[1].ꢀ  
5.4 Active Antenna Supervisor  
TheꢀtwoꢀpinsꢀP0/NANTSHORTꢀandꢀP15/ANTONꢀplusꢀoneꢀpinꢀofꢀP25/NAADET0/MISOꢀorꢀP14/NAADET1ꢀareꢀalwaysꢀ  
initializedꢀasꢀgeneralꢀpurposeꢀI/Osꢀandꢀusedꢀasꢀfollows:ꢀ  
P15/ANTONꢀisꢀanꢀoutputꢀwhichꢀcanꢀbeꢀusedꢀtoꢀswitchꢀonꢀandꢀoffꢀantennaꢀpowerꢀsupply.ꢀ  
Inputꢀ P0/NANTSHORTꢀ willꢀ indicateꢀ anꢀ antennaꢀ shortꢀ circuit,ꢀ i.e.ꢀ zeroꢀ DCꢀ voltageꢀ atꢀ theꢀ antenna,ꢀ toꢀ theꢀ  
firmware.ꢀIfꢀtheꢀantennaꢀisꢀswitchedꢀoffꢀbyꢀoutputꢀP15/ANTON,ꢀitꢀisꢀassumedꢀthatꢀalsoꢀinputꢀP0/NANTSHORTꢀ  
willꢀsignalꢀzeroꢀDCꢀvoltage,ꢀi.e.ꢀswitchꢀtoꢀitsꢀactiveꢀlowꢀstate.ꢀ  
InputP25/NAADET0/MISOꢀ orP14/NAADET1willindicateaDCcurrentintotheantenna.Incaseofshortꢀ  
circuit,ꢀ bothꢀ P0ꢀ andꢀ P25/P14ꢀ willꢀ beꢀ active,ꢀ i.e.ꢀ atꢀ lowꢀ level.ꢀ Ifꢀ theꢀ antennaꢀ isꢀ switchedꢀ offꢀ byꢀ outputꢀ  
P15/ANTON,ꢀitꢀisꢀassumedꢀthatꢀalsoꢀinputꢀP25/NAADET0/MISOꢀwillꢀsignalꢀzeroꢀDCꢀcurrent,ꢀi.e.ꢀswitchꢀtoꢀitsꢀ  
activelowstate.WhichpinꢀisꢀusedꢀasꢀNAADETꢀ(P14ꢀorꢀP25)ꢀdependsꢀonꢀtheꢀsettingsꢀofꢀGPSMODE11ꢀandꢀ  
GPSMODE10.ꢀ  
Pin  
Usage  
Meaning  
P0ꢀ/ꢀNANTSHORTꢀ  
NANTSHORTꢀ  
Activeꢀantennaꢀshortꢀcircuitꢀdetectionꢀinputꢀ  
Highꢀ=ꢀNoꢀantennaꢀDCꢀshortꢀcircuitꢀpresentꢀꢀ  
Lowꢀ=ꢀAntennaꢀDCꢀshortꢀcircuitꢀpresentꢀꢀ  
Activeꢀantennaꢀdetectionꢀinputꢀꢀ  
P25ꢀ/ꢀNAADET0ꢀ/ꢀ  
MISOꢀorꢀ  
NAADETꢀ  
Highꢀ=ꢀNoꢀactiveꢀantennaꢀpresentꢀ  
P14ꢀ/ꢀNAADET1ꢀ  
P15ꢀ/ꢀANTONꢀ  
Lowꢀ=ꢀActiveꢀantennaꢀisꢀpresentꢀ  
ANTONꢀ  
Activeꢀantennaꢀpowerꢀonꢀoutputꢀꢀ  
Highꢀ=ꢀPowerꢀsupplyꢀtoꢀactiveꢀantennaꢀisꢀswitchedꢀonꢀ  
Lowꢀ=ꢀPowerꢀsupplyꢀtoꢀactiveꢀantennaꢀisꢀswitchedꢀoffꢀ  
Table 5-4: GPS Sensitivity Settings  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
PinꢀConfigurationꢀ  
Page 14ꢀ  
your position is our focus  
6 Power Supply  
TheꢀbasebandꢀICꢀisꢀsuppliedꢀwithꢀfourꢀdistinctꢀsupplyꢀvoltages:ꢀ  
VDD18,thenominal1.8Vsupplyꢀvoltageꢀforꢀtheꢀcore,ꢀtheꢀRF-I/Oꢀpins,ꢀtheꢀmemoryꢀinterfaceꢀandꢀtheꢀtestꢀ  
pinsꢀandꢀallꢀGPIO-pinsꢀnotꢀmentionedꢀinꢀnextꢀitem.ꢀ  
VDDIO,ꢀtheꢀvariableꢀsupplyꢀvoltageꢀwithinꢀ1.8Vꢀtoꢀ3.6VꢀforꢀfollowingꢀGPIO-pins:ꢀP1,ꢀP2,ꢀP8,ꢀP12,ꢀP14,ꢀP16,ꢀ  
P17…P21,ꢀP23…P27ꢀandꢀP29.ꢀInꢀinputꢀmode,ꢀtheseꢀpinsꢀareꢀ5Vꢀinputꢀtolerant.ꢀ  
VDD_USB,thepowersupplyoftheUSBpins:USB_DMandUSB_DP.TheUSBTransceiverisdisabledifꢀ  
VDD_USB<2.0V.ꢀ Inthiscasethepinsꢀ USB_DMandꢀ USB_DPareconnectedtoꢀ GND(internalpull-downꢀ  
resistors).ꢀTheꢀUSBꢀTransceiverꢀisꢀenabledꢀifꢀVDD_USBꢀwithinꢀ3.0Vꢀandꢀ3.6V.ꢀ  
VBAT18ꢀtoꢀsupplyꢀtheꢀbackupꢀdomain:ꢀRTC,ꢀbackupꢀSRAMꢀandꢀtheꢀpinsꢀNSLEEP,ꢀNSHDN,ꢀLDO_EN,ꢀVBAT18,ꢀ  
P9/EXTINO,ꢀP13/EXTINT1,ꢀP22/RXD2ꢀandꢀP31/RXD1ꢀandꢀtheꢀ32kHzꢀoscillator.ꢀInꢀinputꢀmode,ꢀtheꢀfourꢀGPIO-  
pinsꢀareꢀ5Vꢀinputꢀtolerant.ꢀ  
Inꢀaddition,ꢀtheꢀbasebandꢀICꢀfeaturesꢀtwoꢀlowꢀdropoutꢀlinearꢀregulatorsꢀ(LDO's):ꢀ  
LDO18ꢀconvertsꢀsupplyꢀvoltagesꢀbetweenꢀ2.3ꢀandꢀ3.6Vꢀtoꢀ1.8Vꢀforꢀtheꢀcoreꢀand,ꢀifꢀnecessary,ꢀexternalꢀFlashꢀ  
EPROM.ꢀꢀTheꢀLDO18ꢀcanꢀbeꢀdeactivatedꢀifꢀa1.8Vꢀsupplyꢀisꢀavailable.ꢀ  
LDOBATꢀ providesꢀ supplyꢀ voltageꢀ forꢀ RTCꢀ andꢀ backupꢀ SRAMꢀ fromꢀ batteryꢀ backupꢀ supplyꢀ inputꢀ VBATꢀ  
betweenꢀ1.5Vꢀandꢀ3.6V.ꢀ  
Forꢀtheꢀcore,ꢀtheꢀfollowingꢀpowerꢀsupplyꢀconfigurationsꢀareꢀsupported:ꢀ  
1.8Vꢀisꢀavailableꢀtoꢀsupplyꢀtheꢀcoreꢀdirectlyꢀ  
Aꢀhigherꢀsupplyꢀvoltageꢀ(2.3V…3.6V)ꢀisꢀavailableꢀandꢀmustꢀbeꢀconvertedꢀtoꢀ1.8VꢀusingꢀtheꢀLDO18ꢀ  
TheꢀsupplyꢀisꢀdrawnꢀfromꢀtheꢀUSBꢀport.ꢀꢀInꢀthisꢀcase,ꢀanꢀexternalꢀLDOꢀconvertingꢀtoꢀ3.3Vꢀisꢀneeded.ꢀ  
OnlyꢀafterꢀVDD18ꢀhasꢀbeenꢀsuppliedꢀtoꢀbasebandꢀICꢀtheꢀRTCꢀsectionꢀwillꢀbeꢀinitializedꢀproperly.ꢀIfꢀonlyꢀVBATꢀisꢀ  
appliedꢀfirst,ꢀtheꢀcurrentꢀconsumptionꢀofꢀtheꢀRTCꢀandꢀbackupꢀSRAMꢀisꢀundetermined.ꢀ  
ForꢀmoreꢀinformationꢀseeꢀtheꢀANTARIS 4 Receiver Descriptionꢀ[1].ꢀ  
7 Oscillators  
7.1 GPS Oscillator  
TheCLK23pinisthe23.104MHzclockinputandmustbeconnectedtotheATR0601RFFront-End.Whenꢀ  
usingtheꢀATR0622,ꢀeitherꢀuseꢀaꢀ23.104ꢀMHzꢀcrystalꢀorꢀTCXO.ꢀꢀWhenꢀusingꢀtheꢀATR0625ꢀwithꢀSuperSense,ꢀaꢀ  
TCXOꢀisꢀrequired.ꢀ  
7.2 RTC Oscillator  
FollowingꢀRTCꢀconfigurationsꢀareꢀsupported:ꢀ  
Useꢀofꢀ32.768ꢀKHzꢀRTCꢀcrystalꢀ  
Useꢀofꢀanꢀexternalꢀ32.768ꢀsignalꢀ(sharedꢀwithꢀotherꢀsemiconductorꢀchips)ꢀ  
NoꢀRTCꢀ(GPSꢀmustꢀdoꢀcoldꢀstartsꢀatꢀpower-up)ꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
PowerꢀSupplyꢀ  
Page 15ꢀ  
your position is our focus  
8 Electrical Specifications  
8.1 Absolute Maximum Ratings  
Stressesꢀbeyondꢀthoseꢀlistedꢀunderꢀ"AbsoluteꢀMaximumꢀRatings"ꢀmayꢀcauseꢀpermanentꢀdamageꢀtoꢀtheꢀdevice.ꢀ  
Thisꢀisꢀaꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀofꢀtheꢀdeviceꢀatꢀtheseꢀorꢀanyꢀotherꢀconditionsꢀbeyondꢀthoseꢀ  
indicatedintheoperationalsectionsofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingꢀ  
conditionsꢀforꢀextendedꢀperiodsꢀmayꢀaffectꢀdeviceꢀreliability.ꢀ  
Parameters  
Pin  
Symbol  
Min.  
-40ꢀ  
Max.  
+85ꢀ  
Unit  
°Cꢀ  
°Cꢀ  
Vꢀ  
Operatingꢀfreeꢀairꢀtemperatureꢀrangeꢀ  
Storageꢀtemperatureꢀ  
T ꢀ  
op  
T ꢀ  
-60ꢀ  
+150ꢀ  
+1.95ꢀ  
+3.6ꢀ  
+3.6ꢀ  
+3.6ꢀ  
+3.6ꢀ  
+3.6ꢀ  
+1.95ꢀ  
stg  
DCꢀsupplyꢀvoltageꢀVDD18ꢀ  
DCꢀsupplyꢀvoltageꢀVDDIOꢀdomainꢀ  
DCꢀsupplyꢀvoltageꢀUSBꢀ  
DCꢀsupplyꢀvoltageꢀLDO_INꢀ  
DCꢀsupplyꢀvoltageꢀLDOBATꢀ  
DCꢀsupplyꢀvoltageꢀVBATꢀ  
DCꢀinputꢀvoltageꢀ  
VDD18ꢀ  
VDDIOꢀ  
VDD_USBꢀ  
LDO_INꢀ  
LDOBAT_INꢀ  
VBATꢀ  
VDD18ꢀ  
VDDIOꢀ  
VDD_USBꢀ  
LDO_INꢀ  
LDOBAT_INꢀ  
VBATꢀ  
-0.3ꢀ  
-0.3ꢀ  
-0.3ꢀ  
-0.3ꢀ  
-0.3ꢀ  
-0.3ꢀ  
-0.3ꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
P0,ꢀP15,ꢀP30,ꢀSIGHI,ꢀSIGLO,ꢀ  
CLK23,ꢀXT_IN,ꢀTMS,ꢀTCK,ꢀ  
TDI,ꢀNTRST,ꢀDBG_EN,ꢀ  
DLO_EN,ꢀNRESETꢀ  
Vꢀ  
DCꢀinputꢀvoltageꢀUSBꢀ  
USB_DM,ꢀUSB_DPꢀ  
-0.3ꢀ  
-0.3ꢀ  
+3.6ꢀ  
+5.0ꢀ  
Vꢀ  
Vꢀ  
DCꢀinputꢀvoltageꢀVDDIOꢀdomainꢀ  
P1,ꢀP2,ꢀP8,ꢀP9,ꢀP12…P14,ꢀ  
P16…P27,ꢀP29,ꢀP31ꢀ  
Note:ꢀMinimum/maximumꢀlimitsꢀareꢀatꢀ+25°Cꢀambientꢀtemperature,ꢀunlessꢀotherwiseꢀspecifiedꢀ  
Table 8-1:Absolute Maximum Ratings  
8.2 Operating Conditions  
IfnoꢀadditionalinformationisꢀgivenincolumnꢀTestꢀConditions,ꢀtheꢀvaluesꢀapplyꢀtoꢀaꢀtemperatureꢀrangeꢀfromꢀꢀ  
–40°Cꢀtoꢀ+85°C.ꢀ  
No.  
1.1ꢀ  
1.2ꢀ  
Parameters  
Test Conditions  
Pin  
Symbol  
VDD18ꢀ  
VDDIOꢀ  
Min.  
1.65ꢀ  
1.65ꢀ  
Typ.  
Max.  
1.95ꢀ  
3.6ꢀ  
Unit  
Vꢀ  
DCꢀsupplyꢀvoltageꢀcoreꢀ  
DCꢀsupplyꢀvoltageꢀVDDIOꢀ  
1
VDD18ꢀ  
VDDIOꢀ  
1.8ꢀ  
1.8ꢀ/ꢀ  
3.3ꢀ  
Vꢀ  
domainꢀ ꢀ  
2
1.3ꢀ  
1.4ꢀ  
DCꢀsupplyꢀvoltageꢀUSBꢀ ꢀ  
VDD_USBꢀ  
VBAT18ꢀ  
VDD_USBꢀ  
VBAT18ꢀ  
3.0ꢀ  
3.3ꢀ  
1.8ꢀ  
3.6ꢀ  
Vꢀ  
Vꢀ  
DCꢀsupplyꢀvoltageꢀ  
3
1.65ꢀ  
1.95ꢀ  
backupꢀdomainꢀ ꢀ  
1.5ꢀ  
1.6ꢀ  
1.7ꢀ  
1.8ꢀ  
1.9ꢀ  
DCꢀoutputꢀvoltageꢀ  
VDD18ꢀ  
V
V
V
V
V
V
0ꢀ  
VDD18ꢀ Vꢀ  
VDDIOꢀ Vꢀ  
O,18  
DCꢀoutputꢀvoltageꢀ  
VDDIOꢀ  
0ꢀ  
O,IO  
Low-levelꢀinputꢀvoltageꢀ  
VDD18ꢀdomainꢀ  
VDD18ꢀ=ꢀ1.65…1.95Vꢀ  
VDD18ꢀ=ꢀ1.65…1.95Vꢀ  
-0.3ꢀ  
0.3ꢀxꢀ  
VDD18ꢀ  
VDD18 Vꢀ  
+ꢀ0.3ꢀ  
Vꢀ  
IL,18  
High-levelꢀinputꢀvoltageꢀ  
VDD18ꢀdomainꢀ  
0.7ꢀxꢀ  
IH,18  
VDD18ꢀ  
SchmittꢀTriggerꢀthresholdꢀ VDD18ꢀ=ꢀ1.65…1.95Vꢀ  
risingꢀ  
CLK23ꢀ  
CLK23ꢀ  
0.7ꢀxꢀ  
Vꢀ  
th+,CLK23  
VDD18ꢀ  
1.10ꢀ SchmittꢀTriggerꢀthresholdꢀ VDD18ꢀ=ꢀ1.65…1.95Vꢀ  
fallingꢀ  
0.3ꢀxꢀ  
Vꢀ  
th-,CLK23  
VDD18ꢀ  
1.11ꢀ SchmittꢀTriggerꢀhysteresisꢀ VDD18ꢀ=ꢀ1.65…1.95Vꢀ  
CLK23ꢀ  
V
V
0.3ꢀ  
0.8ꢀ  
0.55ꢀ  
1.3ꢀ  
Vꢀ  
Vꢀ  
hyst,CLK23  
1.12ꢀ SchmittꢀTriggerꢀthresholdꢀ VDD18ꢀ=ꢀ1.65…1.95Vꢀ  
risingꢀ  
NRESETꢀ  
th+,NRESET  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
ElectricalꢀSpecificationsꢀ  
Page 16ꢀ  
your position is our focus  
No.  
1.13ꢀ SchmittꢀTriggerꢀthresholdꢀ VDD18ꢀ=ꢀ1.65…1.95Vꢀ  
fallingꢀ  
Parameters  
Test Conditions  
Pin  
Symbol  
Min.  
Typ.  
Max.  
Unit  
NRESETꢀ  
V
V
V
V
V
V
0.46ꢀ  
0.77ꢀ  
Vꢀ  
th-,NRESET  
1.14ꢀ Low-levelꢀinputꢀvoltageꢀ  
VDDIOꢀdomainꢀ  
VDDIOꢀ=ꢀ1.65…3.6Vꢀ  
VDDIOꢀ=ꢀ1.65…3.6Vꢀ  
VBAT18ꢀ=ꢀ1.65…1.95Vꢀ  
VBAT18ꢀ=ꢀ1.65…1.95Vꢀ  
-0.3ꢀ  
1.46ꢀ  
-0.3ꢀ  
1.46ꢀ  
-0.3ꢀ  
+0.41ꢀ  
5.0ꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
IL,IO  
1.15ꢀ High-levelꢀinputꢀvoltageꢀ  
VDDIOꢀdomainꢀ  
IH,IO  
1.16ꢀ Low-levelꢀinputꢀvoltageꢀ  
VBATꢀdomainꢀ  
P9,ꢀP13,ꢀP22,ꢀ  
P31ꢀ  
+0.41ꢀ  
5.0ꢀ  
IL,BAT  
1.17ꢀ High-levelꢀinputꢀvoltageꢀ  
VBATꢀdomainꢀ  
P9,ꢀP13,ꢀP22,ꢀ  
P31ꢀ  
IH,BAT  
1.18ꢀ Low-levelꢀinputꢀvoltageꢀ  
USBꢀ  
VDD_USBꢀ=ꢀ3.0…3.6Vꢀ  
39ꢀꢀsourceꢀresistanceꢀ  
27ꢀꢀext.ꢀseriesꢀresistorꢀ  
DP,ꢀDMꢀ  
+0.8ꢀ  
IL,USB  
1.19ꢀ High-levelꢀinputꢀvoltageꢀ  
USBꢀ  
VDD_USBꢀ=ꢀ3.0…3.6Vꢀ  
DP,ꢀDMꢀ  
V
V
V
V
V
V
V
V
2.0ꢀ  
4.6ꢀ  
0.4ꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
IH,USB  
1.20ꢀ Low-levelꢀoutputꢀvoltageꢀ  
VDD18ꢀdomainꢀ  
I ꢀ=ꢀ1.5ꢀmA,ꢀ  
OL  
OL,18  
VDD18=1.65Vꢀ  
1.21ꢀ High-levelꢀoutputꢀvoltageꢀ I ꢀ=ꢀ-1.5ꢀmA,ꢀ  
VDD18ꢀ  
-0.45ꢀ  
OH  
OH,18  
VDD18ꢀdomainꢀ  
VDD18=1.65Vꢀ  
1.22ꢀ Low-levelꢀoutputꢀvoltageꢀ  
VDDIOꢀdomainꢀ  
I ꢀ=ꢀ1.5ꢀmA,ꢀ  
0.4ꢀ  
OL  
OL,IO  
VDDIO=3.0Vꢀ  
1.23ꢀ High-levelꢀoutputꢀvoltageꢀ I ꢀ=ꢀ-1.5ꢀmA,ꢀ  
VDDIOꢀ  
-0.5ꢀ  
OH  
OH,IO  
VDDIOꢀdomainꢀ  
VDDIO=3.0Vꢀ  
1.24ꢀ Low-levelꢀoutputꢀvoltageꢀ  
VBAT18ꢀdomainꢀ  
I ꢀ=ꢀ1ꢀmAꢀ  
P9,ꢀP13,ꢀP22,ꢀ  
P31ꢀ  
0.4ꢀ  
OL  
OL,BAT  
1.25ꢀ High-levelꢀoutputꢀvoltageꢀ I ꢀ=ꢀ-1ꢀmAꢀ  
P9,ꢀP13,ꢀP22,ꢀ  
P31ꢀ  
1.2ꢀ  
OH  
OH,BAT  
VBAT18ꢀdomainꢀ  
1.26ꢀ Low-levelꢀoutputꢀvoltageꢀ  
USBꢀ  
I ꢀ=ꢀ2.2ꢀmA,ꢀ  
DP,ꢀDMꢀ  
DP,ꢀDMꢀ  
0.3ꢀ  
OL  
OL,USB  
VDD_USBꢀ=ꢀ3.0...3.6Vꢀ  
27ꢀext.ꢀseriesꢀresistorꢀ  
1.27ꢀ High-levelꢀoutputꢀvoltageꢀ I ꢀ=ꢀ-0.2ꢀmA,ꢀ  
V
2.8ꢀ  
Vꢀ  
OL  
OH,USB  
USBꢀ  
VDD_USBꢀ=ꢀ3.0...3.6Vꢀ  
27ꢀext.ꢀseriesꢀresistorꢀ  
VDD18ꢀ=ꢀ1.95Vꢀ  
1.28ꢀ Inputꢀleakageꢀcurrentꢀ  
I
-1ꢀ  
1ꢀ  
µAꢀ  
LEAK  
(standardꢀinputsꢀandꢀI/Os)ꢀ V ꢀ=ꢀ0Vꢀ  
IL  
1.29ꢀ Inputꢀcapacitanceꢀ  
1.30ꢀ Inputꢀpull-upꢀresistorꢀ  
1.31ꢀ Inputꢀpull-upꢀresistorꢀ  
I
10ꢀ  
1.8ꢀ  
18ꢀ  
pFꢀ  
CAP  
NRESETꢀ  
R ꢀ  
0.7ꢀ  
7ꢀ  
Kꢀ  
Kꢀ  
PU  
TCK,ꢀTDI,ꢀ  
TMSꢀ  
R ꢀ  
PU  
1.32ꢀ Inputꢀpull-upꢀresistorꢀ  
1.33ꢀ Inputꢀpull-downꢀresistorꢀ  
1.34ꢀ Inputꢀpull-downꢀresistorꢀ  
P9,ꢀP13,ꢀP22,ꢀ R ꢀ  
100ꢀ  
7ꢀ  
235ꢀ  
17ꢀ  
Kꢀ  
Kꢀ  
Kꢀ  
Kꢀ  
Kꢀ  
Kꢀ  
Kꢀ  
PU  
P31ꢀ  
DBG_EN,ꢀ  
NTRSTꢀ  
R ꢀ  
PD  
RF_ON,ꢀP0,ꢀ  
P15,ꢀP30ꢀ  
R ꢀ  
100ꢀ  
50ꢀ  
235ꢀ  
160ꢀ  
160ꢀ  
1.575ꢀ  
3.09ꢀ  
PD  
P1,ꢀP2,ꢀP8,ꢀ  
P12,ꢀP14,ꢀ  
1.35ꢀ Configurableꢀinputꢀpull-  
upꢀresistorꢀ  
R
CPU  
P16…P21,ꢀ  
P23…P27,ꢀP29ꢀ  
1.36ꢀ Configurableꢀinputꢀpull-  
downꢀresistorꢀ  
R
40ꢀ  
CPD  
1.37ꢀ Configurableꢀinputꢀpull-  
upꢀresistorꢀ(idleꢀstate)ꢀ  
USB_DPꢀ  
USB_DPꢀ  
R
0.9ꢀ  
1.425ꢀ  
CPU  
1.38ꢀ Configurableꢀinputꢀpull-  
upꢀresistorꢀ(operationꢀ  
state)ꢀ  
R
CPU  
1.39ꢀ Inputꢀpull-downꢀresistorꢀ  
USB_DP,ꢀ  
USB_DMꢀ  
R ꢀ  
10ꢀ  
500ꢀ  
Kꢀ  
PD  
1
Notes:ꢀ  
ꢀꢀVDDIOꢀisꢀtheꢀsupplyꢀvoltageꢀforꢀtheꢀfollowingꢀGPIO-pins:ꢀP1,ꢀP2,ꢀP8,ꢀP12,ꢀP14,ꢀP16,ꢀP17,ꢀP18,ꢀP19,ꢀP20,ꢀP21,ꢀP23,ꢀP24,ꢀP25,ꢀP26,ꢀP27,ꢀP29ꢀ  
ꢀꢀValuesꢀdefinedꢀforꢀoperatingꢀtheꢀUSBꢀinterface.ꢀOtherwiseꢀVDD_USBꢀmayꢀbeꢀconnectedꢀtoꢀgroundꢀ  
ꢀꢀSupplyꢀvoltageꢀVBAT18ꢀforꢀbackupꢀdomainꢀisꢀgeneratedꢀinternallyꢀbyꢀtheꢀLDOBATꢀ  
2
3
Table 8-2: Operating Conditions  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
ElectricalꢀSpecificationsꢀ  
Page 17ꢀ  
your position is our focus  
8.3 Power Consumption  
Mode  
Conditions  
Typ.  
Unit  
mAꢀ  
mAꢀ  
mAꢀ  
mAꢀ  
1
Sleepꢀ  
Atꢀ1.8V,ꢀnoꢀCLK23ꢀ  
RTC,ꢀbackupꢀSRAMꢀandꢀLDOBATꢀ  
Satelliteꢀacquisitionꢀ  
0.065ꢀ ꢀ  
1
Shutdownꢀ  
Normalꢀ  
0.007ꢀ ꢀ  
25ꢀ  
14ꢀ  
Normalꢀtrackingꢀonꢀ6ꢀchannelsꢀwithꢀ1ꢀfix/s;ꢀeachꢀadditionalꢀactiveꢀ  
trackingꢀchannelꢀaddsꢀ0.5ꢀmAꢀ  
Allꢀchannelsꢀdisabledꢀ  
11ꢀ  
mAꢀ  
1
Note:ꢀ ꢀSpecifiedꢀvalueꢀonlyꢀ  
Table 8-3: Power Consumption  
8.4 LDO18  
TheꢀLDO18ꢀisꢀaꢀbuilt-inꢀlowꢀdropoutꢀvoltageꢀregulatorꢀwhichꢀcanꢀbeꢀusedꢀifꢀtheꢀhostꢀsystemꢀdoesꢀnotꢀprovideꢀtheꢀ  
coreꢀvoltageꢀVDD18.ꢀ  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
3.6ꢀ  
1.95ꢀ  
80ꢀ  
Unit  
Vꢀ  
Supplyꢀvoltageꢀ(LDO_IN)ꢀ  
Outputꢀvoltageꢀ(LDO_OUT)ꢀ  
Outputꢀcurrentꢀ(LDO_OUT)ꢀ  
Currentꢀconsumptionꢀ  
Currentꢀconsumptionꢀ  
2.3ꢀ  
1.65ꢀ  
1.8ꢀ  
Vꢀ  
mAꢀ  
µAꢀ  
µAꢀ  
Afterꢀstart-up,ꢀnoꢀload,ꢀatꢀroomꢀtemperatureꢀ  
80ꢀ  
Standbyꢀmodeꢀ(LDO_ENꢀ=ꢀ0),ꢀatꢀroomꢀ  
temperatureꢀ  
1ꢀ  
5ꢀ  
Table 8-4: Electrical Characteristics of LDO18  
8.5 LDOBAT and Backup Domain  
TheLDOBATisabuilt-inlowdropoutvoltageꢀregulatorꢀwhichꢀprovidesꢀtheꢀsupplyꢀvoltageꢀforꢀVBAT18ꢀforꢀtheꢀ  
RTC,ꢀbackupꢀSRAM,ꢀP9,ꢀP13,ꢀP22,ꢀP31,ꢀNSLEEPꢀandꢀNSHDN.ꢀꢀTheꢀLDOBATꢀvoltageꢀregulatorꢀswitchesꢀinꢀbatteryꢀ  
modeꢀifꢀLDOBAT_INꢀfallsꢀbelowꢀ1.5ꢀVꢀ  
Parameter  
Conditions  
Min.  
2.3ꢀ  
1.5ꢀ  
1.65ꢀ  
Typ.  
Max.  
3.6ꢀ  
3.6ꢀ  
1.95ꢀ  
1.5ꢀ  
15ꢀ  
Unit  
Vꢀ  
SupplyꢀvoltageꢀLDOBAT_INꢀ  
SupplyꢀvoltageꢀVBATꢀ  
Outputꢀvoltageꢀ(VBAT18)ꢀ  
Outputꢀcurrentꢀ(VBAT18)ꢀ  
Vꢀ  
IfꢀswitchꢀconnectsꢀtoꢀLDOBAT_Nꢀ  
Noꢀexternalꢀloadꢀallowedꢀ  
1.8ꢀ  
Vꢀ  
mAꢀ  
µAꢀ  
1
CurrentꢀconsumptionꢀLDOBAT_INꢀ ꢀ  
Afterꢀstart-upꢀ(sleep/backupꢀmode),ꢀatꢀroomꢀ  
temperatureꢀ  
1
CurrentꢀconsumptionꢀVBAT_INꢀ ꢀ  
Afterꢀstart-upꢀ(backupꢀmodeꢀandꢀLDOBAT_INꢀ  
=ꢀ0V),ꢀatꢀroomꢀtemperatureꢀ  
10ꢀ  
µAꢀ  
Currentꢀconsumptionꢀ  
Afterꢀstart-upꢀ(normalꢀmode),ꢀatꢀroomꢀ  
temperatureꢀ  
1.5ꢀ  
mAꢀ  
1
Note:ꢀ ꢀꢀIfꢀnoꢀcurrentꢀisꢀcausedꢀbyꢀoutputsꢀ(padꢀoutputꢀcurrentꢀasꢀwellꢀasꢀcurrentꢀacrossꢀinternalꢀpull-upꢀresistors)ꢀ  
Table 8-5: Electrical Characteristics of LDOBAT  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
ElectricalꢀSpecificationsꢀ  
Page 18ꢀ  
your position is our focus  
8.6 ESD Characteristics  
Parameters  
Symbol  
Max. with OSC Pins Max without  
Unit  
OSC pins  
1000ꢀ  
200ꢀ  
ESDꢀlevelꢀHBMꢀ(HumanꢀBodyꢀModel)ꢀ  
ESDꢀlevelꢀMMꢀ(MachineꢀModel)ꢀ  
VHBMꢀ  
VMMꢀ  
VCDMꢀ  
750ꢀ  
150ꢀ  
250ꢀ  
Vꢀ  
Vꢀ  
Vꢀ  
ESDꢀlevelꢀCDMꢀ(ChargedꢀDeviceꢀModel)ꢀ  
500ꢀ  
Table 8-6: ESD Sensitivity  
9 Ordering Information  
Ordering No.  
Product  
ATR0622ꢀ  
ATR0622N-PYQWꢀ  
ANTARISꢀ4ꢀGPSꢀBasebandꢀProcessor,ꢀROM-BasedꢀFirmwareꢀVꢀ5.00ꢀ  
DeliveryꢀPacking:ꢀ  
Tapedꢀandꢀreeled,ꢀMPQꢀ2000ꢀ  
ATR0625ꢀ  
ATR0625-PYQWꢀ  
ANTARISꢀ4ꢀGPSꢀBasebandꢀProcessor,ꢀROM-BasedꢀFirmwareꢀVꢀ5.00ꢀ  
withꢀSuperSenseꢀ  
DeliveryꢀPacking:ꢀ  
Tapedꢀandꢀreeled,ꢀMPQꢀ2000ꢀ  
Table 9-1: Ordering Information  
Partsꢀofꢀthisꢀproductꢀareꢀpatentꢀprotected.ꢀ  
ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheetꢀ  
GPS.G4-X-06008-P2ꢀ  
Preliminaryꢀ  
OrderingꢀInformationꢀ  
Page 19ꢀ  
your position is our focus  
Related Documents  
[1]ꢀ  
ANTARISꢀ4ꢀGPSꢀChipset:ꢀANTARISꢀ4ꢀReceiverꢀDescription,ꢀDocuꢀNo.ꢀGPS.G5-DK-06004ꢀ  
ANTARISꢀ4ꢀProtocolꢀSpecification,ꢀDocu.ꢀNoꢀGPS.G3-X-03002ꢀ  
[2]ꢀ  
Contact  
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ATR0622,ꢀATR0625ꢀ-ꢀDataꢀSheet  
GPS.G4-X-06008-P2  
Page 20ꢀ  

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