DMP3098L [TYSEMI]
P-CHANNEL ENHANCEMENT MODE MOSFET Low Input/Output Leakage; P沟道增强型MOSFET的低输入/输出泄漏
| 型号： | DMP3098L |
| 厂家： | 
TY Semiconductor Co., Ltd |
| 描述： | P-CHANNEL ENHANCEMENT MODE MOSFET Low Input/Output Leakage |
| 文件： | 总2页 (文件大小：144K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product specification
DMP3098L
P-CHANNEL ENHANCEMENT MODE MOSFET
Product Summary
Features and Benefits
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Low On-Resistance
Low Gate Threshold Voltage
Low Input Capacitance
Fast Switching Speed
Low Input/Output Leakage
Lead Free By Design/RoHS Compliant (Note 1)
"Green" Device (Note 2)
ID
V(BR)DSS
RDS(on) max
TA = 25°C
-3.8A
-3.0A
70mΩ@ VGS = -10V
120mΩ@ VGS =-4.5V
-30V
Qualified to AEC-Q101 Standards for High Reliability
Mechanical Data
Description and Applications
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Case: SOT23
This new generation MOSFET has been designed to minimize the on-
state resistance (RDS(on)) and yet maintain superior switching
performance, making it ideal for high efficiency power management
applications.
Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish ⎯ Matte Tin annealed over Copper leadframe.
Solderable per MIL-STD-202, Method 208
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Power management functions
Analog Switch
Load Switch
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Terminal Connections: See Diagram
Weight: 0.008 grams (approximate)
Boost Switch
Drain
SOT-23
D
Gate
S
G
Source
EQUIVALENT CIRCUIT
Top View
Pin Configuration
Ordering Information (Note 3)
Part Number
Case
Packaging
DMP3098L-7
SOT23
3000/Tape & Reel
Notes:
1. No purposefully added lead.
Marking Information
DMB = Product Type Marking Code
YM = Date Code Marking
Y = Year (ex: V = 2008)
DMB
M = Month (ex: 9 = September)
Date Code Key
Year
2008
2009
2010
2011
2012
2013
2014
2015
Code
V
W
X
Y
Z
A
B
C
Month
Code
Jan
1
Feb
2
Mar
3
Apr
4
May
5
Jun
6
Jul
7
Aug
8
Sep
9
Oct
O
Nov
N
Dec
D
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Product specification
DMP3098L
Maximum Ratings @TA = 25°C unless otherwise specified
Characteristic
Drain-Source Voltage
Symbol
VDSS
Value
-30
Units
V
V
Gate-Source Voltage
±20
VGSS
T
A = 25°C
Steady
State
-3.8
-2.9
A
A
Drain Current (Note 4) VGS = -10V
Pulsed Drain Current (Note 5)
ID
TA = 70°C
-11
IDM
Thermal Characteristics @TA = 25°C unless otherwise specified
Characteristic
Total Power Dissipation (Note 4)
Symbol
PD
Rθ
Value
1.08
Units
W
115
°C/W
°C
Thermal Resistance, Junction to Ambient @TA = 25°C (Note 4)
Operating and Storage Temperature Range
JA
-55 to +150
TJ, TSTG
Electrical Characteristics @TA = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (Note 6)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Source Leakage
Symbol
Min
Typ
Max
Unit
Test Condition
-30
⎯
⎯
V
BVDSS
IDSS
IGSS
⎯
⎯
⎯
⎯
-800
VGS = 0V, ID = -250μA
VDS = -30V, VGS = 0V
VGS = ±20V, VDS = 0V
nA
nA
±100
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage
-1.0
-1.8
-2.1
V
VGS(th)
VDS = VGS, ID = -250μA
GS = -10V, ID = -3.8A
V
56
98
70
120
Static Drain-Source On-Resistance
RDS (ON)
⎯
mΩ
VGS = -4.5V, ID = -3.0A
VDS = -5V, ID = -2.7A
VGS = 0V, IS = -2.7A
Forward Transfer Admittance
Diode Forward Voltage (Note 6)
DYNAMIC CHARACTERISTICS (Note 7)
Input Capacitance
3.6
S
V
|Yfs|
VSD
⎯
⎯
⎯
-1.26
⎯
336
70
1008
210
147
⎯
pF
pF
pF
Ω
Ciss
Coss
Crss
RG
⎯
⎯
⎯
⎯
Output Capacitance
VDS = -25V, VGS = 0V, f = 1.0MHz
VGS = 0V VDS = 0V, f = 1MHz
Reverse Transfer Capacitance
Gate Resistance
49
4.6
SWITCHING CHARACTERISTICS (Note 7)
VDS = -15V, VGS = -4.5V,
ID = -3.8A
4.0
8.0
⎯
Total Gate Charge
Qg
7.8
1.0
2.5
6.0
5.0
17.6
9.5
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
12.0
10.0
35.2
19.0
nC
ns
V
DS = -15V, VGS = -10V,
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Qgs
Qgd
td(on)
tr
I
D = -3.8A
VDS = -15V, VGS = -10V,
ID = -1A, RG = 6.0Ω
Turn-Off Delay Time
Fall Time
td(off)
tf
Notes:
2. Device mounted on FR-4 PCB on 2 oz., 0.5 in.2 copper pads and t ≤5 sec.
3. Pulse width ≤10μS, Duty Cycle ≤1%.
4. Short duration pulse test used to minimize self-heating effect.
5. Guaranteed by design. Not subject to production testing.
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