DMN3051L [TYSEMI]
N-CHANNEL ENHANCEMENT MODE MOSFET Low Gate Threshold Voltage; N沟道增强型MOSFET低栅极阈值电压
| 型号： | DMN3051L |
| 厂家： | 
TY Semiconductor Co., Ltd |
| 描述： | N-CHANNEL ENHANCEMENT MODE MOSFET Low Gate Threshold Voltage |
| 文件： | 总2页 (文件大小：227K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product specification
DMN3051L
N-CHANNEL ENHANCEMENT MODE MOSFET
Product Summary
Features and Benefits
•
•
•
•
•
•
•
•
Low On-Resistance:
Low Gate Threshold Voltage
Low Input Capacitance
Fast Switching Speed
ID
V(BR)DSS
RDS(ON)
TA = 25°C
5.8A
4.5A
38mΩ @ VGS = -10V
64mΩ @ VGS = -4.5V
30V
Low Input/Output Leakage
Lead-Free Finish; RoHS compliant (Note 1)
Halogen and Antimony Free. “Green” Device (Note 2)
Qualified to AEC-Q101 Standards for High Reliability
Description and Applications
Mechanical Data
This new generation MOSFET has been designed to minimize the
on-state resistance (RDS(on)) and yet maintain superior switching
performance, making it ideal for high efficiency power management
applications.
•
•
Case: SOT23
Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish – Matte Tin annealed over Copper
leadframe. Solderable per MIL-STD-202, Method 208
Terminal Connections: See Diagram
Weight: 0.008 grams (approximate)
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•
•
•
•
Load Switch
DC-DC Converters
Power management functions
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•
SOT23
Drain
D
Gate
S
G
Source
Top View
Equivalent Circuit
Top View
Ordering Information (Note 3)
Part Number
Case
Packaging
DMN3051L-7
SOT23
3000/Tape & Reel
Notes:
1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. No purposely added lead. Halogen and Antimony free
Marking Information
3N5 = Product Type Marking Code
YM = Date Code Marking
Y = Year (ex: U = 2007)
3N5
M = Month (ex: 9 = September)
Date Code Key
Year
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
Code
U
V
W
X
Y
Z
A
B
C
D
E
Month
Code
Jan
1
Feb
2
Mar
3
Apr
4
May
5
Jun
6
Jul
7
Aug
8
Sep
9
Oct
O
Nov
N
Dec
D
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Product specification
DMN3051L
Maximum Ratings @TA = 25°C unless otherwise specified
Characteristic
Drain-Source Voltage
Symbol
VDSS
Value
30
Units
V
V
Gate-Source Voltage
±20
VGSS
T
T
A = 25°C
A = 70°C
Steady
State
4.5
3.5
A
A
ID
Continuous Drain Current (Note 5) VGS = 10V
TA = 25°C
TA = 70°C
5.8
4.9
t<5s
ID
IDM
IS
20
2
A
A
Pulsed Drain Current (10μs pulse, duty cycle = 1%)
Maximum Body Diode Forward Current (Note 5)
Thermal Characteristics
Characteristic
Symbol
PD
Value
Units
0.7
0.44
182
109
1.4
0.85
94
T
A = 25°C
Total Power Dissipation (Note 4)
W
TA = 70°C
Steady state
t < 5s
Thermal Resistance, Junction to Ambient (Note 4)
Total Power Dissipation (Note 5)
°C/W
W
Rθ
JA
TA = 25°C
PD
TA = 70°C
Steady state
t < 5s
Thermal Resistance, Junction to Ambient (Note 5)
Rθ
JA
56
25
°C/W
°C
Thermal Resistance, Junction to Case (Note 5)
Operating and Storage Temperature Range
Rθ
JC
-55 to +150
TJ, TSTG
Electrical Characteristics @TA = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (Note 6)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Symbol
Min
Typ
Max
Unit
Test Condition
30
V
BVDSS
IDSS
⎯
⎯
⎯
800
VGS = 0V, ID = 250μA
VDS = 28V, VGS = 0V
VGS = ±12V, VDS = 0V
VGS = ±20V, VDS = 0V
nA
⎯
±80
±800
Gate-Body Leakage
nA
IGSS
⎯
⎯
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage
1.3
1.9
2.2
V
VGS(th)
VDS = VGS, ID = 250μA
VGS = 10V, ID = 5.8A
VGS = 4.5V, ID = 5.0A
VDS = 5V, ID = 3.1A
VGS = 0V, IS = 2.0A
⎯
⎯
⎯
⎯
33
54
38
64
Static Drain-Source On-Resistance
RDS (ON)
mΩ
Forward Transconductance
Source-Drain Diode Forward Voltage
DYNAMIC CHARACTERISTICS (Note 7)
Input Capacitance
5
S
V
|Yfs|
VSD
⎯
1.16
0.78
424
115
81
1.51
9.0
pF
pF
pF
Ω
Ciss
Coss
Crss
Rg
⎯
⎯
⎯
-
⎯
⎯
⎯
-
VDS = 5V, VGS = 0V
f = 1.0MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V
DS = 0V, VGS = 0V, f = 1MHz
-
-
Total Gate Charge
nC
nC
nC
ns
ns
ns
ns
Qg
-
1.3
-
Gate-Source Charge
Qgs
Qgd
tD(on)
tr
VGS = 10V, VDS = 15V, ID = 5.8A
-
1.3
-
Gate-Drain Charge
3.4
Turn-On Delay Time
-
-
-
-
-
-
-
-
6.2
Turn-On Rise Time
VDD = 15V, VGS = 10V,
RL = 2.6ꢀ, RG = 3ꢀ
13.9
2.8
Turn-Off Delay Time
tD(off)
tf
Turn-Off Fall Time
Notes:
2. Device mounted on FR-4 PCB with minimum recommended pad layout, single sided.
3. Device mounted on 1” x 1” FR-4 PCB with high coverage 2 oz. Copper, single sided.
4. Short duration pulse test used to minimize self-heating effect.
5. Guaranteed by design. Not subject to production testing.
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