JM3851010902BCA [TI]
DUAL PRECISION TIMERS; 双路精密定时器![JM3851010902BCA](http://pdffile.icpdf.com/pdf1/p00200/img/icpdf/JM3851_1130892_icpdf.jpg)
型号: | JM3851010902BCA |
厂家: | ![]() |
描述: | DUAL PRECISION TIMERS |
文件: | 总19页 (文件大小:755K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G–APRIL 1978–REVISED JUNE 2006
FEATURES
NA556...D OR N PACKAGE
NE556...D, N, OR NS PACKAGE
SA556...D OR N PACKAGE
SE556...J PACKAGE
•
•
•
Two Precision Timing Circuits Per Package
Astable or Monostable Operation
(TOP VIEW)
TTL-Compatible Output Can Sink or Source
up to 150 mA
1DISCH
1THRES
1CONT
1RESET
1OUT
V
1
2
3
4
5
6
7
14
13
12
11
10
9
•
•
Active Pullup or Pulldown
CC
2DISCH
2THRES
2CONT
2RESET
2OUT
Designed to Be Interchangeable With
Signetics NE556, SA556, and SE556
APPLICATIONS
•
1TRIG
GND
Precision Timers From Microseconds to
Hours
2TRIG
8
•
•
•
•
•
•
•
•
•
•
•
Pulse-Shaping Circuits
Missing-Pulse Detectors
Tone-Burst Generators
Pulse-Width Modulators
Pulse-Position Modulators
Sequential Timers
Pulse Generators
Frequency Dividers
Application Timers
Industrial Controls
Touch-Tone Encoders
DESCRIPTION/ORDERING INFORMATION
These devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555 type in each
package. These circuits can be operated in the astable or the monostable mode with external resistor-capacitor
(RC) timing control. The basic timing provided by the RC time constant can be controlled actively by modulating
the bias of the control-voltage input.
The threshold (THRES) and trigger (TRIG) levels normally are two-thirds and one-third, respectively, of VCC
.
These levels can be altered by using the control voltage (CONT) terminal. When the trigger input falls below
trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the
threshold input is above the threshold level, the flip-flop is reset, and the output is low. The reset (RESET) input
can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop
is reset and the output goes low. When the output is low, a low-impedance path is provided between the
discharge (DISCH) terminal and ground (GND).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1978–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G–APRIL 1978–REVISED JUNE 2006
ORDERING INFORMATION
VT (MAX)
VCC = 15 V
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP – N
Tube of 25
NE556N
NE556D
NE556DR
NE556NSR
SA556N
NA556N
NA556D
NA556DR
SE556J
NE556N
Tube of 50
Reel of 2500
Reel of 2000
Tube of 25
Tube of 25
Tube of 50
Reel of 2500
0°C to 70°C
11.2 V
SOIC – D
NE556
SOP – NS
PDIP – N
PDIP – N
NE556
–40°C to 85°C
–40°C to 105°C
11.2 V
11.2 V
SA556N
NA556N
SOIC – D
CDIP – J
NA556
SE556J
–55°C to 125°C
10.6 V
Tube of 25
SE556JB
SE556JB
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each timer)
TRIGGER
THRESHOLD
VOLTAGE(1)
DISCHARGE
SWITCH
RESET
OUTPUT
VOLTAGE(1)
Low
High
High
High
Irrelevant
<1/3 VDD
>1/3 VDD
>1/3 VDD
Irrelevant
Irrelevant
>2/3 VDD
<2/3 VDD
Low
High
Low
On
Off
On
As previously established
(1) Voltage levels shown are nominal.
FUNCTIONAL BLOCK DIAGRAM, EACH TIMER
V
CC
RESET
THRES
CONT
OUT
TRIG
DISCH
GND
RESET can override TRIG, which can override THRES.
2
Submit Documentation Feedback
NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G–APRIL 1978–REVISED JUNE 2006
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
18
UNIT
V
VCC
VI
Supply voltage(2)
Input voltage
CONT, RESET, THRES, and TRIG
VCC
±225
86
V
IO
Output current
mA
D package
N package
NS package
J package
θJA
Package thermal impedance(3)(4)
80
°C/W
76
θJC
Package thermal impedance(5)(6)
15.05
150
300
260
150
°C/W
°C
TJ
Operating virtual junction temperature
Lead temperature 1,6 mm (1/16 in) from case for 60 s
Lead temperature 1,6 mm (1/16 in) from case for 10 s
Storage temperature range
J package
°C
D, N, or NS package
°C
Tstg
–65
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
(5) Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) – TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
(6) The package thermal impedance is calculated in accordance with MIL-STD-883.
Recommended Operating Conditions
MIN
4.5
MAX
16
UNIT
NA556, NE556, SA556
SE556
VCC
Supply voltage
V
4.5
18
VI
IO
Input voltage
CONT, RESET, THRES, and TRIG
VCC
±200
105
70
V
Output current
mA
NA556
NE556
SA556
SE556
–40
0
TA
Operating free-air temperature
°C
–40
–55
85
125
3
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NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G–APRIL 1978–REVISED JUNE 2006
Electrical Characteristics
VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted)
NA556
NE556
SA556
SE556
PARAMETER
TEST CONDITIONS
UNIT
MIN
8.8
TYP
10
3.3
30
5
MAX
11.2
4.2
MIN
9.4
TYP
10
3.3
30
5
MAX
10.6
4
VCC = 15 V
Threshold voltage
level
VT
IT
V
VCC = 5 V
2.4
2.7
Threshold current(1)
Trigger voltage level
Trigger current
250
5.6
250
5.2
6
nA
4.5
1.1
4.8
3
VCC = 15 V
TA = –55°C to 125°C
TA = –55°C to 125°C
VTRIG
V
1.67
2.2
1.45
1.67
1.9
1.9
0.9
1
VCC = 5 V
ITRIG
TRIG at 0 V
0.5
0.7
2
1
0.5
0.7
µA
0.3
0.3
VRESET Reset voltage level
IRESET Reset current
V
TA = –55°C to 125°C
RESET at VCC
1.1
0.4
–1
0.1
0.4
1.5
0.1
mA
nA
RESET at 0 V
–0.4
–0.4
Discharge switch
IDISCH
20
10
100
11
20
10
100
off-state current
9
9.6
9.6
2.9
2.9
10.4
10.4
3.8
3.8
0.15
0.2
0.5
1
VCC = 15 V
TA = –55°C to 125°C
Control voltage
VCONT
V
(open circuit)
2.6
3.3
0.1
0.4
2
4
0.25
0.75
2.5
3.3
0.1
0.4
2
VCC = 5 V
TA = –55°C to 125°C
TA = –55°C to 125°C
TA = –55°C to 125°C
TA = –55°C to 125°C
VCC = 15 V,
IOL = 10 mA
VCC = 15 V,
IOL = 50 mA
2.2
2.7
VCC = 15 V,
IOL = 100 mA
Low-level
VOL
V
output voltage
VCC = 15 V, IOL = 200 mA
VCC = 5 V,
IOL = 3.5 mA
2.5
2.5
TA = –55°C to 125°C
0.35
0.1
0.25
0.3
0.1
0.15
0.8
VCC = 5 V,
IOL = 5 mA
TA = –55°C to 125°C
VCC = 5 V, IOL = 8 mA
0.15
13.3
0.15
13.3
0.25
12.75
2.75
13
12
VCC = 15 V,
IOH = –100 mA
TA = –55°C to 125°C
High-level
VOH
VCC = 15 V, IOH = –200 mA
12.5
3.3
12.5
3.3
V
output voltage
3
2
VCC = 5 V,
IOH = –100 mA
TA = –55°C to 125°C
VCC = 15 V
20
6
30
12
26
10
20
6
24
10
20
8
Output low,
No load
VCC = 5 V
ICC
Supply current
mA
VCC = 15 V
18
4
18
4
Output high,
No load
VCC = 5 V
(1) This parameter influences the maximum value of the timing resistors R and RB in the circuit of Figure 1. For example, when VCC = 5 V,
the maximum value is R = RA + RB ≈ 3.4 MΩ, and for VCC = 15 V, the maximum value is ≈ 10 MΩ.
4
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NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G–APRIL 1978–REVISED JUNE 2006
Operating Characteristics
VCC = 5 V and 15 V
NA556
NE556
SA556
SE556
UNIT
TEST
PARAMETER
CONDITIONS(1)
MIN
TYP
MAX
MIN
TYP
MAX
Each timer,
1
3
0.5
1.5(4)
monostable(3)
Initial error of timing
TA = 25°C
interval(2)
Each timer, astable(5)
2.25%
1.5%
Timer 1 – Timer 2
±1
±0.5
Each timer,
50
30
100(4)
monostable(3)
Temperature
coefficient of timing
interval
TA = MIN to MAX
ppm/°C
Each timer, astable(5)
150
90
Timer 1 – Timer 2
±10
±10
Each timer,
0.1
0.5
0.05
0.2(4)
monostable(3)
Supply voltage
sensitivity of timing
interval
TA = 25°C
%/V
Each timer, astable(5)
0.3
0.15
Timer 1 – Timer 2
±0.2
±0.1
CL = 15 pF,
TA = 25°C
Output-pulse rise time
Output-pulse fall time
100
100
300
300
100
100
200(4)
200(4)
ns
ns
CL = 15 pF,
TA = 25°C
(1) For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
(2) Timing-interval error is defined as the difference between the measured value and the average value of a random sample from each
process run.
(3) Values specified are for a device in a monostable circuit similar to Figure 2, with the following component values: RA = 2 kΩ to 100 kΩ,
C = 0.1 µF.
(4) On products compliant to MIL-PRF-38535, this parameter is not production tested.
(5) Values specified are for a device in an astable circuit similar to Figure 1, with the following component values: RA = 1 kΩ to 100 kΩ,
C = 0.1 µF.
5
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NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G–APRIL 1978–REVISED JUNE 2006
APPLICATION INFORMATION
V
CC
V
CC
(5 V to 15 V)
(5 V to 15 V)
Open
(see Note A)
0.01 µF
R
A
CONT
RESET
DISCH
V
CC
R
R
A
CONT
RESET
DISCH
V
CC
R
L
R
L
OUT
OUT
OUT
B
OUT
THRES
TRIG
THRES
TRIG
GND
Input
GND
C
C
NOTE A: Bypassing the control-voltage input to ground with a
capacitor might improve operation. This should be evaluated
for individual applications.
Figure 1. Circuit for Astable Operation
Figure 2. Circuit for Monostable Operation
6
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PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
JM38510/10902BCA
M38510/10902BCA
NA556D
ACTIVE
ACTIVE
ACTIVE
CDIP
CDIP
SOIC
J
J
14
14
14
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
D
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
NA556DG4
NA556DR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
14
14
14
50
Green (RoHS
& no Sb/Br)
2500
2500
Green (RoHS
& no Sb/Br)
NA556DRG4
Green (RoHS
& no Sb/Br)
NA556N
NA556NE4
NE556D
ACTIVE
ACTIVE
ACTIVE
PDIP
PDIP
SOIC
N
N
D
14
14
14
25
25
50
Pb-Free (RoHS)
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
NE556DBR
NE556DBRE4
NE556DBRG4
NE556DE4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
DB
DB
DB
D
14
14
14
14
14
14
14
14
2000
2000
2000
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
NE556DG4
NE556DR
D
50
Green (RoHS
& no Sb/Br)
D
2500
2500
2500
Green (RoHS
& no Sb/Br)
NE556DRE4
NE556DRG4
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
NE556N
ACTIVE
ACTIVE
PDIP
PDIP
N
N
14
14
25
25
Pb-Free (RoHS)
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
NE556NE4
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2012
Status (1)
ACTIVE
ACTIVE
ACTIVE
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
NE556NSR
NE556NSRE4
NE556NSRG4
SO
SO
SO
NS
NS
NS
14
14
14
2000
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
SA556D
SA556DR
SA556N
OBSOLETE
OBSOLETE
ACTIVE
SOIC
SOIC
PDIP
PDIP
LCCC
CDIP
CDIP
D
D
N
N
FK
J
14
14
14
14
20
14
14
TBD
TBD
Call TI
Call TI
Call TI
Call TI
25
25
Pb-Free (RoHS)
Pb-Free (RoHS)
TBD
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
SA556NE4
SE556FKB
SE556J
ACTIVE
OBSOLETE
ACTIVE
Call TI
A42
Call TI
1
1
TBD
N / A for Pkg Type
N / A for Pkg Type
SE556JB
ACTIVE
J
TBD
A42
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2012
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
NA556DR
NE556DBR
NE556DR
NE556NSR
SOIC
SSOP
SOIC
SO
D
DB
D
14
14
14
14
2500
2000
2500
2000
330.0
330.0
330.0
330.0
16.4
16.4
16.4
16.4
6.5
8.2
6.5
8.2
9.0
6.6
2.1
2.5
2.1
2.5
8.0
12.0
8.0
16.0
16.0
16.0
16.0
Q1
Q1
Q1
Q1
9.0
NS
10.5
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
NA556DR
NE556DBR
NE556DR
NE556NSR
SOIC
SSOP
SOIC
SO
D
DB
D
14
14
14
14
2500
2000
2500
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
38.0
38.0
38.0
NS
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
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