ADC0804LCVX [TI]
1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC20, PLASTIC, LCC-20;
| 型号： | ADC0804LCVX |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC20, PLASTIC, LCC-20 转换器 |
| 文件： | 总69页 (文件大小：1173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L6472
dSPIN fully integrated microstepping motor driver
with motion engine and SPI
Features
■ Operating voltage: 8 - 45 V
■ 7.0 A output peak current (3.0 A r.m.s.)
■ Low RDSon power MOSFETs
■ Programmable speed profile
■ Programmable Power MOSFET slew rate
■ Up to 1/16 microstepping
HTSSOP28
POWERSO36
All application commands and data registers,
including those used to set analog values (i.e.
current control value, current protection trip point,
dead time, etc.) are sent through a standard 5-
Mbit/s SPI.
■ Predictive current control with adaptive decay
■ Non-dissipative current sensing
■ SPI interface
■ Low quiescent and standby currents
■ Programmable non-dissipative overcurrent
A very rich set of protections (thermal, low bus
voltage, overcurrent) makes the L6472 “bullet
proof”, as required by the most demanding motor
control applications.
protection on all Power MOSFETs
■ Two levels of overtemperature protection
Applications
Table 1.
Device summary
Package
■ Bipolar stepper motor
Order codes
Packing
L6472H
L6472HTR
L6472PD
HTSSOP28
HTSSOP28
Tube
Description
Tape and reel
Tube
The L6472, realized in analog mixed signal
technology, is an advanced fully integrated
solution suitable for driving two-phase bipolar
stepper motors with microstepping. It integrates a
dual low RDS(on) DMOS full bridge with all of the
power switches equipped with an accurate on-
chip current sensing circuitry suitable for non-
dissipative current control and overcurrent
protection. Thanks to a new current control, a
1/16 microstepping is achieved through an
adaptive decay mode which outperforms
traditional implementations. The digital control
core can generate user defined motion profiles
with acceleration, deceleration, speed or target
position, easily programmed through a dedicated
register set.
POWERSO36
POWERSO36
L6472PDTR
Tape and reel
January 2012
Doc ID 022729 Rev 1
1/69
www.st.com
69
Contents
L6472
Contents
1
2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
2.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1
Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5
6
Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1
6.2
6.3
6.4
Device power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Logic I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Microstepping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.4.1
Automatic full-step mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.5
6.6
Absolute position counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Programmable speed profiles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.6.1
Infinite acceleration/deceleration mode . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.7
Motor control commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6
Constant speed commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Positioning commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Motion commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Stop commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Step-clock mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
GoUntil and ReleaseSW commands . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.8
Internal oscillator and oscillator driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.8.1
6.8.2
Internal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
External clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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Contents
6.9
Overcurrent detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.10 Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.11 Thermal warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.12 Reset and standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.13 External switch (SW pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.14 Programmable DMOS slew rate, dead time and blanking time . . . . . . . . 28
6.15 Integrated analog-to-digital converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.16 Internal voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.17 BUSY\SYNC pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.17.1 BUSY operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.17.2 SYNC operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.18 FLAG pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7
Phase current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.1
7.2
7.3
7.4
Predictive current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Auto-adjusted decay mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Auto-adjusted fast decay during the falling steps . . . . . . . . . . . . . . . . . . . 34
Torque regulation (output current amplitude regulation) . . . . . . . . . . . . . . 35
8
9
Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Programming manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
9.1
Register and flag description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.1.7
9.1.8
9.1.9
ABS_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
EL_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
MARK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
ACC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
MAX_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
MIN_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
FS_SPD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
9.1.10 TVAL_HOLD, TVAL_RUN, TVAL_ACC and TVAL_DEC . . . . . . . . . . . . 42
9.1.11 T_FAST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.1.12 TON_MIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.1.13 TOFF_MIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
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Contents
L6472
9.1.14 ADC_OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.1.15 OCD_TH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.1.16 STEP_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1.17 ALARM_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
9.1.18 CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
9.1.19 STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
9.2
Application commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
9.2.7
9.2.8
9.2.9
Command management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Nop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
SetParam (PARAM, VALUE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
GetParam (PARAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Run (DIR, SPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
StepClock (DIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Move (DIR, N_STEP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
GoTo (ABS_POS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
GoTo_DIR (DIR, ABS_POS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
9.2.10 GoUntil (ACT, DIR, SPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
9.2.11 ReleaseSW (ACT, DIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
9.2.12 GoHome . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
9.2.13 GoMark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
9.2.14 ResetPos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
9.2.15 ResetDevice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
9.2.16 SoftStop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
9.2.17 HardStop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
9.2.18 SoftHiZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
9.2.19 HardHiZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
9.2.20 GetStatus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
10
11
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
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L6472
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Typical application values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
CL values according to external oscillator frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
EL_POS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
MIN_SPEED register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Torque regulation by TVAL_HOLD, TVAL_ACC, TVAL_DEC and TVAL_RUN registers . 43
Maximum fast decay times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Minimum ON time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Minimum OFF time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
ADC_OUT value and torque regulation feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Overcurrent detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
STEP_MODE register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Step mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
SYNC output frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
SYNC signal source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
ALARM_EN register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
CONFIG register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Oscillator management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
External switch hard stop interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Overcurrent event. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Programmable power bridge output slew rate values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
External torque regulation enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Switching period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
STATUS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
STATUS register DIR bit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
STATUS register MOT_STATE bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Application commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
NOP command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
SetParam command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
GetParam command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Run command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
StepClock command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Move command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
GoTo command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
GoTo_DIR command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
GoUntil command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
ReleaseSW command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
GoHome command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
ResetPos command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
ResetDevice command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
SoftStop command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
HardStop command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Table 43.
Table 44.
Table 45.
Table 46.
Table 47.
Table 48.
Doc ID 022729 Rev 1
5/69
List of tables
L6472
Table 49.
Table 50.
Table 51.
Table 52.
Table 53.
Table 54.
SoftHiZ command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
HardHiZ command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
GetStatus command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
HTSSOP28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
POWERSO36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
6/69
Doc ID 022729 Rev 1
L6472
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
HTSSOP28 pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
POWERSO36 pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Bipolar stepper motor control application using the L6472. . . . . . . . . . . . . . . . . . . . . . . . . 19
Charge pump circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Normal mode and microstepping (16 microsteps) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Automatic full-step switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Speed profile in infinite acceleration/deceleration mode . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Constant speed commands examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 10. Positioning command examples. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 11. Motion command examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 12. OSCIN and OSCOUT pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 13. External switch connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 14. Internal 3 V linear regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 15. Predictive current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 16. Non-predictive current control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 17. Adaptive decay - fast decay tuning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 18. Adaptive decay - switch from normal to slow+fast decay mode and vice versa. . . . . . . . . 36
Figure 19. Fast decay tuning during the falling steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 20. SPI timings diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 21. Daisy chain configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 22. Command with 3-byte argument. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 23. Command with 3-byte response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 24. Command response aborted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 25. HTSSOP28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 26. POWERSO36 drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Doc ID 022729 Rev 1
7/69
Block diagram
L6472
1
Block diagram
Figure 1.
Block diagram
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Doc ID 022729 Rev 1
L6472
Electrical data
2
Electrical data
2.1
Absolute maximum ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
Test condition
Value
Unit
VDD
VS
Logic interface supply voltage
5.5
48
V
V
Motor supply voltage
VSA = VSB = VS
Differential voltage between AGND,
PGND and DGND
VGND, diff
Vboot
0.3
55
V
V
V
Bootstrap peak voltage
Internal voltage regulator output pin
and logic supply voltage
VREG
3.6
Integrated ADC input voltage range
(ADCIN pin)
VADCIN
VOSC
-0.3 to +3.6
-0.3 to +3.6
V
V
OSCIN and OSCOUT pin voltage
range
Differential voltage between VSA
,
Vout_diff
VLOGIC
OUT1A, OUT2A, PGND and VSB
,
VSA = VSB = VS
48
V
OUT1B, OUT2B, PGND pins
Logic inputs voltage range
R.m.s. output current
-0.3 to +5.5
V
A
(1)
Iout
3
(1)
Iout_peak
TOP
Pulsed output current
TPULSE < 1 ms
7
150
A
Operating junction temperature
Storage temperature range
Total power dissipation (TA = 25 °C)
°C
°C
W
Ts
-55 to 150
5
(2)
Ptot
1. Maximum output current limit is related to metal connection and bonding characteristics. Actual limit must satisfy maximum
thermal dissipation constraints.
2. HTSSOP28 mounted on EVAL6472H Rev 1.0.
Doc ID 022729 Rev 1
9/69
Electrical data
L6472
2.2
Recommended operating conditions
Table 3.
Symbol
Recommended operating conditions
Parameter
Test condition
Value
Unit
3.3 V logic outputs
5 V logic outputs
VSA = VSB = VS
3.3
5
V
VDD
VS
Logic interface supply voltage
Motor supply voltage
8
45
45
V
V
Differential voltage between
VSA, OUT1A, OUT2A, PGND
and VSB, OUT1B, OUT2B,
PGND pins
Vout_diff
VSA = VSB = VS
VREG voltage imposed by
external source
VREG,in Logic supply voltage
Integrated ADC input voltage
3.2 3.3
V
VADC
0
VREG
125
V
(ADCIN pin)
Tj
Operating junction temperature
-25
°C
2.3
Thermal data
Table 4.
Symbol
Thermal data
Parameter
Package
Typ
Unit
HTSSOP28 (1)
22
12
RthJA
Thermal resistance junction-ambient
°C/W
POWERSO36 (2)
1. HTSSOP28 mounted on EVAL6472H Rev 1.0 board: four-layer FR4 PCB with a dissipating copper surface
2
of about 40 cm on each layer and 15 via holes below the IC.
2. POWERSO36 mounted on EVAL6472PD Rev 1.0 board: four-layer FR4 PCB with a dissipating copper
2
surface of about 40 cm on each layer and 22 via holes below the IC.
10/69
Doc ID 022729 Rev 1
L6472
Electrical characteristics
3
Electrical characteristics
VSA = VSB = 36 V; VDD = 3.3 V; internal 3 V regulator; TJ = 25 °C, unless otherwise
specified.
Table 5.
Symbol
Electrical characteristics
Parameter
Test condition
Min. Typ. Max. Unit
General
VSthOn VS UVLO turn-on threshold
VSthOff VS UVLO turn-off threshold
7.5
6.6
8.2
7.2
8.9
7.8
V
V
VS UVLO threshold
VSthHyst
0.7
1
1.3
V
hysteresis
Quiescent motor supply
current
Internal oscillator selected;
VREG = 3.3V ext; CP floating
Iq
0.5
130
160
0.65 mA
Tj(WRN) Thermal warning temperature
°C
°C
Thermal shutdown
Tj(SD)
temperature
Charge pump
Voltage swing for charge
Vpump
10
V
pump oscillator
Minimum charge pump
fpump,min
660
800
1.1
kHz
kHz
oscillator frequency (1)
Maximum charge pump
fpump,max
oscillator frequency (1)
fsw,A = fsw,B = 15.6kHz
POW_SR = ‘10’
Iboot
Output DMOS transistor
High-side switch on-
Average boot current
1.4
mA
Tj = 25°C, Iout = 3A
0.37
0.51
0.18
0.23
Tj = 125°C, (2) Iout = 3A
resistance
RDS(on)
Ω
Tj = 25°C, Iout = 3A
Low-side switch on-
resistance
Tj = 125°C, (2) Iout = 3A
OUT = VS
3.1
IDSS
Leakage current
mA
OUT = GND
-0.3
POW_SR = '00', Iout = +1A
POW_SR = '00', Iout = -1A
POW_SR = ‘11’, Iout = 1A
POW_SR = ‘10’, Iout = 1A
POW_SR = ‘01’, Iout = 1A
100
80
tr
Rise time (3)
100
200
300
ns
Doc ID 022729 Rev 1
11/69
Electrical characteristics
L6472
Table 5.
Symbol
Electrical characteristics (continued)
Parameter
Test condition
Min. Typ. Max. Unit
POW_SR = '00'; Iout = +1A
POW_SR = '00'; Iout = -1A
POW_SR = ‘11’, Iout = 1A
POW_SR = ‘10’, Iout = 1A
POW_SR = ‘01’, Iload = 1A
POW_SR = '00', Iout = +1A
POW_SR = '00', Iout = -1A
POW_SR = ‘11’, Iout = 1A
POW_SR = ‘10’, Iout = 1A
POW_SR = ‘01’, Iout = 1A
POW_SR = '00', Iout = +1A
POW_SR = '00', Iout = -1A
POW_SR = ‘11’, Iout = 1A
POW_SR = ‘10’, Iout = 1A
POW_SR = ‘01’, Iout = 1A
90
110
tf
Fall time (3)
110
260
375
285
360
285
150
95
ns
SRout_r
Output rising slew rate
V/µs
V/µs
320
260
260
110
75
SRout_f
Output falling slew rate
Dead time and blanking
POW_SR = '00'
250
375
POW_SR = ‘11’,
fOSC = 16MHz
tDT
Dead time (1)
ns
POW_SR = ‘10’,
fOSC = 16MHz
625
POW_SR = ‘01’,
fOSC = 16MHz
875
250
375
POW_SR = '00'
POW_SR = ‘11’,
fOSC = 16MHz
tblank
Blanking time (1)
ns
POW_SR = ‘10’,
fOSC = 16MHz
625
875
POW_SR = ‘01’,
f
OSC = 16MHz
Source-drain diodes
High-side diode forward ON
voltage
VSD,HS
VSD,LS
trrHS
Iout = 1A
Iout = 1A
Iout = 1A
1
1
1.1
1.1
V
V
Low-side diode forward ON
voltage
High-side diode reverse
recovery time
30
ns
12/69
Doc ID 022729 Rev 1
L6472
Electrical characteristics
Min. Typ. Max. Unit
Table 5.
Symbol
Electrical characteristics (continued)
Parameter
Test condition
Low-side diode reverse
recovery time
trrLS
Iout = 1A
100
ns
Logic inputs and outputs
VIL
Low logic level input voltage
0.8
1
V
V
VIH
High logic level input voltage
2
High logic level input current
IIH
IIL
VIN = 5V
VIN = 0V
µA
µA
(4)
Low logic level input current
-1
(5)
VDD = 3.3V, IOL = 4mA
VDD = 5V, IOL = 4mA
0.3
0.3
Low logic level output voltage
VOL
V
V
(6)
VDD = 3.3V, IOH = 4mA
2.4
4.7
VOH
High logic level output voltage
VDD = 5V, IOH = 4mA
RPU
RPD
CS pull-up and STBY pull-
down resistors
CS = GND;
STBY/RST = 5V
335 430
565
4.3
kΩ
3.3V VREG externally
supplied, internal oscillator
Ilogic
Internal logic supply current
3.7
2
mA
Standby mode internal logic
supply current
Ilogic,STBY
fSTCK
3.3V VREG externally supplied
2.5
2
µA
Step-clock input frequency
MHz
Internal oscillator and external oscillator driver
fosc,i
Internal oscillator frequency
Tj = 25°C, VREG = 3.3V
-3% 16
8
+3% MHz
32 MHz
Programmable external
oscillator frequency
fosc,e
Internal oscillator 3.3V VREG
externally supplied; IOSCOUT
= 4mA
VOSCOUT OSCOUT clock source high
2.4
V
level voltage
H
Internal oscillator 3.3V VREG
externally supplied; IOSCOUT
= 4mA
OSCOUT clock source low
level voltage
VOSCOUTL
0.3
20
V
trOSCOUT OSCOUT clock source rise
tfOSCOUT and fall time
Internal oscillator
ns
ms
µs
Internal to external oscillator
switching delay
textosc
3
External to internal oscillator
switching delay
tintosc
1.5
SPI
Maximum SPI clock
fCK,MAX
5
MHz
frequency (7)
Doc ID 022729 Rev 1
13/69
Electrical characteristics
L6472
Table 5.
Symbol
Electrical characteristics (continued)
Parameter Test condition
Min. Typ. Max. Unit
trCK
tfCK
SPI clock rise and fall time (7) CL = 30pF
25
ns
ns
thCK
tlCK
SPI clock high and low time
75
(7)
tsetCS
tholCS
tdisCS
tsetSDI
tholSDI
Chip select setup time (7)
Chip select hold time (7)
De-select time (7)
350
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
800
25
Data input setup time (7)
Data input hold time (7)
20
tenSDO Data output enable time (7)
tdisSDO Data output disable time (7)
38
47
57
tvSDO
Data output valid time (7)
tholSDO Data output hold time (7)
37
60
Switch input (SW)
RPUSW SW input pull-up resistance
Current control
SW = GND
85
110
kΩ
Max. programmable
ISTEP,max
4
A
reference current
Min. programmable reference
ISTEP,min
current
31
mA
Overcurrent protection
Maximum programmable
IOCD,MAX overcurrent detection
threshold
OCD_TH = ‘1111’
OCD_TH = ‘0000’
6
A
Minimum programmable
IOCD,MIN overcurrent detection
threshold
0.37
5
A
A
Programmable overcurrent
IOCD,RES
0.37
5
detection threshold resolution
tOCD,Flag OCD to flag signal delay time dIout/dt = 350A/µs
650 1000 ns
dIout/dt = 350A/µs POW_SR =
'10'
tOCD,SD OCD to shutdown delay time
600
µs
Standby
VS = 8V
26
30
10
34
36
Quiescent motor supply
IqSTBY
µA
current in standby conditions
VS = 36V
tSTBY,min Minimum standby time
µs
µs
Logic power-on and wake-up
tlogicwu
time
38
45
14/69
Doc ID 022729 Rev 1
L6472
Electrical characteristics
Min. Typ. Max. Unit
Table 5.
Symbol
Electrical characteristics (continued)
Parameter
Test condition
Charge pump power-on and Power bridges disabled, Cp =
tcpwu
650
µs
wake-up time
10nF, Cboot = 220nF
Internal voltage regulator
Voltage regulator output
VREG
IREG
VREG, drop
2.9
3
3.2
40
V
voltage
Voltage regulator output
current
mA
mV
mA
Voltage regulator output
voltage drop
IREG = 40mA
50
Voltage regulator standby
output current
IREG,STBY
10
Integrated analog-to-digital converter
Analog-to-digital converter
resolution
NADC
5
bit
V
Analog-to-digital converter
VADC,ref
VREG
reference voltage
Analog-to-digital converter
sampling frequency
fOSC
512
/
fS
kHz
1. Accuracy depends on oscillator frequency accuracy.
2. Tested at 25 °C in a restricted range and guaranteed by characterization.
3. Rise and fall time depends on motor supply voltage value. Refer to SR values in order to evaluate the
out
actual rise and fall time.
4. Not valid for the STBY/RST pin which has an internal pull-down resistor.
5. Not valid for the SW and CS pins which have an internal pull-up resistor.
6. FLAG, BUSY and SYNC open drain outputs included.
7. See Figure 20 – SPI timings diagram for details.
Doc ID 022729 Rev 1
15/69
Pin connection
L6472
4
Pin connection
Figure 2.
HTSSOP28 pin connection (top view)
345
Figure 3.
POWERSO36 pin connection (top view)
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16/69
Doc ID 022729 Rev 1
L6472
Pin connection
4.1
Pin list
Table 6.
No.
Pin description
Name
Type
Function
17
6
VDD
Power
Logic output supply voltage (pull-up reference)
Internal 3 V voltage regulator output and 3.3 V external logic
supply
VREG
Power
Oscillator pin 1. To connect an external oscillator or clock source.
If this pin is unused, it should be left floating.
7
8
OSCIN
Analog input
Oscillator pin 2. To connect an external oscillator. When the
internal oscillator is used this pin can supply 2/4/8/16 MHz. If this
pin is unused, it should be left floating.
OSCOUT
Analog output
10
11
CP
Output
Charge pump oscillator output
Bootstrap voltage needed for driving the high-side power DMOS of
both bridges (A and B)
Vboot
ADCIN
Supply voltage
Analog input
5
Internal analog-to-digital converter input
2
VSA
VSB
Power supply
Power supply
Ground
Full bridge A power supply pin. It must be connected to VSB
26
12
16
27
13
1
Full bridge B power supply pin. It must be connected to VSA
Power ground pin
PGND
OUT1A
OUT2A
OUT1B
OUT2B
AGND
Power output
Power output
Power output
Power output
Ground
Full bridge A output 1
Full bridge A output 2
Full bridge B output 1
Full bridge B output 2
Analog ground.
28
14
15
9
External switch input pin. If not used the pin should be connected
to VDD.
4
SW
Logical input
Ground
21
DGND
Digital ground
By default, this BUSY pin is forced low when the device is
22
BUSY\SYNC
Open drain output performing a command. Otherwise the pin can be configured to
generate a synchronization signal.
18
20
19
23
SDO
SDI
CK
Logic output
Logic input
Logic input
Logic input
Data output pin for serial interface
Data input pin for serial interface
Serial interface clock
CS
Chip select input pin for serial interface
Status flag pin. An internal open drain transistor can pull the pin to
GND when a programmed alarm condition occurs (step loss,
OCD, thermal pre-warning or shutdown, UVLO, wrong command,
non-performable command)
24
FLAG
Open drain output
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Pin connection
L6472
Table 6.
No.
Pin description (continued)
Name
Type
Function
Standby and reset pin. LOW logic level resets the logic and puts
the device into standby mode. If not used, it should be connected
to VDD
3
STBY\RST
Logic input
25
STCK
Logic input
Ground
Step-clock input
EPAD
Exposed pad
Internally connected to PGND, AGND and DGND pins
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L6472
Typical applications
5
Typical applications
Table 7.
Typical application values
Name
Value
CVS
CVSPOL
CREG
CREGPOL
CDD
220 nF
100 µF
100 nF
47 µF
100 nF
CDDPOL
D1
10 µF
Charge pump diodes
220 nF
CBOOT
CFLY
10 nF
RPU
39 kΩ
RSW
100 Ω
CSW
10 nF
Figure 4.
Bipolar stepper motor control application using the L6472
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Functional description
L6472
6
Functional description
6.1
Device power-up
At the end of power-up, the device state is the following:
●
Registers are set to default,
●
Internal logic is driven by the internal oscillator and a 2 MHz clock is provided by the
OSCOUT pin,
●
●
●
Bridges are disabled (High Z),
UVLO bit in the STATUS register is forced low (fail condition),
FLAG output is forced low.
During power-up the device is under reset (all logic IO disabled and power bridges in high-
impedance state) until the following conditions are satisfied:
●
●
●
VS is greater than VSthOn
VREG is greater than VREGth = 2.8 V (typ.)
Internal oscillator is operative.
Any motion command causes the device to exit from High Z state (HardStop and SoftStop
included).
6.2
6.3
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Logic I/O
Pins CS, CK, SDI, STCK, SW and STBY\RST are TTL/CMOS 3.3 V-5 V compatible logic
inputs.
Pin SDO is a TTL/CMOS compatible logic output. The VDD pin voltage sets the logic output
pin voltage range; when it is connected to VREG or a 3.3 V external supply voltage, the
output is 3.3 V compatible. When VDD is connected to a 5 V supply voltage, SDO is 5 V
compatible.
VDD is not internally connected to VREG, an external connection is always needed.
A 10 µF capacitor should be connected to the VDD pin in order to obtain a proper operation.
Pins FLAG and BUSY\SYNC are open drain outputs.
Charge pump
To ensure the correct driving of the high-side integrated MOSFETs, a voltage higher than
the motor power supply voltage needs to be applied to the Vboot pin. The high-side gate
driver supply voltage Vboot is obtained through an oscillator and a few external components
realizing a charge pump (see Figure 5).
Doc ID 022729 Rev 1
L6472
Functional description
Figure 5.
Charge pump circuitry
6.4
Microstepping
The driver is able to divide the single step into up to 16 microsteps. Step mode can be
programmed by the STEP_SEL parameter in the STEP_MODE register (see Table 19).
Step mode can only be changed when bridges are disabled. Every time step mode is
changed, the electrical position (i.e. the point of microstepping sinewave that is generated)
is reset to the first microstep, and the absolute position counter value (see Section 6.5)
becomes meaningless.
Figure 6.
Normal mode and microstepping (16 microsteps)
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Functional description
L6472
6.4.1
Automatic full-step mode
When motor speed is greater than a programmable full-step speed threshold, the L6472
switches automatically to full-step mode (see Figure 7); the driving mode returns to
microstepping when motor speed decreases below the full-step speed threshold. The full-
step speed threshold is set through the FS_SPD register (see Section 9.1.9).
Figure 7.
Automatic full-step switching
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6.5
6.6
Absolute position counter
An internal 22-bit register (ABS_POS) keeps track of the motor motion according to the
selected step mode; the stored value unit is equal to the selected step mode (full, half,
quarter, etc.). The position range is from -221 to +221-1 (µ) steps (see Section 9.1.1).
Programmable speed profiles
The user can easily program a customized speed profile, independently defining
acceleration, deceleration, maximum and minimum speed values through the ACC, DEC,
MAX_SPEED and MIN_SPEED registers respectively (see Section 9.1.5, 9.1.6, 9.1.7 and
9.1.8).
When a command is sent to the device, the integrated logic generates the microstep
frequency profile that performs a motor motion compliant to speed profile boundaries.
All acceleration parameters are expressed in step/tick2 and all speed parameters are
expressed in step/tick; the unit of measurement does not depend on selected step mode.
Acceleration and deceleration parameters range from 2-40 to (212-2)•2-40 step/tick2
(equivalent to 14.55 to 59590 step/s2).
Minimum speed parameter ranges from 0 to (212-1)•2-24 step/tick (equivalent to 0 to 976.3
step/s).
Maximum speed parameter ranges from 2-18 to (210-1)• 2-18 step/tick (equivalent to 15.25 to
15610 step/s).
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Functional description
6.6.1
Infinite acceleration/deceleration mode
When the ACC register value is set to max. (0xFFF), the system works in “infinite
acceleration mode”: acceleration and deceleration phases are totally skipped, as shown in
Figure 8.
It is not possible to skip the acceleration or deceleration phase independently.
Figure 8.
Speed profile in infinite acceleration/deceleration mode
6.7
Motor control commands
The L6472 can accept different types of commands:
●
●
●
●
constant speed commands (Run, GoUntil, ReleaseSW)
absolute positioning commands (GoTo, GoTo_DIR, GoHome, GoMark)
motion commands (Move)
stop commands (SoftStop, HardStop, SoftHiz, HardHiz).
For detailed command descriptions refer to Section 9.2.
6.7.1
Constant speed commands
A constant speed command produces a motion in order to reach and maintain a user
defined target speed starting from the programmed minimum speed (set in the MIN_SPEED
register) and with the programmed acceleration/deceleration value (set in the ACC and DEC
registers). A new constant speed command can be requested anytime.
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Functional description
Figure 9.
L6472
Constant speed commands examples
6.7.2
Positioning commands
An absolute positioning command produces a motion in order to reach a user-defined
position that is sent to the device together with the command. The position can be reached
by performing the minimum path (minimum physical distance) or forcing a direction (see
Figure 10).
The performed motor motion is compliant to programmed speed profile boundaries
(acceleration, deceleration, minimum and maximum speed).
Note that with some speed profiles or positioning commands, the deceleration phase can
start before the maximum speed is reached.
Figure 10. Positioning command examples
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Functional description
6.7.3
Motion commands
Motion commands produce a motion in order to perform a user-defined number of
microsteps in a user-defined direction that are sent to the device together with the command
(see Figure 11).
The performed motor motion is compliant to programmed speed profile boundaries
(acceleration, deceleration, minimum and maximum speed).
Note that with some speed profiles or motion commands, the deceleration phase can start
before the maximum speed is reached.
Figure 11. Motion command examples
6.7.4
Stop commands
A stop command forces the motor to stop. Stop commands can be sent anytime.
The SoftStop command causes the motor to decelerate with a programmed deceleration
value until the MIN_SPEED value is reached and then stops the motor maintaining the rotor
position (a holding torque is applied).
The HardStop command stops the motor instantly, ignoring deceleration constraints and
maintaining the rotor position (a holding torque is applied).
The SoftHiZ command causes the motor to decelerate with a programmed deceleration
value until the MIN_SPEED value is reached and then forces the bridges into high-
impedance state (no holding torque is present).
The HardHiZ command instantly forces the bridges into high-impedance state (no holding
torque is present).
6.7.5
Step-clock mode
In step-clock mode the motor motion is defined by the step-clock signal applied to the STCK
pin.
At each step-clock rising edge, the motor is moved by one microstep in the programmed
direction and the absolute position is consequently updated.
When the system is in step-clock mode the SCK_MOD flag in the STATUS register is raised,
the SPEED register is set to zero and the motor status is considered stopped whatever the
STCK signal frequency (the MOT_STATUS parameter in the STATUS register equal to
g00h).
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Functional description
L6472
6.7.6
GoUntil and ReleaseSW commands
In most applications the power-up position of the stepper motor is undefined, so an
initialization algorithm driving the motor to a known position is necessary.
The GoUntil and ReleaseSW commands can be used in combination with external switch
input (see Section 6.13) to easily initialize the motor position.
The GoUntil command makes the motor run at the target constant speed until the SW input
is forced low (falling edge). When this event occurs, one of the following actions can be
performed:
●
ABS_POS register is set to zero (home position) and the motor decelerates to zero
speed (as a SoftStop command)
●
ABS_POS register value is stored in the MARK register and the motor decelerates to
zero speed (as a SoftStop command).
If the SW_MODE bit of the CONFIG register is set to e0f, the motor does not decelerate but
it immediately stops (as a HardStop command).
The ReleaseSW command makes the motor run at the programmed minimum speed until
the SW input is forced high (rising edge). When this event occurs, one of the following
actions can be performed:
●
ABS_POS register is set to zero (home position) and the motor immediately stops (as a
HardStop command)
●
ABS_POS register value is stored in the MARK register and the motor immediately
stops (as a HardStop command).
If the programmed minimum speed is less than 5 step/s, the motor is driven at 5 step/s.
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Functional description
6.8
Internal oscillator and oscillator driver
The control logic clock can be supplied by the internal 16-MHz oscillator, an external
oscillator (crystal or ceramic resonator) or a direct clock signal.
These working modes can be selected by the EXT_CLK and OSC_SEL parameters in the
CONFIG register (see Table 24).
At power-up the device starts using the internal oscillator and provides a 2-MHz clock signal
on the OSCOUT pin.
Attention: In any case, before changing clock source configuration, a
hardware reset is mandatory. Switching to different clock
configurations during operation could cause unexpected
behavior.
6.8.1
6.8.2
Internal oscillator
In this mode the internal oscillator is activated and OSCIN is unused. If the OSCOUT clock
source is enabled, the OSCOUT pin provides a 2, 4, 8 or 16-MHz clock signal (according to
the OSC_SEL value); otherwise it is unused (see Figure 12).
External clock source
Two types of external clock source can be selected: crystal/ceramic resonator or direct clock
source. Four programmable clock frequencies are available for each external clock source:
8, 16, 24 and 32 MHz.
When an external crystal/resonator is selected, the OSCIN and OSCOUT pins are used to
drive the crystal/resonator (see Figure 12). The crystal/resonator and load capacitors (CL)
must be placed as close as possible to the pins. Refer to Table 8 for the choice of the load
capacitor value according to the external oscillator frequency.
Table 8.
CL values according to external oscillator frequency
Crystal/resonator freq. (1)
CL (2)
8 MHz
16 MHz
24 MHz
32 MHz
25 pF (ESRmax = 80 Ω)
18 pF (ESRmax = 50 Ω)
15 pF (ESRmax = 40 Ω)
10 pF (ESRmax = 40 Ω)
1. First harmonic resonance frequency.
2. Lower ESR value allows the driving of greater load capacitors.
If a direct clock source is used, it must be connected to the OSCIN pin, and the OSCOUT
pin supplies the inverted OSCIN signal (see Figure 12).
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Functional description
Figure 12. OSCIN and OSCOUT pin configurations
L6472
Note:
When OSCIN is UNUSED, it should be left floating.
When OSCOUT is UNUSED it should be left floating.
6.9
Overcurrent detection
When the current in any of the Power MOSFETs exceeds a programmed overcurrent
threshold, the STATUS register OCD flag is forced low until the overcurrent event expires
and a GetStatus command is sent to the IC (see Section 9.1.19 and 9.2.20). The
overcurrent event expires when all the Power MOSFET currents fall below the programmed
overcurrent threshold.
The overcurrent threshold can be programmed through the OCD_TH register in one of 16
available values ranging from 375 mA to 6 A with steps of 375 mA (see Table 17).
It is possible to set if an overcurrent event causes or not the MOSFET turn-off (bridges in
high-impedance status) acting on the OC_SD bit in the CONFIG register (see
Section 9.1.18). The OCD flag in the STATUS register is raised anyway (see Table 25).
When the IC outputs are turned-off by an OCD event, they cannot be turned on until the
OCD flag is released by a GetStatus command.
Attention: The overcurrent shutdown is a critical protection feature. It is
not recommended to disable it.
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Functional description
6.10
Undervoltage lockout (UVLO)
The L6472 provides motor supply UVLO protection. When the motor supply voltage falls
below the VSthOff threshold voltage, the STATUS register UVLO flag is forced low. When a
GetStatus command is sent to the IC, and the undervoltage condition expires, the UVLO
flag is released (see Section 9.1.19 and 9.2.20). The undervoltage condition expires when
the motor supply voltage goes over the VSthOn threshold voltage. When the device is in the
undervoltage condition, no motion command can be performed. The UVLO flag is forced low
by logic reset (power-up included) even if no UVLO condition is present.
6.11
Thermal warning and thermal shutdown
An internal sensor allows the L6472 to detect when the device internal temperature exceeds
a thermal warning or an overtemperature threshold.
When the thermal warning threshold (Tj(WRN)) is reached, the TH_WRN bit in the STATUS
register is forced low (see Section 9.1.19) until the temperature decreases below Tj(WRN)
and a GetStatus command is sent to the IC (see Section 9.1.19 and 9.2.20).
When the thermal shutdown threshold (Tj(OFF)) is reached, the device goes into the thermal
shutdown condition: the TH_SD bit in the STATUS register is forced low, the power bridges
are disabled bridges in high-impedance state and the HiZ bit in the STATUS register is
raised (see Section 9.1.19).
The thermal shutdown condition only expires when the temperature goes below the thermal
warning threshold (Tj(WRN)).
On exiting the thermal shutdown condition, the bridges are still disabled (HiZ flag high);
whichever motion command makes the device exit from High Z state (HardStop and
SoftStop included).
6.12
Reset and standby
The device can be reset and put into standby mode through a dedicated pin. When the
STBY\RST pin is driven low, the bridges are left open (High Z state), the internal charge
pump is stopped, the SPI interface and control logic are disabled, and the internal 3 V
voltage regulator maximum output current is reduced to IREG,STBY; as a result, the L6472
heavily reduces the power consumption. At the same time the register values are reset to
default and all protection functions are disabled. STBY\RST input must be forced low at
least for tSTBY,min, in order to ensure the complete switch to standby mode.
On exiting standby mode, as well as for IC power-up, a delay of up to tlogicwu must be given
before applying a new command to allow proper oscillator and logic startup and a delay of
up to tcpwu must be given to allow the charge pump startup.
On exiting standby mode the bridges are disabled (HiZ flag high) and whichever motion
command causes the device to exit High Z state (HardStop and SoftStop included).
Attention: It is not recommended to reset the device when outputs are
active. The device should be switched to high-impedance
state before being reset.
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Functional description
L6472
6.13
External switch (SW pin)
The SW input is internally pulled-up to VDD and detects if the pin is open or connected to
ground (see Figure ).
The SW_F bit of the STATUS register indicates if the switch is open (‘0’) or closed (‘1’) (see
Section 9.1.19); the bit value is refreshed at every system clock cycle (125 ns). The
SW_EVN flag of the STATUS register is raised when a switch turn-on event (SW input falling
edge) is detected (see Section 9.1.19). A GetStatus command releases the SW_EVN flag
(see Section 9.2.20).
By default a switch turn-on event causes a HardStop interrupt (SW_MODE bit of the
CONFIG register set to ‘0’). Otherwise (SW_MODE bit of the CONFIG register set to ‘1’),
switch input events do not cause interrupts and the switch status information is at the user’s
disposal (see Table 25).
The switch input can be used by the GoUntil and ReleaseSW commands as described in
Section 9.2.10 and 9.2.11.
If the SW input is not used, it should be connected to VDD.
Figure 13. External switch connection
6.14
6.15
Programmable DMOS slew rate, dead time and blanking time
Using the POW_SR parameter in the CONFIG register, it is possible to set the commutation
speed of the power bridge output (see Table 27).
Integrated analog-to-digital converter
The L6472 integrates an NADC bit ramp-compare analog-to-digital converter with a
reference voltage equal to VREG. The analog-to-digital converter input is available through
the ADCIN pin and the conversion result is available in the ADC_OUT register (see
Section 9.1.13). The sampling frequency is equal to the clock frequency divided by 512.
The ADC_OUT value can be used for the torque regulation or can remain at the user’s
disposal.
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Functional description
6.16
Internal voltage regulator
The L6472 integrates a voltage regulator which generates a 3 V voltage starting from motor
power supply (VSA and VSB). In order to make the voltage regulator stable, at least 22 µF
should be connected between the VREG pin and ground (the suggested value is 47 µF).
The internal voltage regulator can be used to supply the VDD pin in order to make the
device digital output range 3.3 V compatible (Figure 14). A digital output range 5 V
compatible can be obtained connecting the VDD pin to an external 5 V voltage source. In
both cases, a 10 µF capacitance should be connected to the VDD pin in order to obtain a
correct operation.
The internal voltage regulator is able to supply a current up to IREG,MAX, internal logic
consumption included (Ilogic). When the device is in standby mode the maximum current that
can be supplied is IREG
, internal consumption included (Ilogic STBY).
STBY
,
,
If an external 3.3 V regulated voltage is available, it can be applied to the VREG pin in order
to supply all the internal logic and avoid power dissipation of the internal 3 V voltage
regulator (Figure 14). The external voltage regulator should never sink current from the
VREG pin.
Figure 14. Internal 3 V linear regulator
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6.17
BUSY\SYNC pin
This pin is an open drain output which can be used as the busy flag or synchronization
signal according to the SYNC_EN bit value (STEP_MODE register).
6.17.1
BUSY operation mode
The pin works as busy signal when the SYNC_EN bit is set low (default condition). In this
mode the output is forced low while a constant speed, absolute positioning or motion
command is under execution. The BUSY pin is released when the command has been
executed (target speed or target position reached). The STATUS register includes a BUSY
flag that is the BUSY pin mirror (see Section 9.1.19).
In the case of daisy chain configuration, BUSY pins of different ICs can be hard-wired to
save host controller GPIOs.
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Functional description
L6472
6.17.2
SYNC operation mode
The pin works as a synchronization signal when the SYNC_EN bit is set high. In this mode a
step-clock signal is provided on the output according to a SYNC_SEL and STEP_SEL
parameter combination (see Section 9.1.16).
6.18
FLAG pin
By default an internal open drain transistor pulls the FLAG pin to ground when at least one
of the following conditions occur:
●
●
●
●
●
●
●
●
Power-up or standby/reset exit
Overcurrent detection
Thermal warning
Thermal shutdown
UVLO
Switch turn-on event
Wrong command
Non-performable command.
It is possible to mask one or more alarm conditions by programming the ALARM_EN
register (see Table 22). If the corresponding bit of the ALARM_EN register is low, the alarm
condition is masked and it does not cause a FLAG pin transition; all other actions imposed
by alarm conditions are performed anyway. In the case of daisy chain configuration, the
FLAG pins of different ICs can be OR-wired to save host controller GPIOs.
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L6472
Phase current control
7
Phase current control
The L6472 performs a new current control technique, named predictive current control,
allowing the device to obtain the target average phase current. This method is described in
detail in Section 7.1. Furthermore, the L6472 automatically selects the better decay mode in
order to follow the current profile.
Current control algorithm parameters can be programmed by the T_FAST, TON_MIN,
TOFF_MIN and CONFIG registers (see Section 9.1.11, 9.1.12, 9.1.13 and 9.1.18 for
details).
Different current amplitude can be set for acceleration, deceleration and constant speed
phases and when the motor is stopped through the TVAL_ACC, TVAL_DEC, TVAL_RUN
and TVAL_HOLD registers (see Section 7.4). The output current amplitude can also be
regulated by the ADCIN voltage value (see Section 6.15).
Each bridge is driven by an independent control system that shares the control parameters
only with other bridges.
7.1
Predictive current control
Unlike a classical peak current control system, that causes the phase current decay when
the target value is reached, this new method keeps the power bridge on for an extra time
after reaching the current threshold.
At each cycle the system measures the time required to reach the target current (tSENSE).
After that the power stage is kept in a “predictive” ON state (tPRED) for a time equal to the
mean value of tSENSE in the last two control cycles (actual one and previous one), as shown
in Figure 15.
Figure 15. Predictive current control
At the end of the predictive ON state the power stage is set in the OFF state for a fixed time,
as in a constant tOFF current control. During the OFF state both slow and fast decay can be
performed; the better decay combination is automatically selected by the L6472, as
described in Section 7.2.
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Phase current control
L6472
As shown in Figure 15, the system is able to center the triangular wave on the desired
reference value improving dramatically the accuracy of the current control system: in fact the
average value of a triangular wave is exactly equal to the middle point of each of its
segments and at steady-state the predictive current control tends to equalize the duration of
the tSENSE and the tPRED time.
Furthermore, the tOFF value is recalculated each time a new current value is requested
(microstep change) in order to keep the PWM frequency as near as possible to the
programmed one (TSW parameter in the CONFIG register).
The device can be forced to work using a classic peak current control setting the PRED_EN
bit in the CONFIG register low (default condition). In this case, after the sense phase
(tSENSE) the power stage is set in the OFF state, as shown in Figure 16.
Figure 16. Non-predictive current control
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L6472
Phase current control
7.2
Auto-adjusted decay mode
During the current control, the device automatically selects the better decay mode in order
to follow the current profile reducing the current ripple.
At reset, the OFF time is performed by turning on both the low-side MOSFETs of the power
stage and the current recirculates in the lower half of the bridge (slow decay).
If, during a PWM cycle, the target current threshold is reached in a time shorter than the
TON_MIN value, a fast decay of TOFF_FAST/8 (T_FAST register) is immediately performed
turning on the opposite MOS of both half bridges and the current recirculates back to the
supply bus.
After this time, the bridge returns to the ON state: if the time needed to reach the target
current value is still less than TON_MIN, a new fast decay is performed with a period twice
the previous one. Otherwise, the normal control sequence is followed as described in
Section 7.1. The maximum fast decay duration is set by the TOFF_FAST value.
Figure 17. Adaptive decay - fast decay tuning
When two or more fast decays are performed with the present target current, the control
system adds a fast decay at the end of every OFF time, keeping the OFF state duration
constant (tOFF is split into tOFF,SLOW and tOFF,FAST). When the current threshold is increased
by a microstep change (rising step), the system returns to normal decay mode (slow decay
only) and the tFAST value is halved.
Stopping the motor or reaching the current sinewave zero crossing causes the current
control system to return to the reset state.
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Phase current control
L6472
Figure 18. Adaptive decay switch from normal to slow+fast decay mode and
viceversa
7.3
Auto-adjusted fast decay during the falling steps
When the target current is decreased by a microstep change (falling step), the device
performs a fast decay in order to reach the new value as fast as possible. Anyway,
exceeding the fast duration may cause a strong ripple on the step change. The L6472
automatically adjusts these fast decays reducing the current ripple.
At reset, the fast decay value (tFALL) is set to FALL_STEP/4 (T_FAST register). The tFALL
value is doubled every time, within the same falling step, an extra fast decay is necessary to
obtain an ON time greater than TON_MIN. The maximum tFALL value is equal to
FALL_STEP.
At the next falling step, the system uses the last tFALL value of the previous falling step.
Stopping the motor or reaching the current sinewave zero crossing causes the current
control system to return to the reset state.
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L6472
Phase current control
Figure 19. Fast decay tuning during the falling steps
7.4
Torque regulation (output current amplitude regulation)
The output current amplitude can be regulated in two ways: writing the TVAL_ACC,
TVAL_DEC, TVAL_RUN and TVAL_HOLD registers or varying the ADCIN voltage value.
The EN_TQREG bit (CONFIG register) sets the torque regulation method. If this bit is high,
the ADC_OUT prevalue is used to regulate output current amplitude (see Section 9.1.14).
Otherwise the internal analog-to-digital converter is at the user’s disposal and the output
current amplitude is managed by the TVAL_HOLD, TVAL_RUN, TVAL_ACC and
TVAL_DEC registers (see Section 9.1.10).
The voltage applied to the ADCIN pin is sampled at fS frequency and converted in an NADC
bit digital signal. The analog-to-digital conversion result is available in the ADC_OUT
register.
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Serial interface
L6472
8
Serial interface
The integrated 8-bit serial peripheral interface (SPI) is used for a synchronous serial
communication between the host microprocessor (always master) and the L6472 (always
slave).
The SPI uses chip select (CS), serial clock (CK), serial data input (SDI) and serial data
output (SDO) pins. When CS is high, the device is unselected and the SDO line is inactive
(high-impedance).
The communication starts when CS is forced low. The CK line is used for synchronization of
data communication.
All commands and data bytes are shifted into the device through the SDI input, most
significant bit first. The SDI is sampled on the rising edges of the CK.
All output data bytes are shifted out of the device through the SDO output, most significant
bit first. The SDO is latched on the falling edges of the CK. When a return value from the
device is not available, an all zero byte is sent.
After each byte transmission, the CS input must be raised and be kept high for at least
tdisCS in order to allow the device to decode the received command and put the return
value into the shift register.
All timing requirements are shown in Figure 20 (see Section 3 for the respective electrical
characteristics for values).
Multiple devices can be connected in a daisy chain configuration, as shown in Figure 21.
Figure 20. SPI timings diagram
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Serial interface
Figure 21. Daisy chain configuration
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9
Programming manual
9.1
Register and flag description
Table 9 shows a map of the user registers available (detailed description in respective
paragraphs):
Table 9.
Register map
Address
[Hex]
Register
name
Reset
Hex
Remarks
Register function
Len. [bit]
Reset Value
(1)
h01
h02
h03
h04
ABS_POS
EL_POS
MARK
Current position
Electrical position
Mark position
22
9
000000
000
0
0
0
R, WS
R, WS
R, WR
R
22
20
000000
SPEED
Current speed
00000 0 step/tick (0 step/s)
125.5e-12 step/tick2 (2008
h05
h06
ACC
DEC
Acceleration
Deceleration
12
12
08A
R, WS
R, WS
step/s2)
125.5e-12 step/tick2 (2008
08A
step/s2)
248e-6 step/tick (991.8
step/s)
h07
h08
h15
MAX_SPEED Maximum speed
MIN_SPEED Minimum speed
10
13
10
041
R, WR
R, WS
R, WR
000
027
0 step/tick (0 step/s)
150.7e-6 step/tick (602.7
step/s)
FS_SPD
Full-step speed
h09
h0A
TVAL_HOLD Holding current
7
7
29
29
1.3125 A
1.3125 A
R, WR
R, WR
TVAL_RUN Constant speed current
Acceleration starting
h0B
h0C
TVAL_ACC
current
7
7
29
29
1.3125 A
1.3125 A
R, WR
R, WR
Deceleration starting
TVAL_DEC
current
h0D
h0E
h0F
h10
h11
h12
h13
h14
h16
h17
RESERVED Reserved address
16
8
T_FAST
Fast decay/fall step time
Minimum ON time
19
29
29
1µs / 5 µs
20.5 µs
R, WH
R, WH
R, WH
TON_MIN
7
TOFF_MIN Minimum OFF time
RESERVED Reserved address
7
20.5 µs
8
ADC_OUT
OCD_TH
ADC output
5
XX (2)
8
R
OCD threshold
4
3.38 A
R, WR
RESERVED Reserved address
STEP_MODE Step mode
8
8
7
16 microsteps, no synch
All alarms enabled
R, WH
R, WS
ALARM_EN Alarms enable
8
FF
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Remarks
Table 9.
Register map (continued)
Address
[Hex]
Register
Reset
Hex
Register function
name
Len. [bit]
Reset Value
(1)
R, WH
R
Internal oscillator, 2 MHz
OSCOUT clock, supply
voltage compensation
disabled, overcurrent
shutdown enabled, slew
rate = 290 V/µs TSW =
40 µs
h18
CONFIG
IC configuration
16
16
2E88
High-impedance state,
UVLO/reset flag set.
h19
STATUS
Status
XXXX (2)
h1A
h1B
RESERVED Reserved address
RESERVED Reserved address
1. R: Readable, WH: writable only when outputs are in high-impedance, WS: writable only when motor is stopped, WR:
always writable.
2. According to startup conditions.
9.1.1
ABS_POS
The ABS_POS register contains the current motor absolute position in agreement to the
selected step mode; the stored value unit is equal to the selected step mode (full, half,
quarter, etc.). The value is in 2's complement format and it ranges from -221 to +221-1.
At power-on the register is initialized to “0” (HOME position).
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
9.1.2
EL_POS
The EL_POS register contains the current electrical position of the motor. The two MSbits
indicate the current step and the other bits indicate the current microstep (expressed in
step/128) within the step.
Table 10. EL_POS register
Bit 8
Bit 7
STEP
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MICROSTEP
When the EL_POS register is written by the user the new electrical position is instantly
imposed. When the EL_POS register is written its value must be masked in order to match
with the step mode selected in the STEP_MODE register in order to avoid a wrong
microstep value generation (see Section 9.1.16); otherwise the resulting microstep
sequence is incorrect.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
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9.1.3
MARK
The MARK register contains an absolute position called MARK, in accordance with the
selected step mode; the stored value unit is equal to the selected step mode (full, half,
quarter, etc.).
It is in 2's complement format and it ranges from -221 to +221-1.
9.1.4
SPEED
The SPEED register contains the current motor speed, expressed in step/tick (format
unsigned fixed point 0.28).
In order to convert the SPEED value in step/s the following formula can be used:
Equation 1
SPEED ⋅ 2–28
[step ⁄ s] = ---------------------------------------
tick
where SPEED is the integer number stored in the register and tick is 250 ns.
The available range is from 0 to 15625 step/s with a resolution of 0.015 step/s.
The range, effectively available to the user, is limited by the MAX_SPEED parameter.
Note:
Any attempt to write the register causes the command to be ignored and the
NOTPERF_CMD flag to rise (see Section 9.1.19).
9.1.5
ACC
The ACC register contains the speed profile acceleration expressed in step/tick2 (format
unsigned fixed point 0.40).
In order to convert ACC value in step/s2 the following formula can be used:
Equation 2
ACC ⋅ 2–40
[step ⁄ s] = -------------------------------
tick2
where ACC is the integer number stored in the register and tick is 250 ns.
The available range is from 14.55 to 59590 step/s2 with a resolution of 14.55 step/s2.
When the ACC value is set to 0xFFF the device works in infinite acceleration mode.
Any attempt to write to the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
9.1.6
DEC
The DEC register contains the speed profile deceleration expressed in step/tick2 (format
unsigned fixed point 0.40).
In order to convert the DEC value in step/s2 the following formula can be used:
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Equation 3
DEC ⋅ 2–40
[step ⁄ s] = -------------------------------
tick2
where DEC is the integer number stored in the register and tick is 250 ns.
The available range is from 14.55 to 59590 step/s2 with a resolution of 14.55 step/s2.
When the device is working in infinite acceleration mode this value is ignored.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
9.1.7
MAX_SPEED
The MAX_SPEED register contains the speed profile maximum speed expressed in
step/tick (format unsigned fixed point 0.18).
In order to convert it in step/s the following formula can be used:
Equation 4
MAXSPEED ⋅ 2–18
[step ⁄ s] = -----------------------------------------------------
tick
where MAX_SPEED is the integer number stored in the register and tick is 250 ns.
The available range is from 15.25 to 15610 step/s with a resolution of 15.25 step/s.
9.1.8
MIN_SPEED
The MIN_SPEED register contains the following parameters:
Table 11. MIN_SPEED register
Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0
MIN_SPEED
The MIN_SPEED parameter contains the speed profile minimum speed. Its value is
expressed in step/tick and to convert it in step/s the following formula can be used:
Equation 5
MINSPEED ⋅ 2–24
[step ⁄ s] = ---------------------------------------------------
tick
where MIN_SPEED is the integer number stored in the register and tick is the ramp 250 ns.
The available range is from 0 to 976.3 step/s with a resolution of 0.238 step/s.
Any attempt to write the register when the motor is running causes the NOTPERF_CMD flag
to rise.
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9.1.9
FS_SPD
The FS_SPD register contains the threshold speed. When the actual speed exceeds this
value the step mode is automatically switched to full-step two-phase on. Its value is
expressed in step/tick (format unsigned fixed point 0.18) and to convert it in step/s the
following formula can be used.
Equation 6
(FSSPD + 0.5) ⋅ 2–18
[step ⁄ s] = -----------------------------------------------------------
tick
If the FS_SPD value is set to hFF (max.) the system always works in microstepping mode
(SPEED must go beyond the threshold to switch to full-step mode). Setting FS_SPD to zero
does not have the same effect as setting step mode to full-step two phase on: the zero
FS_SPD value is equivalent to a speed threshold of about 7.63 step/s.
The available range is from 7.63 to 15625 step/s with a resolution of 15.25 step/s.
9.1.10
TVAL_HOLD, TVAL_RUN, TVAL_ACC and TVAL_DEC
The TVAL_HOLD register contains the current value that is assigned to the torque
regulation DAC when the motor is stopped.
The TVAL_RUN register contains the current value that is assigned to the torque regulation
DAC when the motor is running at constant speed.
The TVAL_ACC register contains the current value that is assigned to the torque regulation
DAC during acceleration.
The TVAL_DEC register contains the current value that is assigned to the torque regulation
DAC during deceleration.
The available range is from 31.25 mA to 4 A with a resolution of 31.25 mA, as shown in
Table 12.
Table 12. Torque regulation by TVAL_HOLD, TVAL_ACC, TVAL_DEC and
TVAL_RUN registers
TVAL_X [6..0]
Output current amplitude
0
0
0
0
0
0
0
0
0
0
0
0
0
1
31.25 mA
62.5 mA
1
1
1
1
1
1
1
1
1
1
1
1
0
1
3.969 A
4 A
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9.1.11
T_FAST
The T_FAST register contains the maximum fast decay time (TOFF_FAST) and the
maximum fall step time (FALL_STEP) used by the current control system (see Section 7.2
and 7.3 for details):
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TOFF_FAST
FAST_STEP
The available range for both parameters is from 0.5 µs to 8 µs.
Table 13. Maximum fast decay times
TOFF_FAST [3..0]
FAST_STEP[3..0]
Fast decay time
0
0
0
0
0
0
0
1
0.5 µs
1 µs
1
1
1
1
1
1
0
1
7.5 µs
8 µs
Any attempt to write to the register when the motor is running causes the command to be
ignored and NOTPERF_CMD to rise (see Section 9.1.19).
9.1.12
TON_MIN
This parameter is used by the current control system when current mode operation is
selected.
The TON_MIN register contains the minimum ON time value used by the current control
system (see Section 7.2).
The available range for both parameters is from 0.5 µs to 64 µs.
Table 14. Minimum ON time
Time
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0.5 µs
1 µs
1
1
1
1
1
1
1
1
1
1
1
1
0
1
63.5 µs
64 µs
Any attempt to write to the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD to rise (see Section 9.1.19).
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9.1.13
TOFF_MIN
This parameter is used by the current control system when current mode operation is
selected.
The TOFF_MIN register contains the minimum OFF time value used by the current control
system (see Section 7.1 for details).
The available range for both parameters is from 0.5 µs to 64 µs.
Table 15. Minimum OFF time
Time
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0.5 µs
1 µs
1
1
1
1
1
1
1
1
1
1
1
1
0
1
63.5 µs
64 µs
Any attempt to write to the register when the motor is running causes the command to be
ignored and NOTPERF_CMD to rise (see Section 9.1.19).
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9.1.14
ADC_OUT
The ADC_OUT register contains the result of the analog-to-digital conversion of the ADCIN
pin voltage.
Any attempt to write to the register causes the command to be ignored and the
NOTPERF_CMD flag to rise (see Section 9.1.19).
Table 16. ADC_OUT value and torque regulation feature
VADCIN/ VREG
ADC_OUT [4..0]
Output current amplitude
0
0
0
0
0
0
0
0
0
0
1
125 mA
250 mA
1/32
30/32
31/32
1
1
1
1
1
1
1
1
0
1
3.875 A
4 A
9.1.15
OCD_TH
The OCD_TH register contains the overcurrent threshold value (see Section 6.9 for details).
The available range is from 375 mA to 6 A, steps of 375 mA, as shown in Table 17.
Table 17. Overcurrent detection threshold
OCD_TH [3..0]
Overcurrent detection threshold
0
0
0
0
0
0
1
375 mA
750 mA
0
1
1
1
1
1
1
0
1
5.625 A
6 A
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9.1.16
STEP_MODE
The STEP_MODE register has the following structure:
Table 18. STEP_MODE register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
1 (1)
Bit 2
Bit 1
Bit 0
SYNC_EN
SYNC_SEL
STEP_SEL
1. When the register is written this bit should be set to 1.
The STEP_SEL parameter selects one of five possible stepping modes:
Table 19. Step mode selection
STEP_SEL[2..0]
Step mode
0
0
0
0
1
0
0
1
1
X
0
1
0
1
X
Full-step
Half-step
1/4 microstep
1/8 microstep
1/16 microstep
Every time the step mode is changed, the electrical position (i.e. the point of microstepping
sinewave that is generated) is reset to the first microstep.
Warning: Every time STEP_SEL is changed the value in the ABS_POS
register looses meaning and should be reset.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
When when SYNC_EN bit is set low, BUSY/SYNC output is forced low during the
commands execution, otherwise, when the SYNC_EN bit is set high, the BUSY/SYNC
output provides a clock signal according to the SYNC_SEL parameter.
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Table 20. SYNC output frequency
STEP_SEL (fFS is the full-step frequency)
000
fFS/2
NA
001
fFS/2
fFS
010
fFS/2
fFS
011
fFS/2
fFS
100
fFS/2
fFS
101
fFS/2
fFS
110
fFS/2
fFS
111
fFS/2
fFS
000
001
010
011
100
101
110
111
NA
NA
NA
NA
NA
NA
NA
2· fFS
NA
2· fFS
4· fFS
NA
2· fFS
4· fFS
8· fFS
NA
2· fFS
4· fFS
8· fFS
NA
2· fFS
4· fFS
8· fFS
NA
2· fFS
4· fFS
8· fFS
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
The synchronization signal is obtained starting from the electrical position information
(EL_POS register) according to Table 21:
Table 21. SYNC signal source
SYNC_SEL[2..0]
Source
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
EL_POS[7]
EL_POS[6]
EL_POS[5]
EL_POS[4]
EL_POS[3]
UNUSED (1)
UNUSED (1)
UNUSED (1)
1. When this value is selected the BUSY output is forced low.
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9.1.17
ALARM_EN
The ALARM_EN register allows the selection of which alarm signals are used to generate
the FLAG output. If the respective bit of the ALARM_EN register is set high, the alarm
condition forces the FLAG pin output down.
Table 22. ALARM_EN register
ALARM_EN bit
Alarm condition
0 (LSB)
Overcurrent
Thermal shutdown
Thermal warning
1
2
3
Undervoltage
4
UNUSED
5
6
UNUSED
Switch turn-on event
Wrong or non-performable command
7 (MSB)
9.1.18
CONFIG
The CONFIG register has the following structure:
Table 23. CONFIG register
Bit 15
Bit 14
Bit 13
Bit 12
TSW
Bit 4
Bit 11
Bit 10
Bit 9 Bit 8
PRED_EN
Bit 7
POW_SR
Bit 6
Bit 5
Bit 3
Bit 2
Bit 1 Bit 0
OC_SD
RESERVED EN_TQREG SW_MODE EXT_CLK
OSC_SEL
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The OSC_SEL and EXT_CLK bits set the system clock source:
Table 24. Oscillator management
EXT_CLK OSC_SEL[2..0] Clock source
OSCIN
OSCOUT
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
Internal oscillator: 16 MHz
Unused
Unused
Supplies a 2-MHz
clock
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
Internal oscillator: 16 MHz
Internal oscillator: 16 MHz
Internal oscillator: 16 MHz
Internal oscillator: 16 MHz
Unused
Unused
Unused
Unused
Supplies a 4-MHz
clock
Supplies an 8-MHz
clock
Supplies a 16-MHz
clock
Crystal/resonator
External crystal or resonator: 8 MHz Crystal/resonator driving
driving
External crystal or resonator:
Crystal/resonator driving
16 MHz
Crystal/resonator
driving
External crystal or resonator:
Crystal/resonator driving
24 MHz
Crystal/resonator
driving
External crystal or resonator:
Crystal/resonator driving
32 MHz
Crystal/resonator
driving
Ext clock source: 8 MHz
Clock source
Supplies inverted
OSCIN signal
(Crystal/resonator driver disabled)
Ext clock source: 16 MHz
Clock source
Supplies inverted
OSCIN signal
(Crystal/resonator driver disabled)
Ext clock source: 24 MHz
Clock source
Supplies inverted
OSCIN signal
(Crystal/resonator driver disabled)
Ext clock source: 32 MHz
Clock source
Supplies inverted
OSCIN signal
(Crystal/resonator driver disabled)
The SW_MODE bit sets the external switch to act as HardStop interrupt or not:
Table 25. External switch hard stop interrupt mode
SW_MODE
Switch mode
0
1
HardStop interrupt
User disposal
The OC_SD bit sets if an overcurrent event causes or not the bridges to turn off; the OCD
flag in the STATUS register is forced low anyway:
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Table 26. Overcurrent event
OC_SD
Overcurrent event
1
0
Bridges shut down
Bridges do not shut down
The POW_SR bits set the slew rate value of the power bridge output:
Table 27. Programmable power bridge output slew rate values
POW_SR [1..0]
Output Slew rate (1) [V/ìs] (1)
0
0
1
1
0
1
0
1
180
180
290
530
1. See SRout_r and SRout_f parameters in Table 5 for details.
The TQREG bit sets if the torque regulation (see Section 7.4) is performed through ADCIN
voltage (external) or the TVAL_HOLD, TVAL_ACC, TVAL_DEC and TVAL_RUN registers
(internal):
Table 28. External torque regulation enable
TQREG
External torque regulation enable
0
1
Internal registers
ADC input
The TSW parameter is used by the current control system and it sets the target switching
period.
Table 29. Switching period
TSW [4..0]
Switching period
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
4 µs (250 kHz)
4 µs (250 kHz)
8 µs (125 kHz)
1
1
1
1
1
124 µs (8 kHz)
Any attempt to write the CONFIG register when the motor is running causes the command
to be ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
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9.1.19
STATUS
Table 30. STATUS register
Bit 15
Bit 14 Bit 13 Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
SCK_MOD
Bit 7
X
X
OCD
Bit 4
DIR
TH_SD
Bit 3
TH_WRN UVLO WRONG_CMD
Bit 6
Bit 5
Bit 2
Bit 1
Bit 0
HiZ
NOTPERF_CMD
MOT_STATUS
SW_EVN
SW_F
BUSY
When the HiZ flag is high it indicates that the bridges are in high-impedance state. Any
motion command causes the device to exit from High Z state (HardStop and SoftStop
included), unless error flags forcing a High Z state are active.
The UVLO flag is active low and is set by an undervoltage lockout or reset event (power-up
included). The TH_WRN, TH_SD, OCD flags are active low and indicate respectively
thermal warning, thermal shutdown and overcurrent detection events.
The NOTPERF_CMD and WRONG_CMD flags are active high and indicate, respectively,
that the command received by SPI can't be performed or does not exist at all. The SW_F
reports the SW input status (low for open and high for closed).
The SW_EVN flag is active high and indicates a switch turn-on event (SW input falling
edge).
The UVLO, TH_WRN, TH_SD, OCD, NOTPERF_CMD, WRONG_CMD and SW_EVN flags
are latched: when the respective conditions make them active (low or high) they remain in
that state until a GetStatus command is sent to the IC.
The BUSY bit reflects the BUSY pin status. The BUSY flag is low when a constant speed,
positioning or motion command is under execution and is released (high) after the command
has been completed.
The SCK_MOD bit is an active high flag indicating that the device is working in step-clock
mode. In this case the step-clock signal should be provided through the STCK input pin. The
DIR bit indicates the current motor direction:
Table 31. STATUS register DIR bit
DIR
Motor direction
1
0
Forward
Reverse
MOT_STATUS indicates the current motor status:
Table 32. STATUS register MOT_STATE bits
MOT_STATUS
Motor status
0
0
1
1
0
1
0
1
Stopped
Acceleration
Deceleration
Constant speed
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Any attempt to write to the register causes the command to be ignored and the
L6472
NOTPERF_CMD to rise (see Section 9.1.19).
9.2
Application commands
A summary of commands is given in Table 33.
Table 33. Application commands
Command Mnemonic
Command binary code
[7..5] [4] [3] [2..1] [0]
Action
NOP
000
0
0
00
0
Nothing
Writes VALUE in the PARAM register
Returns the stored value in the PARAM register
SetParam(PARAM,VALUE) 000
[PARAM]
[PARAM]
GetParam(PARAM)
Run(DIR,SPD)
001
010
1
1
0
00
00
DIR Sets the target speed and the motor direction
Puts the device into step-clock mode and imposes
DIR direction
StepClock(DIR)
010
1
DIR
Makes N_STEP (micro) steps in DIR direction (non-
performable when motor is running)
Move(DIR,N_STEP)
GoTo(ABS_POS)
010
011
0
0
0
0
0
1
00
00
00
DIR
0
Brings motor in ABS_POS position (minimum path)
Brings motor in ABS_POS position forcing DIR
direction
GoTo_DIR(DIR,ABS_POS) 011
DIR
Performs a motion in DIR direction with speed SPD
GoUntil(ACT,DIR,SPD)
ReleseSW(ACT, DIR)
100
100
0
1
ACT
ACT
01
01
DIR until SW is closed, the ACT action is executed then a
SoftStop takes place
Performs a motion in DIR direction at minimum
DIR speed until the SW is released (open), the ACT
action is executed then a HardStop takes place
GoHome
GoMark
011
011
110
110
101
101
1
1
1
0
1
1
0
1
1
0
0
1
00
00
00
00
00
00
0
0
0
0
0
0
Brings the motor in HOME position
Brings the motor in MARK position
Resets the ABS_POS register (set HOME position)
Device is reset to power-up conditions.
Stops motor with a deceleration phase
Stops motor immediately
ResetPos
ResetDevice
SoftStop
HardStop
Puts the bridges in high-impedance status after a
deceleration phase
SoftHiZ
101
101
0
0
0
1
00
00
0
0
Puts the bridges in high-impedance status
immediately
HardHiZ
GetStatus
RESERVED
RESERVED
110
111
111
1
0
1
0
1
1
00
01
00
0
1
0
Returns the STATUS register value
RESERVED COMMAND
RESERVED COMMAND
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9.2.1
Command management
The host microcontroller can control motor motion and configure the L6472 through a
complete set of commands.
All commands are composed by a single byte. After the command byte, some argument
bytes should be needed (see Figure 22). Argument length can vary from 1 to 3 bytes.
Figure 22. Command with 3-byte argument
By default the device returns an all zeroes response for any received byte, the only
exceptions are GetParam and GetStatus commands. When one of these commands is
received the following response bytes represents the related register value (see Figure 23).
Response length can vary from 1 to 3 bytes.
Figure 23. Command with 3-byte response
During response transmission, new commands can be sent. If a command requiring a
response is sent before the previous response is completed, the response transmission is
aborted and the new response is loaded into the output communication buffer (see
Figure 24).
Figure 24. Command response aborted
When a byte that does not correspond to a command is sent to the IC, it is ignored and the
WRONG_CMD flag in the STATUS register is raised (see Section 9.1.19).
9.2.2
Nop
Table 34. NOP command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
From host
Nothing is performed.
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9.2.3
SetParam (PARAM, VALUE)
Table 35. SetParam command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
PARAM
From host
VALUE Byte 2 (if needed)
VALUE Byte 1 (if needed)
VALUE Byte 0
The SetParam command sets the PARAM register value equal to VALUE; PARAM is the
respective register address listed in Table 9.
The command should be followed by the new register VALUE (most significant byte first).
The number of bytes composing the VALUE argument depends on the length of the target
register (see Table 9).
Some registers cannot be written (see Table 9); any attempt to write one of these registers
causes the command to be ignored and the WRONG_CMD flag to rise at the end of the
command byte as if an unknown command code was sent (see Section 9.1.18).
Some registers can only be written in particular conditions (see Table 9); any attempt to
write one of these registers when the conditions are not satisfied causes the command to be
ignored and the NOTPERF_CMD flag to rise at the end of last argument byte (see
Section 9.1.19).
Any attempt to set an inexistent register (wrong address value) causes the command to be
ignored and the WRONG_CMD flag to rise at the end of the command byte as if an
unknown command code was sent.
9.2.4
GetParam (PARAM)
Table 36. GetParam command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
1
PARAM
From host
To host
To host
To host
ANS Byte 2 (if needed)
ANS Byte 1 (if needed)
ANS Byte 0
This command reads the current PARAM register value; PARAM is the respective register
address listed in Table 9.
The command response is the current value of the register (most significant byte first). The
number of bytes composing the command response depends on the length of the target
register (see Table 9).
The returned value is the register one at the moment of GetParam command decoding. If
the register value changes after this moment, the response is not accordingly updated.
All registers can be read anytime.
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Any attempt to read an inexistent register (wrong address value) causes the command to be
ignored and WRONG_CMD flag to rise at the end of command byte as if an unknown
command code is sent.
9.2.5
Run (DIR, SPD)
Table 37. Run command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0
Bit 2
Bit 1
Bit 0
0
1
0
1
0
0
DIR
From host
From host
X
X
X
X
SPD (Byte 2)
SPD (Byte 1)
SPD (Byte 0)
From host
From host
The Run command produces a motion at SPD speed; the direction is selected by the DIR
bit: '1' forward or '0' reverse. The SPD value is expressed in step/tick (format unsigned fixed
point 0.28) which is the same format as the SPEED register (see Section 9.1.4).
Note:
The SPD value should be lower than MAX_SPEED and greater than MIN_SPEED
otherwise the Run command is executed at MAX_SPEED or MIN_SPEED respectively.
This command keeps the BUSY flag low until the target speed is reached.
This command can be given anytime and is immediately executed.
9.2.6
StepClock (DIR)
Table 38. StepClock command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
0
1
1
0
0
DIR
From host
The StepClock command switches the device in step-clock mode (see Section 6.7.5) and
imposes the forward (DIR = '1') or reverse (DIR = '0') direction.
When the device is in step-clock mode the SCK_MOD flag in the STATUS register is raised
and the motor is always considered stopped (see Section 6.7.5 and 9.1.18).
The device exits from step-clock mode when a constant speed, absolute positioning or
motion command is sent through SPI. Motion direction is imposed by the respective
StepClock command argument and can by changed by a new StepClock command without
exiting step-clock mode.
Events that cause bridges to be forced into high-impedance state (overtemperature,
overcurrent, etc.) do not cause the device to leave step-clock mode. StepClock command
does not force the BUSY flag low. This command can only be given when the motor is
stopped. If a motion is in progress the motor should be stopped and it is then possible to
send a StepClock command.
Any attempt to perform a StepClock command when the motor is running causes the
command to be ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
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9.2.7
Move (DIR, N_STEP)
Table 39. Move command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
0
0
0
0
0
DIR
From host
X
X
N_STEP (Byte 2)
From host
From host
From host
N_STEP (Byte 1)
N_STEP (Byte 0)
The move command produces a motion of N_STEP microsteps; the direction is selected by
the DIR bit ('1' forward or '0' reverse).
The N_STEP value is always in agreement with the selected step mode; the parameter
value unit is equal to the selected step mode (full, half, quarter, etc.).
This command keeps the BUSY flag low until the target number of steps is performed. This
command can only be performed when the motor is stopped. If a motion is in progress the
motor must be stopped and it is then possible to perform a Move command.
Any attempt to perform a Move command when the motor is running causes the command
to be ignored and the NOTPERF_CMD flag to rise (see Section 9.1.19).
9.2.8
GoTo (ABS_POS)
Table 40. GoTo command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
1
0
0
0
0
0
From host
From host
From host
From host
X
X
ABS_POS (Byte 2)
ABS_POS (Byte 1)
ABS_POS (Byte 0)
The GoTo command produces a motion to the ABS_POS absolute position through the
shortest path. The ABS_POS value is always in agreement with the selected step mode; the
parameter value unit is equal to the selected step mode (full, half, quarter, etc.).
The GoTo command keeps the BUSY flag low until the target position is reached.
This command can be given only when the previous motion command as been completed
(BUSY flag released).
Any attempt to perform a GoTo command when a previous command is under execution
(BUSY low) causes the command to be ignored and the NOTPERF_CMD flag to rise (see
Section 9.1.19).
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9.2.9
GoTo_DIR (DIR, ABS_POS)
Table 41. GoTo_DIR command structure
Bit 7
0
Bit 6
1
Bit 5
1
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0
1
0
0
DIR From host
From host
X
X
ABS_POS (Byte 2)
ABS_POS (Byte 1)
ABS_POS (Byte 0)
From host
From host
The GoTo_DIR command produces a motion to the ABS_POS absolute position imposing a
forward (DIR = '1') or a reverse (DIR = '0') rotation. The ABS_POS value is always in
agreement with the selected step mode; the parameter value unit is equal to the selected
step mode (full, half, quarter, etc.).
The GoTo_DIR command keeps the BUSY flag low until the target speed is reached. This
command can be given only when the previous motion command has been completed
(BUSY flag released).
Any attempt to perform a GoTo_DIR command when a previous command is under
execution (BUSY low) causes the command to be ignored and the NOTPERF_CMD flag to
rise (see Section 9.1.19).
9.2.10
GoUntil (ACT, DIR, SPD)
Table 42. GoUntil command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
0
0
ACT
0
1
DIR
From host
From host
From host
From host
X
X
X
X
SPD (Byte 2)
SPD (Byte 1)
SPD (Byte 0)
The GoUntil command produces a motion at SPD speed imposing a forward (DIR = '1') or a
reverse (DIR = '0') direction. When an external switch turn-on event occurs (see
Section 6.13), the ABS_POS register is reset (if ACT = '0') or the ABS_POS register value is
copied into the MARK register (if ACT = '1'); the system then performs a SoftStop command.
The SPD value is expressed in step/tick (format unsigned fixed point 0.28) which is the
same format as the SPEED register (see Section 9.1.4).
The SPD value should be lower than MAX_SPEED and greater than MIN_SPEED,
otherwise the target speed is imposed at MAX_SPEED or MIN_SPEED respectively.
If the SW_MODE bit of the CONFIG register is set low, the external switch turn-on event
causes a HardStop interrupt instead of the SoftStop one (see Section 6.13 and 9.1.18).
This command keeps the BUSY flag low until the switch turn-on event occurs and the motor
is stopped. This command can be given anytime and is immediately executed.
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9.2.11
ReleaseSW (ACT, DIR)
Table 43. ReleaseSW command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
0
1
ACT
0
1
DIR
From host
The ReleaseSW command produces a motion at minimum speed imposing a forward (DIR =
'1') or reverse (DIR = '0') rotation. When SW is released (opened) the ABS_POS register is
reset (ACT = '0') or the ABS_POS register value is copied into the MARK register (ACT =
'1'); the system then performs a HardStop command.
Note that resetting the ABS_POS register is equivalent to setting the HOME position.
If the minimum speed value is less than 5 step/s or low speed optimization is enabled, the
motion is performed at 5 step/s.
The ReleaseSW command keeps the BUSY flag low until the switch input is released and
the motor is stopped.
9.2.12
GoHome
Table 44. GoHome command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
1
1
0
0
0
0
From host
The GoHome command produces a motion to the HOME position (zero position) via the
shortest path.
Note that this command is equivalent to the “GoTo(0…0)” command. If a motor direction is
mandatory the GoTo_DIR command must be used (see Section 9.2.9).
The GoHome command keeps the BUSY flag low until the home position is reached. This
command can be given only when the previous motion command has been completed. Any
attempt to perform a GoHome command when a previous command is under execution
(BUSY low) causes the command to be ignored and the NOTPERF_CMD to rise (see
Section 9.1.19).
9.2.13
GoMark
GoMark command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
1
1
1
0
0
0
From host
The GoMark command produces a motion to the MARK position performing the minimum
path.
Note that this command is equivalent to the “GoTo (MARK)” command. If a motor direction is
mandatory the GoTo_DIR command must be used.
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Programming manual
The GoMark command keeps the BUSY flag low until the MARK position is reached. This
command can be given only when the previous motion command has been completed
(BUSY flag released).
Any attempt to perform a GoMark command when a previous command is under execution
(BUSY low) causes the command to be ignored and the NOTPERF_CMD flag to rise (see
Section 9.1.19).
9.2.14
ResetPos
Table 45. ResetPos command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
0
1
1
0
0
0
From host
The ResetPos command resets the ABS_POS register to zero. The zero position is also
defined as HOME position (see Section 6.5).
9.2.15
ResetDevice
Table 46.
Bit 7
ResetDevice command structure
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
0
0
0
0
0
0
From host
The ResetDevice command resets the device to power-up conditions (see Section 6.1).
Note:
At power-up the power bridges are disabled.
9.2.16
SoftStop
Table 47. SoftStop command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
1
1
0
0
0
0
From host
The SoftStop command causes an immediate deceleration to zero speed and a consequent
motor stop; the deceleration value used is the one stored in the DEC register (see
Section 9.1.6).
When the motor is in high-impedance state, a SoftStop command forces the bridges to exit
from high-impedance state; no motion is performed.
This command can be given anytime and is immediately executed. This command keeps
the BUSY flag low until the motor is stopped.
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9.2.17
HardStop
Table 48.
Bit 7
HardStop command structure
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
1
1
1
0
0
0
From host
The HardStop command causes an immediate motor stop with infinite deceleration.
When the motor is in high-impedance state, a HardStop command forces the bridges to exit
from high-impedance state; no motion is performed.
This command can be given anytime and is immediately executed. This command keeps
the BUSY flag low until the motor is stopped.
9.2.18
SoftHiZ
Table 49. SoftHiZ command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
1
0
0
0
0
0
From host
The SoftHiZ command disables the power bridges (high-impedance state) after a
deceleration to zero; the deceleration value used is the one stored in the DEC register (see
Section 9.1.6). When bridges are disabled the HiZ flag is raised.
When the motor is stopped, a SoftHiZ command forces the bridges to enter high-impedance
state.
This command can be given anytime and is immediately executed. This command keeps
the BUSY flag low until the motor is stopped.
9.2.19
HardHiZ
Table 50. HardHiZ command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
1
0
1
0
0
0
From host
The HardHiZ command immediately disables the power bridges (high-impedance state) and
raises the HiZ flag.
When the motor is stopped, a HardHiZ command forces the bridges to enter high-
impedance state.
This command can be given anytime and is immediately executed.
This command keeps the BUSY flag low until the motor is stopped.
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9.2.20
GetStatus
Table 51. GetStatus command structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
0
1
0
0
0
0
From host
STATUS MSByte
STATUS LSByte
To host
To host
The GetStatus command returns the STATUS register value.
The GetStatus command resets the STATUS register warning flags. The command forces
the system to exit from any error state. The GetStatus command does NOT reset the HiZ
flag.
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Package mechanical data
L6472
10
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
Table 52. HTSSOP28 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
A1
A2
b
1.2
0.15
1.05
0.3
0.8
0.19
0.09
9.6
1.0
c
0.2
D (1)
D1
E
9.7
5.5
6.4
4.4
2.8
0.65
0.6
1.0
9.8
6.2
4.3
6.6
4.5
E1 (2)
E2
E
L
0.45
0°
0.75
8°
L1
K
Aaa
0.1
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
do not exceed 0.15 mm per side.
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions do not exceed
0.25 mm per side.
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Package mechanical data
Figure 25. HTSSOP28 mechanical data
Doc ID 022729 Rev 1
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Package mechanical data
L6472
Table 53. POWERSO36 mechanical data
mm
inch
Typ.
Dim.
Min.
Typ.
Max.
Min.
Max.
A
a1
a2
a3
b
3.60
0.30
3.30
0.10
0.38
0.32
16.00
9.80
14.50
11.10
2.90
6.2
0.1417
0.0118
0.1299
0.0039
0.0150
0.0126
0.6299
0.3858
0.5709
0.4370
0.1142
0.2441
0.10
0.003
0
0
0.22
0.23
15.80
9.40
13.90
10.90
0.008
0.009
0.622
0.370
0.547
0.429
c
D (1)
D1
E
E1 (1)
E2
E3
e
5.8
0.228
0.65
0.025
0.435
e3
G
11.05
0
0.10
15.90
1.10
1.10
10°
0.000
0.610
0.0039
0.6260
0.0433
0.0433
10°
H
15.50
h
L
0.80
0°
0.031
0°
N
S
8°
8°
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Package mechanical data
Figure 26. POWERSO36 drawings
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Revision history
L6472
11
Revision history
Table 54. Document revision history
Date
Revision
Changes
24-Jan-2012
1
Initial release.
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